V4L/DVB (11879): Adds support for Leadtek WinFast DTV-1800H

Enables analog/digital tv, radio and remote control (gpio).

Tested-by: Marcin Wojcikowski <emtees.mts@gmail.com>
Tested-by: Karel Juhanak <karel.juhanak@warnet.cz>
Tested-by: Andrew Goff <goffa72@gmail.com>
Tested-by: Jan Novak <novak-j@seznam.cz>
Signed-off-by: Miroslav Sustek <sustmidown@centrum.cz>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Miroslav Sustek 2009-05-31 16:47:28 -03:00 committed by Mauro Carvalho Chehab
parent 9035f2e27a
commit 3047a17639
5 changed files with 80 additions and 0 deletions

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@ -79,3 +79,4 @@
78 -> Prof 6200 DVB-S [b022:3022]
79 -> Terratec Cinergy HT PCI MKII [153b:1177]
80 -> Hauppauge WinTV-IR Only [0070:9290]
81 -> Leadtek WinFast DTV1800 Hybrid [107d:6654]

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@ -1976,6 +1976,47 @@ static const struct cx88_board cx88_boards[] = {
.tuner_addr = ADDR_UNSET,
.radio_addr = ADDR_UNSET,
},
[CX88_BOARD_WINFAST_DTV1800H] = {
.name = "Leadtek WinFast DTV1800 Hybrid",
.tuner_type = TUNER_XC2028,
.radio_type = TUNER_XC2028,
.tuner_addr = 0x61,
.radio_addr = 0x61,
/*
* GPIO setting
*
* 2: mute (0=off,1=on)
* 12: tuner reset pin
* 13: audio source (0=tuner audio,1=line in)
* 14: FM (0=on,1=off ???)
*/
.input = {{
.type = CX88_VMUX_TELEVISION,
.vmux = 0,
.gpio0 = 0x0400, /* pin 2 = 0 */
.gpio1 = 0x6040, /* pin 13 = 0, pin 14 = 1 */
.gpio2 = 0x0000,
}, {
.type = CX88_VMUX_COMPOSITE1,
.vmux = 1,
.gpio0 = 0x0400, /* pin 2 = 0 */
.gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */
.gpio2 = 0x0000,
}, {
.type = CX88_VMUX_SVIDEO,
.vmux = 2,
.gpio0 = 0x0400, /* pin 2 = 0 */
.gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */
.gpio2 = 0x0000,
} },
.radio = {
.type = CX88_RADIO,
.gpio0 = 0x0400, /* pin 2 = 0 */
.gpio1 = 0x6000, /* pin 13 = 0, pin 14 = 0 */
.gpio2 = 0x0000,
},
.mpeg = CX88_MPEG_DVB,
},
};
/* ------------------------------------------------------------------ */
@ -2393,6 +2434,10 @@ static const struct cx88_subid cx88_subids[] = {
.subvendor = 0x0070,
.subdevice = 0x9290,
.card = CX88_BOARD_HAUPPAUGE_IRONLY,
}, {
.subvendor = 0x107d,
.subdevice = 0x6654,
.card = CX88_BOARD_WINFAST_DTV1800H,
},
};
@ -2591,6 +2636,23 @@ static int cx88_xc3028_geniatech_tuner_callback(struct cx88_core *core,
return -EINVAL;
}
static int cx88_xc3028_winfast1800h_callback(struct cx88_core *core,
int command, int arg)
{
switch (command) {
case XC2028_TUNER_RESET:
/* GPIO 12 (xc3028 tuner reset) */
cx_set(MO_GP1_IO, 0x1010);
mdelay(50);
cx_clear(MO_GP1_IO, 0x10);
mdelay(50);
cx_set(MO_GP1_IO, 0x10);
mdelay(50);
return 0;
}
return -EINVAL;
}
/* ------------------------------------------------------------------- */
/* some Divco specific stuff */
static int cx88_pv_8000gt_callback(struct cx88_core *core,
@ -2663,6 +2725,8 @@ static int cx88_xc2028_tuner_callback(struct cx88_core *core,
case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
return cx88_dvico_xc2028_callback(core, command, arg);
case CX88_BOARD_WINFAST_DTV1800H:
return cx88_xc3028_winfast1800h_callback(core, command, arg);
}
switch (command) {
@ -2849,6 +2913,16 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
cx_set(MO_GP0_IO, 0x00000080); /* 702 out of reset */
udelay(1000);
break;
case CX88_BOARD_WINFAST_DTV1800H:
/* GPIO 12 (xc3028 tuner reset) */
cx_set(MO_GP1_IO, 0x1010);
mdelay(50);
cx_clear(MO_GP1_IO, 0x10);
mdelay(50);
cx_set(MO_GP1_IO, 0x10);
mdelay(50);
break;
}
}
@ -2869,6 +2943,7 @@ void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl)
core->i2c_algo.udelay = 16;
break;
case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
case CX88_BOARD_WINFAST_DTV1800H:
ctl->demod = XC3028_FE_ZARLINK456;
break;
case CX88_BOARD_KWORLD_ATSC_120:

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@ -1014,6 +1014,7 @@ static int dvb_register(struct cx8802_dev *dev)
}
break;
case CX88_BOARD_PINNACLE_HYBRID_PCTV:
case CX88_BOARD_WINFAST_DTV1800H:
fe0->dvb.frontend = dvb_attach(zl10353_attach,
&cx88_pinnacle_hybrid_pctv,
&core->i2c_adap);

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@ -91,6 +91,7 @@ static void cx88_ir_handle_key(struct cx88_IR *ir)
gpio=(gpio & 0x7fd) + (auxgpio & 0xef);
break;
case CX88_BOARD_WINFAST_DTV1000:
case CX88_BOARD_WINFAST_DTV1800H:
case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900);
auxgpio = gpio;
@ -224,6 +225,7 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
ir->sampling = 1;
break;
case CX88_BOARD_WINFAST_DTV2000H:
case CX88_BOARD_WINFAST_DTV1800H:
ir_codes = ir_codes_winfast;
ir->gpio_addr = MO_GP0_IO;
ir->mask_keycode = 0x8f8;

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@ -233,6 +233,7 @@ extern struct sram_channel cx88_sram_channels[];
#define CX88_BOARD_PROF_6200 78
#define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
#define CX88_BOARD_HAUPPAUGE_IRONLY 80
#define CX88_BOARD_WINFAST_DTV1800H 81
enum cx88_itype {
CX88_VMUX_COMPOSITE1 = 1,