MIPS: DEC: Convert KN01 lock to raw spinlock.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -46,7 +46,7 @@
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* There is no default value -- it has to be initialized.
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* There is no default value -- it has to be initialized.
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*/
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*/
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u16 cached_kn01_csr;
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u16 cached_kn01_csr;
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static DEFINE_SPINLOCK(kn01_lock);
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static DEFINE_RAW_SPINLOCK(kn01_lock);
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static inline void dec_kn01_be_ack(void)
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static inline void dec_kn01_be_ack(void)
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@ -54,12 +54,12 @@ static inline void dec_kn01_be_ack(void)
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volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
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volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&kn01_lock, flags);
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raw_spin_lock_irqsave(&kn01_lock, flags);
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*csr = cached_kn01_csr | KN01_CSR_MEMERR; /* Clear bus IRQ. */
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*csr = cached_kn01_csr | KN01_CSR_MEMERR; /* Clear bus IRQ. */
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iob();
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iob();
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spin_unlock_irqrestore(&kn01_lock, flags);
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raw_spin_unlock_irqrestore(&kn01_lock, flags);
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}
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}
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static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
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static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
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@ -182,7 +182,7 @@ void __init dec_kn01_be_init(void)
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volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
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volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&kn01_lock, flags);
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raw_spin_lock_irqsave(&kn01_lock, flags);
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/* Preset write-only bits of the Control Register cache. */
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/* Preset write-only bits of the Control Register cache. */
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cached_kn01_csr = *csr;
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cached_kn01_csr = *csr;
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@ -194,7 +194,7 @@ void __init dec_kn01_be_init(void)
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*csr = cached_kn01_csr;
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*csr = cached_kn01_csr;
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iob();
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iob();
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spin_unlock_irqrestore(&kn01_lock, flags);
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raw_spin_unlock_irqrestore(&kn01_lock, flags);
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/* Clear any leftover errors from the firmware. */
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/* Clear any leftover errors from the firmware. */
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dec_kn01_be_ack();
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dec_kn01_be_ack();
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