Merge branch 'sis900-wol'
This commit is contained in:
Jeff Garzik
commit
34afd638d0
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@ -1,6 +1,6 @@
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/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
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Copyright 1999 Silicon Integrated System Corporation
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Revision: 1.08.08 Jan. 22 2005
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Revision: 1.08.09 Sep. 19 2005
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Modified from the driver which is originally written by Donald Becker.
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@ -17,6 +17,7 @@
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SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
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preliminary Rev. 1.0 Jan. 18, 1998
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Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
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Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
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Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
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Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
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@ -76,7 +77,7 @@
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#include "sis900.h"
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#define SIS900_MODULE_NAME "sis900"
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#define SIS900_DRV_VERSION "v1.08.08 Jan. 22 2005"
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#define SIS900_DRV_VERSION "v1.08.09 Sep. 19 2005"
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static char version[] __devinitdata =
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KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
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@ -538,6 +539,11 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
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printk("%2.2x:", (u8)net_dev->dev_addr[i]);
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printk("%2.2x.\n", net_dev->dev_addr[i]);
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/* Detect Wake on Lan support */
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ret = inl(CFGPMC & PMESP);
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if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
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printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
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return 0;
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err_unmap_rx:
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@ -2015,6 +2021,67 @@ static int sis900_nway_reset(struct net_device *net_dev)
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return mii_nway_restart(&sis_priv->mii_info);
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}
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/**
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* sis900_set_wol - Set up Wake on Lan registers
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* @net_dev: the net device to probe
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* @wol: container for info passed to the driver
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*
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* Process ethtool command "wol" to setup wake on lan features.
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* SiS900 supports sending WoL events if a correct packet is received,
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* but there is no simple way to filter them to only a subset (broadcast,
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* multicast, unicast or arp).
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*/
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static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
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{
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struct sis900_private *sis_priv = net_dev->priv;
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long pmctrl_addr = net_dev->base_addr + pmctrl;
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u32 cfgpmcsr = 0, pmctrl_bits = 0;
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if (wol->wolopts == 0) {
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pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
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cfgpmcsr |= ~PME_EN;
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pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
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outl(pmctrl_bits, pmctrl_addr);
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if (netif_msg_wol(sis_priv))
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printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
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return 0;
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}
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if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
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| WAKE_BCAST | WAKE_ARP))
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return -EINVAL;
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if (wol->wolopts & WAKE_MAGIC)
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pmctrl_bits |= MAGICPKT;
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if (wol->wolopts & WAKE_PHY)
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pmctrl_bits |= LINKON;
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outl(pmctrl_bits, pmctrl_addr);
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pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
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cfgpmcsr |= PME_EN;
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pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
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if (netif_msg_wol(sis_priv))
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printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
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return 0;
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}
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static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
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{
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long pmctrl_addr = net_dev->base_addr + pmctrl;
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u32 pmctrl_bits;
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pmctrl_bits = inl(pmctrl_addr);
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if (pmctrl_bits & MAGICPKT)
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wol->wolopts |= WAKE_MAGIC;
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if (pmctrl_bits & LINKON)
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wol->wolopts |= WAKE_PHY;
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wol->supported = (WAKE_PHY | WAKE_MAGIC);
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}
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static struct ethtool_ops sis900_ethtool_ops = {
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.get_drvinfo = sis900_get_drvinfo,
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.get_msglevel = sis900_get_msglevel,
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@ -2023,6 +2090,8 @@ static struct ethtool_ops sis900_ethtool_ops = {
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.get_settings = sis900_get_settings,
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.set_settings = sis900_set_settings,
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.nway_reset = sis900_nway_reset,
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.get_wol = sis900_get_wol,
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.set_wol = sis900_set_wol
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};
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/**
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@ -33,6 +33,7 @@ enum sis900_registers {
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rxcfg=0x34, //Receive Configuration Register
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flctrl=0x38, //Flow Control Register
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rxlen=0x3c, //Receive Packet Length Register
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cfgpmcsr=0x44, //Configuration Power Management Control/Status Register
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rfcr=0x48, //Receive Filter Control Register
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rfdr=0x4C, //Receive Filter Data Register
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pmctrl=0xB0, //Power Management Control Register
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@ -140,6 +141,50 @@ enum sis96x_eeprom_command {
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EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100
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};
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/* PCI Registers */
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enum sis900_pci_registers {
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CFGPMC = 0x40,
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CFGPMCSR = 0x44
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};
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/* Power management capabilities bits */
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enum sis900_cfgpmc_register_bits {
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PMVER = 0x00070000,
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DSI = 0x00100000,
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PMESP = 0xf8000000
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};
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enum sis900_pmesp_bits {
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PME_D0 = 0x1,
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PME_D1 = 0x2,
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PME_D2 = 0x4,
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PME_D3H = 0x8,
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PME_D3C = 0x10
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};
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/* Power management control/status bits */
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enum sis900_cfgpmcsr_register_bits {
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PMESTS = 0x00004000,
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PME_EN = 0x00000100, // Power management enable
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PWR_STA = 0x00000003 // Current power state
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};
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/* Wake-on-LAN support. */
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enum sis900_power_management_control_register_bits {
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LINKLOSS = 0x00000001,
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LINKON = 0x00000002,
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MAGICPKT = 0x00000400,
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ALGORITHM = 0x00000800,
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FRM1EN = 0x00100000,
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FRM2EN = 0x00200000,
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FRM3EN = 0x00400000,
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FRM1ACS = 0x01000000,
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FRM2ACS = 0x02000000,
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FRM3ACS = 0x04000000,
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WAKEALL = 0x40000000,
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GATECLK = 0x80000000
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};
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/* Management Data I/O (mdio) frame */
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#define MIIread 0x6000
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#define MIIwrite 0x5002
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