arm64: cpufeature: Enable Qualcomm Falkor errata 1009 for Kryo
The Kryo cores share errata 1009 with Falkor, so add their model definitions and enable it for them as well. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [will: Update entry in silicon-errata.rst] Signed-off-by: Will Deacon <will@kernel.org>
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@ -126,7 +126,7 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
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+----------------+-----------------+-----------------+-----------------------------+
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| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
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| Qualcomm Tech. | Kryo/Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
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+----------------+-----------------+-----------------+-----------------------------+
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| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
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+----------------+-----------------+-----------------+-----------------------------+
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@ -659,17 +659,23 @@ static const struct midr_range arm64_harden_el2_vectors[] = {
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#endif
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#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
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static const struct midr_range arm64_repeat_tlbi_cpus[] = {
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static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
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#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
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MIDR_RANGE(MIDR_QCOM_FALKOR_V1, 0, 0, 0, 0),
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{
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ERRATA_MIDR_REV(MIDR_QCOM_FALKOR_V1, 0, 0)
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},
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{
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.midr_range.model = MIDR_QCOM_KRYO,
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.matches = is_kryo_midr,
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_1286807
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MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
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{
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ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
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},
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#endif
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{},
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};
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#endif
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#ifdef CONFIG_CAVIUM_ERRATUM_27456
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@ -825,7 +831,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
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{
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.desc = "Qualcomm erratum 1009, ARM erratum 1286807",
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.capability = ARM64_WORKAROUND_REPEAT_TLBI,
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ERRATA_MIDR_RANGE_LIST(arm64_repeat_tlbi_cpus),
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.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
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.matches = cpucap_multi_entry_cap_matches,
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.match_list = arm64_repeat_tlbi_list,
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_858921
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