powerpc: Remove STAB code
Old cpus didn't have a Segment Lookaside Buffer (SLB), instead they had a Segment Table (STAB). Now that we've dropped support for those cpus, we can remove the STAB support entirely. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
parent
468a33028e
commit
376af5947c
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@ -24,26 +24,6 @@
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#include <asm/bug.h>
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#include <asm/processor.h>
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/*
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* Segment table
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*/
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#define STE_ESID_V 0x80
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#define STE_ESID_KS 0x20
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#define STE_ESID_KP 0x10
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#define STE_ESID_N 0x08
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#define STE_VSID_SHIFT 12
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/* Location of cpu0's segment table */
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#define STAB0_PAGE 0x8
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#define STAB0_OFFSET (STAB0_PAGE << 12)
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#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
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#ifndef __ASSEMBLY__
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extern char initial_stab[];
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#endif /* ! __ASSEMBLY */
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/*
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* SLB
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*/
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@ -370,10 +350,8 @@ extern void hpte_init_lpar(void);
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extern void hpte_init_beat(void);
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extern void hpte_init_beat_v3(void);
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extern void stabs_alloc(void);
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extern void slb_initialize(void);
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extern void slb_flush_and_rebolt(void);
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extern void stab_initialize(unsigned long stab);
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extern void slb_vmalloc_update(void);
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extern void slb_set_size(u16 size);
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@ -18,7 +18,6 @@ extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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extern void destroy_context(struct mm_struct *mm);
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extern void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next);
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extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
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extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
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extern void set_context(unsigned long id, pgd_t *pgd);
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@ -79,8 +78,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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#ifdef CONFIG_PPC_STD_MMU_64
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if (mmu_has_feature(MMU_FTR_SLB))
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switch_slb(tsk, next);
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else
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switch_stab(tsk, next);
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#else
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/* Out of line for now */
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switch_mmu_context(prev, next);
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@ -78,10 +78,6 @@ struct paca_struct {
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u64 kernel_toc; /* Kernel TOC address */
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u64 kernelbase; /* Base address of kernel */
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u64 kernel_msr; /* MSR while running in kernel */
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#ifdef CONFIG_PPC_STD_MMU_64
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u64 stab_real; /* Absolute address of segment table */
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u64 stab_addr; /* Virtual address of segment table */
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#endif /* CONFIG_PPC_STD_MMU_64 */
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void *emergency_sp; /* pointer to emergency stack */
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u64 data_offset; /* per cpu data offset */
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s16 hw_cpu_id; /* Physical processor number */
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@ -254,7 +254,7 @@
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#define DSISR_PROTFAULT 0x08000000 /* protection fault */
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#define DSISR_ISSTORE 0x02000000 /* access was a store */
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#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
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#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */
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#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */
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#define DSISR_KEYFAULT 0x00200000 /* Key fault */
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#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
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#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */
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@ -216,8 +216,6 @@ int main(void)
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#endif /* CONFIG_PPC_BOOK3E */
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#ifdef CONFIG_PPC_STD_MMU_64
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DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
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DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
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DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
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DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
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DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
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@ -188,10 +188,6 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
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data_access_pSeries:
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HMT_MEDIUM_PPR_DISCARD
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SET_SCRATCH0(r13)
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BEGIN_FTR_SECTION
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b data_access_check_stab
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data_access_not_stab:
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END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
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EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
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KVMTEST, 0x300)
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@ -514,34 +510,6 @@ machine_check_pSeries_0:
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EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
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EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
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KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
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/* moved from 0x300 */
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data_access_check_stab:
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GET_PACA(r13)
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std r9,PACA_EXSLB+EX_R9(r13)
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std r10,PACA_EXSLB+EX_R10(r13)
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mfspr r10,SPRN_DAR
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mfspr r9,SPRN_DSISR
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srdi r10,r10,60
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rlwimi r10,r9,16,0x20
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#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
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lbz r9,HSTATE_IN_GUEST(r13)
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rlwimi r10,r9,8,0x300
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#endif
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mfcr r9
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cmpwi r10,0x2c
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beq do_stab_bolted_pSeries
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mtcrf 0x80,r9
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ld r9,PACA_EXSLB+EX_R9(r13)
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ld r10,PACA_EXSLB+EX_R10(r13)
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b data_access_not_stab
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do_stab_bolted_pSeries:
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std r11,PACA_EXSLB+EX_R11(r13)
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std r12,PACA_EXSLB+EX_R12(r13)
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GET_SCRATCH0(r10)
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std r10,PACA_EXSLB+EX_R13(r13)
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EXCEPTION_PROLOG_PSERIES_1(do_stab_bolted, EXC_STD)
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KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
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KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
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KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
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@ -1338,12 +1306,6 @@ fwnmi_data_area:
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. = 0x8000
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#endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
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/* Space for CPU0's segment table */
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.balign 4096
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.globl initial_stab
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initial_stab:
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.space 4096
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#ifdef CONFIG_PPC_POWERNV
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_GLOBAL(opal_mc_secondary_handler)
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HMT_MEDIUM_PPR_DISCARD
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@ -1594,12 +1556,6 @@ do_hash_page:
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bne- handle_page_fault /* if not, try to insert a HPTE */
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andis. r0,r4,DSISR_DABRMATCH@h
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bne- handle_dabr_fault
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BEGIN_FTR_SECTION
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andis. r0,r4,0x0020 /* Is it a segment table fault? */
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bne- do_ste_alloc /* If so handle it */
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END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
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CURRENT_THREAD_INFO(r11, r1)
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lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
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andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
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@ -1680,114 +1636,3 @@ handle_dabr_fault:
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li r5,SIGSEGV
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bl bad_page_fault
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b ret_from_except
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/* here we have a segment miss */
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do_ste_alloc:
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bl ste_allocate /* try to insert stab entry */
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cmpdi r3,0
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bne- handle_page_fault
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b fast_exception_return
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/*
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* r13 points to the PACA, r9 contains the saved CR,
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* r11 and r12 contain the saved SRR0 and SRR1.
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* r9 - r13 are saved in paca->exslb.
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* We assume we aren't going to take any exceptions during this procedure.
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* We assume (DAR >> 60) == 0xc.
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*/
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.align 7
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do_stab_bolted:
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stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
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std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
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mfspr r11,SPRN_DAR /* ea */
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/*
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* check for bad kernel/user address
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* (ea & ~REGION_MASK) >= PGTABLE_RANGE
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*/
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rldicr. r9,r11,4,(63 - 46 - 4)
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li r9,0 /* VSID = 0 for bad address */
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bne- 0f
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/*
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* Calculate VSID:
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* This is the kernel vsid, we take the top for context from
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* the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
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* Here we know that (ea >> 60) == 0xc
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*/
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lis r9,(MAX_USER_CONTEXT + 1)@ha
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addi r9,r9,(MAX_USER_CONTEXT + 1)@l
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srdi r10,r11,SID_SHIFT
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rldimi r10,r9,ESID_BITS,0 /* proto vsid */
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ASM_VSID_SCRAMBLE(r10, r9, 256M)
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rldic r9,r10,12,16 /* r9 = vsid << 12 */
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0:
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/* Hash to the primary group */
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ld r10,PACASTABVIRT(r13)
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srdi r11,r11,SID_SHIFT
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rldimi r10,r11,7,52 /* r10 = first ste of the group */
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/* Search the primary group for a free entry */
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1: ld r11,0(r10) /* Test valid bit of the current ste */
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andi. r11,r11,0x80
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beq 2f
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addi r10,r10,16
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andi. r11,r10,0x70
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bne 1b
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/* Stick for only searching the primary group for now. */
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/* At least for now, we use a very simple random castout scheme */
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/* Use the TB as a random number ; OR in 1 to avoid entry 0 */
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mftb r11
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rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
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ori r11,r11,0x10
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/* r10 currently points to an ste one past the group of interest */
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/* make it point to the randomly selected entry */
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subi r10,r10,128
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or r10,r10,r11 /* r10 is the entry to invalidate */
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isync /* mark the entry invalid */
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ld r11,0(r10)
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rldicl r11,r11,56,1 /* clear the valid bit */
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rotldi r11,r11,8
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std r11,0(r10)
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sync
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clrrdi r11,r11,28 /* Get the esid part of the ste */
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slbie r11
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2: std r9,8(r10) /* Store the vsid part of the ste */
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eieio
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mfspr r11,SPRN_DAR /* Get the new esid */
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clrrdi r11,r11,28 /* Permits a full 32b of ESID */
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ori r11,r11,0x90 /* Turn on valid and kp */
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std r11,0(r10) /* Put new entry back into the stab */
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sync
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/* All done -- return from exception. */
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lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
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ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
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andi. r10,r12,MSR_RI
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beq- unrecov_slb
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mtcrf 0x80,r9 /* restore CR */
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mfmsr r10
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clrrdi r10,r10,2
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mtmsrd r10,1
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mtspr SPRN_SRR0,r11
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mtspr SPRN_SRR1,r12
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ld r9,PACA_EXSLB+EX_R9(r13)
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ld r10,PACA_EXSLB+EX_R10(r13)
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ld r11,PACA_EXSLB+EX_R11(r13)
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ld r12,PACA_EXSLB+EX_R12(r13)
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ld r13,PACA_EXSLB+EX_R13(r13)
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rfid
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b . /* prevent speculative execution */
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@ -618,7 +618,7 @@ __secondary_start:
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addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
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std r14,PACAKSAVE(r13)
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/* Do early setup for that CPU (stab, slb, hash table pointer) */
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/* Do early setup for that CPU (SLB and hash table pointer) */
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bl early_setup_secondary
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/*
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@ -771,8 +771,10 @@ start_here_multiplatform:
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li r0,0
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stdu r0,-STACK_FRAME_OVERHEAD(r1)
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/* Do very early kernel initializations, including initial hash table,
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* stab and slb setup before we turn on relocation. */
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/*
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* Do very early kernel initializations, including initial hash table
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* and SLB setup before we turn on relocation.
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*/
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/* Restore parameters passed from prom_init/kexec */
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mr r3,r31
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@ -673,9 +673,6 @@ void __init setup_arch(char **cmdline_p)
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exc_lvl_early_init();
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emergency_stack_init();
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#ifdef CONFIG_PPC_STD_MMU_64
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stabs_alloc();
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#endif
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/* set up the bootmem stuff with available memory */
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do_init_bootmem();
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sparse_init();
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@ -13,9 +13,7 @@ obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \
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tlb_nohash_low.o
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obj-$(CONFIG_PPC_BOOK3E) += tlb_low_$(CONFIG_WORD_SIZE)e.o
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hash64-$(CONFIG_PPC_NATIVE) := hash_native_64.o
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obj-$(CONFIG_PPC_STD_MMU_64) += hash_utils_64.o \
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slb_low.o slb.o stab.o \
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$(hash64-y)
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obj-$(CONFIG_PPC_STD_MMU_64) += hash_utils_64.o slb_low.o slb.o $(hash64-y)
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obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o
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obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \
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tlb_hash$(CONFIG_WORD_SIZE).o \
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@ -821,21 +821,15 @@ static void __init htab_initialize(void)
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void __init early_init_mmu(void)
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{
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/* Setup initial STAB address in the PACA */
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get_paca()->stab_real = __pa((u64)&initial_stab);
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get_paca()->stab_addr = (u64)&initial_stab;
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/* Initialize the MMU Hash table and create the linear mapping
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* of memory. Has to be done before stab/slb initialization as
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* this is currently where the page size encoding is obtained
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* of memory. Has to be done before SLB initialization as this is
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* currently where the page size encoding is obtained.
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*/
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htab_initialize();
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/* Initialize stab / SLB management */
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/* Initialize SLB management */
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if (mmu_has_feature(MMU_FTR_SLB))
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slb_initialize();
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else
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stab_initialize(get_paca()->stab_real);
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}
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#ifdef CONFIG_SMP
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@ -845,13 +839,9 @@ void early_init_mmu_secondary(void)
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if (!firmware_has_feature(FW_FEATURE_LPAR))
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mtspr(SPRN_SDR1, _SDR1);
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/* Initialize STAB/SLB. We use a virtual address as it works
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* in real mode on pSeries.
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*/
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/* Initialize SLB */
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if (mmu_has_feature(MMU_FTR_SLB))
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slb_initialize();
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else
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stab_initialize(get_paca()->stab_addr);
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}
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#endif /* CONFIG_SMP */
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@ -1,286 +0,0 @@
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/*
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* PowerPC64 Segment Translation Support.
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*
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* Dave Engebretsen and Mike Corrigan {engebret|mikejc}@us.ibm.com
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* Copyright (c) 2001 Dave Engebretsen
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*
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* Copyright (C) 2002 Anton Blanchard <anton@au.ibm.com>, IBM
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/memblock.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/mmu_context.h>
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#include <asm/paca.h>
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#include <asm/cputable.h>
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#include <asm/prom.h>
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struct stab_entry {
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unsigned long esid_data;
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unsigned long vsid_data;
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};
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#define NR_STAB_CACHE_ENTRIES 8
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static DEFINE_PER_CPU(long, stab_cache_ptr);
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static DEFINE_PER_CPU(long [NR_STAB_CACHE_ENTRIES], stab_cache);
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/*
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* Create a segment table entry for the given esid/vsid pair.
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*/
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static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
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{
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unsigned long esid_data, vsid_data;
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unsigned long entry, group, old_esid, castout_entry, i;
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unsigned int global_entry;
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struct stab_entry *ste, *castout_ste;
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unsigned long kernel_segment = (esid << SID_SHIFT) >= PAGE_OFFSET;
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vsid_data = vsid << STE_VSID_SHIFT;
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esid_data = esid << SID_SHIFT | STE_ESID_KP | STE_ESID_V;
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||||
if (! kernel_segment)
|
||||
esid_data |= STE_ESID_KS;
|
||||
|
||||
/* Search the primary group first. */
|
||||
global_entry = (esid & 0x1f) << 3;
|
||||
ste = (struct stab_entry *)(stab | ((esid & 0x1f) << 7));
|
||||
|
||||
/* Find an empty entry, if one exists. */
|
||||
for (group = 0; group < 2; group++) {
|
||||
for (entry = 0; entry < 8; entry++, ste++) {
|
||||
if (!(ste->esid_data & STE_ESID_V)) {
|
||||
ste->vsid_data = vsid_data;
|
||||
eieio();
|
||||
ste->esid_data = esid_data;
|
||||
return (global_entry | entry);
|
||||
}
|
||||
}
|
||||
/* Now search the secondary group. */
|
||||
global_entry = ((~esid) & 0x1f) << 3;
|
||||
ste = (struct stab_entry *)(stab | (((~esid) & 0x1f) << 7));
|
||||
}
|
||||
|
||||
/*
|
||||
* Could not find empty entry, pick one with a round robin selection.
|
||||
* Search all entries in the two groups.
|
||||
*/
|
||||
castout_entry = get_paca()->stab_rr;
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (castout_entry < 8) {
|
||||
global_entry = (esid & 0x1f) << 3;
|
||||
ste = (struct stab_entry *)(stab | ((esid & 0x1f) << 7));
|
||||
castout_ste = ste + castout_entry;
|
||||
} else {
|
||||
global_entry = ((~esid) & 0x1f) << 3;
|
||||
ste = (struct stab_entry *)(stab | (((~esid) & 0x1f) << 7));
|
||||
castout_ste = ste + (castout_entry - 8);
|
||||
}
|
||||
|
||||
/* Dont cast out the first kernel segment */
|
||||
if ((castout_ste->esid_data & ESID_MASK) != PAGE_OFFSET)
|
||||
break;
|
||||
|
||||
castout_entry = (castout_entry + 1) & 0xf;
|
||||
}
|
||||
|
||||
get_paca()->stab_rr = (castout_entry + 1) & 0xf;
|
||||
|
||||
/* Modify the old entry to the new value. */
|
||||
|
||||
/* Force previous translations to complete. DRENG */
|
||||
asm volatile("isync" : : : "memory");
|
||||
|
||||
old_esid = castout_ste->esid_data >> SID_SHIFT;
|
||||
castout_ste->esid_data = 0; /* Invalidate old entry */
|
||||
|
||||
asm volatile("sync" : : : "memory"); /* Order update */
|
||||
|
||||
castout_ste->vsid_data = vsid_data;
|
||||
eieio(); /* Order update */
|
||||
castout_ste->esid_data = esid_data;
|
||||
|
||||
asm volatile("slbie %0" : : "r" (old_esid << SID_SHIFT));
|
||||
/* Ensure completion of slbie */
|
||||
asm volatile("sync" : : : "memory");
|
||||
|
||||
return (global_entry | (castout_entry & 0x7));
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate a segment table entry for the given ea and mm
|
||||
*/
|
||||
static int __ste_allocate(unsigned long ea, struct mm_struct *mm)
|
||||
{
|
||||
unsigned long vsid;
|
||||
unsigned char stab_entry;
|
||||
unsigned long offset;
|
||||
|
||||
/* Kernel or user address? */
|
||||
if (is_kernel_addr(ea)) {
|
||||
vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
|
||||
} else {
|
||||
if ((ea >= TASK_SIZE_USER64) || (! mm))
|
||||
return 1;
|
||||
|
||||
vsid = get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M);
|
||||
}
|
||||
|
||||
stab_entry = make_ste(get_paca()->stab_addr, GET_ESID(ea), vsid);
|
||||
|
||||
if (!is_kernel_addr(ea)) {
|
||||
offset = __get_cpu_var(stab_cache_ptr);
|
||||
if (offset < NR_STAB_CACHE_ENTRIES)
|
||||
__get_cpu_var(stab_cache[offset++]) = stab_entry;
|
||||
else
|
||||
offset = NR_STAB_CACHE_ENTRIES+1;
|
||||
__get_cpu_var(stab_cache_ptr) = offset;
|
||||
|
||||
/* Order update */
|
||||
asm volatile("sync":::"memory");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ste_allocate(unsigned long ea)
|
||||
{
|
||||
return __ste_allocate(ea, current->mm);
|
||||
}
|
||||
|
||||
/*
|
||||
* Do the segment table work for a context switch: flush all user
|
||||
* entries from the table, then preload some probably useful entries
|
||||
* for the new task
|
||||
*/
|
||||
void switch_stab(struct task_struct *tsk, struct mm_struct *mm)
|
||||
{
|
||||
struct stab_entry *stab = (struct stab_entry *) get_paca()->stab_addr;
|
||||
struct stab_entry *ste;
|
||||
unsigned long offset;
|
||||
unsigned long pc = KSTK_EIP(tsk);
|
||||
unsigned long stack = KSTK_ESP(tsk);
|
||||
unsigned long unmapped_base;
|
||||
|
||||
/* Force previous translations to complete. DRENG */
|
||||
asm volatile("isync" : : : "memory");
|
||||
|
||||
/*
|
||||
* We need interrupts hard-disabled here, not just soft-disabled,
|
||||
* so that a PMU interrupt can't occur, which might try to access
|
||||
* user memory (to get a stack trace) and possible cause an STAB miss
|
||||
* which would update the stab_cache/stab_cache_ptr per-cpu variables.
|
||||
*/
|
||||
hard_irq_disable();
|
||||
|
||||
offset = __get_cpu_var(stab_cache_ptr);
|
||||
if (offset <= NR_STAB_CACHE_ENTRIES) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < offset; i++) {
|
||||
ste = stab + __get_cpu_var(stab_cache[i]);
|
||||
ste->esid_data = 0; /* invalidate entry */
|
||||
}
|
||||
} else {
|
||||
unsigned long entry;
|
||||
|
||||
/* Invalidate all entries. */
|
||||
ste = stab;
|
||||
|
||||
/* Never flush the first entry. */
|
||||
ste += 1;
|
||||
for (entry = 1;
|
||||
entry < (HW_PAGE_SIZE / sizeof(struct stab_entry));
|
||||
entry++, ste++) {
|
||||
unsigned long ea;
|
||||
ea = ste->esid_data & ESID_MASK;
|
||||
if (!is_kernel_addr(ea)) {
|
||||
ste->esid_data = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
asm volatile("sync; slbia; sync":::"memory");
|
||||
|
||||
__get_cpu_var(stab_cache_ptr) = 0;
|
||||
|
||||
/* Now preload some entries for the new task */
|
||||
if (test_tsk_thread_flag(tsk, TIF_32BIT))
|
||||
unmapped_base = TASK_UNMAPPED_BASE_USER32;
|
||||
else
|
||||
unmapped_base = TASK_UNMAPPED_BASE_USER64;
|
||||
|
||||
__ste_allocate(pc, mm);
|
||||
|
||||
if (GET_ESID(pc) == GET_ESID(stack))
|
||||
return;
|
||||
|
||||
__ste_allocate(stack, mm);
|
||||
|
||||
if ((GET_ESID(pc) == GET_ESID(unmapped_base))
|
||||
|| (GET_ESID(stack) == GET_ESID(unmapped_base)))
|
||||
return;
|
||||
|
||||
__ste_allocate(unmapped_base, mm);
|
||||
|
||||
/* Order update */
|
||||
asm volatile("sync" : : : "memory");
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate segment tables for secondary CPUs. These must all go in
|
||||
* the first (bolted) segment, so that do_stab_bolted won't get a
|
||||
* recursive segment miss on the segment table itself.
|
||||
*/
|
||||
void __init stabs_alloc(void)
|
||||
{
|
||||
int cpu;
|
||||
|
||||
if (mmu_has_feature(MMU_FTR_SLB))
|
||||
return;
|
||||
|
||||
for_each_possible_cpu(cpu) {
|
||||
unsigned long newstab;
|
||||
|
||||
if (cpu == 0)
|
||||
continue; /* stab for CPU 0 is statically allocated */
|
||||
|
||||
newstab = memblock_alloc_base(HW_PAGE_SIZE, HW_PAGE_SIZE,
|
||||
1<<SID_SHIFT);
|
||||
newstab = (unsigned long)__va(newstab);
|
||||
|
||||
memset((void *)newstab, 0, HW_PAGE_SIZE);
|
||||
|
||||
paca[cpu].stab_addr = newstab;
|
||||
paca[cpu].stab_real = __pa(newstab);
|
||||
printk(KERN_INFO "Segment table for CPU %d at 0x%llx "
|
||||
"virtual, 0x%llx absolute\n",
|
||||
cpu, paca[cpu].stab_addr, paca[cpu].stab_real);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Build an entry for the base kernel segment and put it into
|
||||
* the segment table or SLB. All other segment table or SLB
|
||||
* entries are faulted in.
|
||||
*/
|
||||
void stab_initialize(unsigned long stab)
|
||||
{
|
||||
unsigned long vsid = get_kernel_vsid(PAGE_OFFSET, MMU_SEGSIZE_256M);
|
||||
unsigned long stabreal;
|
||||
|
||||
asm volatile("isync; slbia; isync":::"memory");
|
||||
make_ste(stab, GET_ESID(PAGE_OFFSET), vsid);
|
||||
|
||||
/* Order update */
|
||||
asm volatile("sync":::"memory");
|
||||
|
||||
/* Set ASR */
|
||||
stabreal = get_paca()->stab_real | 0x1ul;
|
||||
|
||||
mtspr(SPRN_ASR, stabreal);
|
||||
}
|
|
@ -2058,10 +2058,6 @@ static void dump_one_paca(int cpu)
|
|||
DUMP(p, kernel_toc, "lx");
|
||||
DUMP(p, kernelbase, "lx");
|
||||
DUMP(p, kernel_msr, "lx");
|
||||
#ifdef CONFIG_PPC_STD_MMU_64
|
||||
DUMP(p, stab_real, "lx");
|
||||
DUMP(p, stab_addr, "lx");
|
||||
#endif
|
||||
DUMP(p, emergency_sp, "p");
|
||||
#ifdef CONFIG_PPC_BOOK3S_64
|
||||
DUMP(p, mc_emergency_sp, "p");
|
||||
|
@ -2727,32 +2723,10 @@ static void dump_slb(void)
|
|||
}
|
||||
}
|
||||
|
||||
static void dump_stab(void)
|
||||
{
|
||||
int i;
|
||||
unsigned long *tmp = (unsigned long *)local_paca->stab_addr;
|
||||
|
||||
printf("Segment table contents of cpu 0x%x\n", smp_processor_id());
|
||||
|
||||
for (i = 0; i < PAGE_SIZE/16; i++) {
|
||||
unsigned long a, b;
|
||||
|
||||
a = *tmp++;
|
||||
b = *tmp++;
|
||||
|
||||
if (a || b) {
|
||||
printf("%03d %016lx ", i, a);
|
||||
printf("%016lx\n", b);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void dump_segments(void)
|
||||
{
|
||||
if (mmu_has_feature(MMU_FTR_SLB))
|
||||
dump_slb();
|
||||
else
|
||||
dump_stab();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
Loading…
Reference in New Issue