OpenE2K
/
linux
6
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

clk: mxs: get base address from device tree 

Instead of using the static definitions, get clkctrl and digctl base
addresses with mapping from device tree.

Use macro on variable is not nice, but it's done here to save huge
pointless diff stat.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Shawn Guo 2013-03-26 21:11:02 +08:00
parent 2835705c8a
commit 38d6590f0f
4 changed files with 37 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/imx23.dtsi
View File

@ -295,6 +295,7 @@
};
digctl@8001c000 {
compatible = "fsl,imx23-digctl";
reg = <0x8001c000 2000>;
status = "disabled";
};

1
arch/arm/boot/dts/imx28.dtsi
View File

@ -647,6 +647,7 @@
};
digctl@8001c000 {
compatible = "fsl,imx28-digctl";
reg = <0x8001c000 0x2000>;
interrupts = <89>;
status = "disabled";

26
drivers/clk/mxs/clk-imx23.c
View File

@ -15,11 +15,16 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <mach/mx23.h>
#include "clk.h"
#define DIGCTRL MX23_IO_ADDRESS(MX23_DIGCTL_BASE_ADDR)
#define CLKCTRL MX23_IO_ADDRESS(MX23_CLKCTRL_BASE_ADDR)
static void __iomem *clkctrl;
static void __iomem *digctrl;
#define CLKCTRL clkctrl
#define DIGCTRL digctrl
#define PLLCTRL0 (CLKCTRL + 0x0000)
#define CPU (CLKCTRL + 0x0020)
#define HBUS (CLKCTRL + 0x0030)
@ -100,6 +105,14 @@ int __init mx23_clocks_init(void)
struct device_node *np;
u32 i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx23-digctl");
digctrl = of_iomap(np, 0);
WARN_ON(!digctrl);
np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl");
clkctrl = of_iomap(np, 0);
WARN_ON(!clkctrl);
clk_misc_init();
clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
@ -152,12 +165,9 @@ int __init mx23_clocks_init(void)
return PTR_ERR(clks[i]);
}
np = of_find_compatible_node(NULL, NULL, "fsl,imx23-clkctrl");
if (np) {
clk_data.clks = clks;
clk_data.clk_num = ARRAY_SIZE(clks);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
clk_data.clks = clks;
clk_data.clk_num = ARRAY_SIZE(clks);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
clk_prepare_enable(clks[clks_init_on[i]]);

25
drivers/clk/mxs/clk-imx28.c
View File

@ -15,10 +15,13 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <mach/mx28.h>
#include "clk.h"
#define CLKCTRL MX28_IO_ADDRESS(MX28_CLKCTRL_BASE_ADDR)
static void __iomem *clkctrl;
#define CLKCTRL clkctrl
#define PLL0CTRL0 (CLKCTRL + 0x0000)
#define PLL1CTRL0 (CLKCTRL + 0x0020)
#define PLL2CTRL0 (CLKCTRL + 0x0040)
@ -52,7 +55,8 @@
#define BP_FRAC0_IO1FRAC 16
#define BP_FRAC0_IO0FRAC 24
#define DIGCTRL MX28_IO_ADDRESS(MX28_DIGCTL_BASE_ADDR)
static void __iomem *digctrl;
#define DIGCTRL digctrl
#define BP_SAIF_CLKMUX 10
/*
@ -155,6 +159,14 @@ int __init mx28_clocks_init(void)
struct device_node *np;
u32 i;
np = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl");
digctrl = of_iomap(np, 0);
WARN_ON(!digctrl);
np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl");
clkctrl = of_iomap(np, 0);
WARN_ON(!clkctrl);
clk_misc_init();
clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
@ -230,12 +242,9 @@ int __init mx28_clocks_init(void)
return PTR_ERR(clks[i]);
}
np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl");
if (np) {
clk_data.clks = clks;
clk_data.clk_num = ARRAY_SIZE(clks);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}
clk_data.clks = clks;
clk_data.clk_num = ARRAY_SIZE(clks);
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
clk_register_clkdev(clks[enet_out], NULL, "enet_out");