ARM: tegra: use machine specific hook for late init

Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
This commit is contained in:
Shawn Guo 2012-05-02 17:08:06 +08:00
parent 21cc1b7ede
commit 390e0cfd32
10 changed files with 30 additions and 5 deletions

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@ -142,6 +142,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_dt_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
.dt_compat = tegra20_dt_board_compat,
MACHINE_END

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@ -80,6 +80,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra30_dt_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
.dt_compat = tegra30_dt_board_compat,
MACHINE_END

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@ -191,5 +191,6 @@ MACHINE_START(HARMONY, "harmony")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_harmony_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END

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@ -221,5 +221,6 @@ MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_paz00_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END

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@ -289,6 +289,7 @@ MACHINE_START(SEABOARD, "seaboard")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_seaboard_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END
@ -300,6 +301,7 @@ MACHINE_START(KAEN, "kaen")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_kaen_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END
@ -311,5 +313,6 @@ MACHINE_START(WARIO, "wario")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_wario_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END

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@ -180,5 +180,6 @@ MACHINE_START(TRIMSLICE, "trimslice")
.handle_irq = gic_handle_irq,
.timer = &tegra_timer,
.init_machine = tegra_trimslice_init,
.init_late = tegra_init_late,
.restart = tegra_assert_system_reset,
MACHINE_END

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@ -32,5 +32,19 @@ void __init tegra_init_irq(void);
void __init tegra_dt_init_irq(void);
int __init tegra_pcie_init(bool init_port0, bool init_port1);
void tegra_init_late(void);
#ifdef CONFIG_DEBUG_FS
int tegra_clk_debugfs_init(void);
#else
static inline int tegra_clk_debugfs_init(void) { return 0; }
#endif
#if defined(CONFIG_ARCH_TEGRA_2x_SOC) && defined(CONFIG_DEBUG_FS)
int __init tegra_powergate_debugfs_init(void);
#else
static inline int tegra_powergate_debugfs_init(void) { return 0; }
#endif
extern struct sys_timer tegra_timer;
#endif

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@ -642,7 +642,7 @@ static int clk_debugfs_register(struct clk *c)
return 0;
}
static int __init clk_debugfs_init(void)
int __init tegra_clk_debugfs_init(void)
{
struct clk *c;
struct dentry *d;
@ -669,5 +669,4 @@ err_out:
return err;
}
late_initcall(clk_debugfs_init);
#endif

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@ -132,3 +132,9 @@ void __init tegra30_init_early(void)
tegra_powergate_init();
}
#endif
void __init tegra_init_late(void)
{
tegra_clk_debugfs_init();
tegra_powergate_debugfs_init();
}

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@ -234,7 +234,7 @@ static const struct file_operations powergate_fops = {
.release = single_release,
};
static int __init powergate_debugfs_init(void)
int __init tegra_powergate_debugfs_init(void)
{
struct dentry *d;
int err = -ENOMEM;
@ -247,6 +247,4 @@ static int __init powergate_debugfs_init(void)
return err;
}
late_initcall(powergate_debugfs_init);
#endif