mei: move hw dependent functions to interface.c
1. move direct register handling to interface.c and make them static 2. add new function mei_clear_interrupts that wraps direct register access 3. export other functions in mei_dev.h Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -142,8 +142,7 @@ int mei_hw_init(struct mei_device *dev)
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dev->host_hw_state, dev->me_hw_state);
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dev->host_hw_state, dev->me_hw_state);
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/* acknowledge interrupt and stop interupts */
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/* acknowledge interrupt and stop interupts */
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if ((dev->host_hw_state & H_IS) == H_IS)
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mei_clear_interrupts(dev);
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mei_reg_write(dev, H_CSR, dev->host_hw_state);
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/* Doesn't change in runtime */
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/* Doesn't change in runtime */
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dev->hbuf_depth = (dev->host_hw_state & H_CBD) >> 24;
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dev->hbuf_depth = (dev->host_hw_state & H_CBD) >> 24;
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@ -20,8 +20,62 @@
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#include "mei_dev.h"
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#include "mei_dev.h"
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#include "interface.h"
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#include "interface.h"
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/**
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* mei_reg_read - Reads 32bit data from the mei device
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*
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* @dev: the device structure
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* @offset: offset from which to read the data
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*
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* returns register value (u32)
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*/
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static inline u32 mei_reg_read(const struct mei_device *dev,
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unsigned long offset)
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{
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return ioread32(dev->mem_addr + offset);
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}
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/**
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* mei_reg_write - Writes 32bit data to the mei device
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*
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* @dev: the device structure
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* @offset: offset from which to write the data
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* @value: register value to write (u32)
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*/
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static inline void mei_reg_write(const struct mei_device *dev,
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unsigned long offset, u32 value)
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{
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iowrite32(value, dev->mem_addr + offset);
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}
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/**
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* mei_hcsr_read - Reads 32bit data from the host CSR
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*
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* @dev: the device structure
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*
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* returns the byte read.
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*/
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u32 mei_hcsr_read(const struct mei_device *dev)
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{
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return mei_reg_read(dev, H_CSR);
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}
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u32 mei_mecbrw_read(const struct mei_device *dev)
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{
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return mei_reg_read(dev, ME_CB_RW);
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}
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/**
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* mei_mecsr_read - Reads 32bit data from the ME CSR
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*
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* @dev: the device structure
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*
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* returns ME_CSR_HA register value (u32)
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*/
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u32 mei_mecsr_read(const struct mei_device *dev)
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{
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return mei_reg_read(dev, ME_CSR_HA);
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}
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/**
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/**
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* mei_set_csr_register - writes H_CSR register to the mei device,
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* mei_set_csr_register - writes H_CSR register to the mei device,
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* and ignores the H_IS bit for it is write-one-to-zero.
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* and ignores the H_IS bit for it is write-one-to-zero.
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@ -37,7 +91,18 @@ void mei_hcsr_set(struct mei_device *dev)
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}
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}
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/**
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/**
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* mei_csr_enable_interrupts - enables mei device interrupts
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* mei_enable_interrupts - clear and stop interrupts
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*
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* @dev: the device structure
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*/
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void mei_clear_interrupts(struct mei_device *dev)
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{
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if ((dev->host_hw_state & H_IS) == H_IS)
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mei_reg_write(dev, H_CSR, dev->host_hw_state);
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}
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/**
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* mei_enable_interrupts - enables mei device interrupts
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*
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*
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* @dev: the device structure
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* @dev: the device structure
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*/
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*/
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@ -48,7 +113,7 @@ void mei_enable_interrupts(struct mei_device *dev)
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}
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}
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/**
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/**
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* mei_csr_disable_interrupts - disables mei device interrupts
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* mei_disable_interrupts - disables mei device interrupts
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*
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*
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* @dev: the device structure
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* @dev: the device structure
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*/
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*/
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@ -58,6 +123,29 @@ void mei_disable_interrupts(struct mei_device *dev)
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mei_hcsr_set(dev);
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mei_hcsr_set(dev);
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}
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}
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/**
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* mei_interrupt_quick_handler - The ISR of the MEI device
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*
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* @irq: The irq number
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* @dev_id: pointer to the device structure
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*
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* returns irqreturn_t
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*/
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irqreturn_t mei_interrupt_quick_handler(int irq, void *dev_id)
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{
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struct mei_device *dev = (struct mei_device *) dev_id;
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u32 csr_reg = mei_hcsr_read(dev);
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if ((csr_reg & H_IS) != H_IS)
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return IRQ_NONE;
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/* clear H_IS bit in H_CSR */
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mei_reg_write(dev, H_CSR, csr_reg);
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return IRQ_WAKE_THREAD;
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}
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/**
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/**
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* mei_hbuf_filled_slots - gets number of device filled buffer slots
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* mei_hbuf_filled_slots - gets number of device filled buffer slots
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*
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*
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@ -27,28 +27,6 @@
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#include "interface.h"
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#include "interface.h"
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/**
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* mei_interrupt_quick_handler - The ISR of the MEI device
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*
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* @irq: The irq number
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* @dev_id: pointer to the device structure
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*
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* returns irqreturn_t
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*/
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irqreturn_t mei_interrupt_quick_handler(int irq, void *dev_id)
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{
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struct mei_device *dev = (struct mei_device *) dev_id;
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u32 csr_reg = mei_hcsr_read(dev);
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if ((csr_reg & H_IS) != H_IS)
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return IRQ_NONE;
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/* clear H_IS bit in H_CSR */
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mei_reg_write(dev, H_CSR, csr_reg);
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return IRQ_WAKE_THREAD;
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}
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/**
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/**
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* _mei_cmpl - processes completed operation.
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* _mei_cmpl - processes completed operation.
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*
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*
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@ -1150,7 +1128,7 @@ irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id)
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/* Ack the interrupt here
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/* Ack the interrupt here
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* In case of MSI we don't go through the quick handler */
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* In case of MSI we don't go through the quick handler */
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if (pci_dev_msi_enabled(dev->pdev))
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if (pci_dev_msi_enabled(dev->pdev))
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mei_reg_write(dev, H_CSR, dev->host_hw_state);
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mei_clear_interrupts(dev);
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dev->me_hw_state = mei_mecsr_read(dev);
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dev->me_hw_state = mei_mecsr_read(dev);
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@ -440,79 +440,18 @@ int mei_amthif_irq_read(struct mei_device *dev, s32 *slots);
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* Register Access Function
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* Register Access Function
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*/
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*/
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/**
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u32 mei_hcsr_read(const struct mei_device *dev);
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* mei_reg_read - Reads 32bit data from the mei device
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u32 mei_mecsr_read(const struct mei_device *dev);
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*
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u32 mei_mecbrw_read(const struct mei_device *dev);
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* @dev: the device structure
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* @offset: offset from which to read the data
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*
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* returns register value (u32)
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*/
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static inline u32 mei_reg_read(const struct mei_device *dev,
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unsigned long offset)
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{
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return ioread32(dev->mem_addr + offset);
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}
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/**
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* mei_reg_write - Writes 32bit data to the mei device
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*
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* @dev: the device structure
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* @offset: offset from which to write the data
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* @value: register value to write (u32)
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*/
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static inline void mei_reg_write(const struct mei_device *dev,
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unsigned long offset, u32 value)
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{
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iowrite32(value, dev->mem_addr + offset);
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}
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/**
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* mei_hcsr_read - Reads 32bit data from the host CSR
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*
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* @dev: the device structure
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*
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* returns the byte read.
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*/
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static inline u32 mei_hcsr_read(const struct mei_device *dev)
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{
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return mei_reg_read(dev, H_CSR);
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}
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/**
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* mei_mecsr_read - Reads 32bit data from the ME CSR
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*
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* @dev: the device structure
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*
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* returns ME_CSR_HA register value (u32)
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*/
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static inline u32 mei_mecsr_read(const struct mei_device *dev)
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{
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return mei_reg_read(dev, ME_CSR_HA);
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}
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/**
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* get_me_cb_rw - Reads 32bit data from the mei ME_CB_RW register
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*
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* @dev: the device structure
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*
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* returns ME_CB_RW register value (u32)
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*/
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static inline u32 mei_mecbrw_read(const struct mei_device *dev)
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{
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return mei_reg_read(dev, ME_CB_RW);
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}
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/*
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* mei interface function prototypes
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*/
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void mei_hcsr_set(struct mei_device *dev);
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void mei_hcsr_set(struct mei_device *dev);
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void mei_csr_clear_his(struct mei_device *dev);
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void mei_csr_clear_his(struct mei_device *dev);
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void mei_clear_interrupts(struct mei_device *dev);
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void mei_enable_interrupts(struct mei_device *dev);
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void mei_enable_interrupts(struct mei_device *dev);
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void mei_disable_interrupts(struct mei_device *dev);
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void mei_disable_interrupts(struct mei_device *dev);
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static inline struct mei_msg_hdr *mei_hbm_hdr(u32 *buf, size_t length)
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static inline struct mei_msg_hdr *mei_hbm_hdr(u32 *buf, size_t length)
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{
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{
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struct mei_msg_hdr *hdr = (struct mei_msg_hdr *)buf;
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struct mei_msg_hdr *hdr = (struct mei_msg_hdr *)buf;
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