dmaengine: omap: add support for cyclic DMA
Add support for cyclic DMA to the OMAP DMA engine driver. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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7c836bc7f9
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3a774ea91a
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@ -33,6 +33,7 @@ struct omap_chan {
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struct dma_slave_config cfg;
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struct dma_slave_config cfg;
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unsigned dma_sig;
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unsigned dma_sig;
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bool cyclic;
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int dma_ch;
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int dma_ch;
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struct omap_desc *desc;
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struct omap_desc *desc;
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@ -138,12 +139,16 @@ static void omap_dma_callback(int ch, u16 status, void *data)
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spin_lock_irqsave(&c->vc.lock, flags);
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spin_lock_irqsave(&c->vc.lock, flags);
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d = c->desc;
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d = c->desc;
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if (d) {
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if (d) {
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if (!c->cyclic) {
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if (++c->sgidx < d->sglen) {
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if (++c->sgidx < d->sglen) {
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omap_dma_start_sg(c, d, c->sgidx);
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omap_dma_start_sg(c, d, c->sgidx);
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} else {
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} else {
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omap_dma_start_desc(c);
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omap_dma_start_desc(c);
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vchan_cookie_complete(&d->vd);
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vchan_cookie_complete(&d->vd);
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}
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}
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} else {
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vchan_cyclic_callback(&d->vd);
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}
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}
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}
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spin_unlock_irqrestore(&c->vc.lock, flags);
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spin_unlock_irqrestore(&c->vc.lock, flags);
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}
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}
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@ -358,6 +363,79 @@ static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
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return vchan_tx_prep(&c->vc, &d->vd, tx_flags);
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return vchan_tx_prep(&c->vc, &d->vd, tx_flags);
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}
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}
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static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
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struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
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size_t period_len, enum dma_transfer_direction dir, void *context)
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{
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struct omap_chan *c = to_omap_dma_chan(chan);
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enum dma_slave_buswidth dev_width;
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struct omap_desc *d;
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dma_addr_t dev_addr;
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unsigned es, sync_type;
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u32 burst;
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if (dir == DMA_DEV_TO_MEM) {
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dev_addr = c->cfg.src_addr;
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dev_width = c->cfg.src_addr_width;
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burst = c->cfg.src_maxburst;
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sync_type = OMAP_DMA_SRC_SYNC;
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} else if (dir == DMA_MEM_TO_DEV) {
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dev_addr = c->cfg.dst_addr;
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dev_width = c->cfg.dst_addr_width;
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burst = c->cfg.dst_maxburst;
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sync_type = OMAP_DMA_DST_SYNC;
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} else {
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dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
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return NULL;
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}
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/* Bus width translates to the element size (ES) */
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switch (dev_width) {
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case DMA_SLAVE_BUSWIDTH_1_BYTE:
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es = OMAP_DMA_DATA_TYPE_S8;
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break;
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case DMA_SLAVE_BUSWIDTH_2_BYTES:
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es = OMAP_DMA_DATA_TYPE_S16;
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break;
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case DMA_SLAVE_BUSWIDTH_4_BYTES:
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es = OMAP_DMA_DATA_TYPE_S32;
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break;
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default: /* not reached */
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return NULL;
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}
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/* Now allocate and setup the descriptor. */
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d = kzalloc(sizeof(*d) + sizeof(d->sg[0]), GFP_ATOMIC);
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if (!d)
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return NULL;
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d->dir = dir;
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d->dev_addr = dev_addr;
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d->fi = burst;
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d->es = es;
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d->sync_mode = OMAP_DMA_SYNC_PACKET;
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d->sync_type = sync_type;
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d->periph_port = OMAP_DMA_PORT_MPUI;
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d->sg[0].addr = buf_addr;
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d->sg[0].en = period_len / es_bytes[es];
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d->sg[0].fn = buf_len / period_len;
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d->sglen = 1;
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if (!c->cyclic) {
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c->cyclic = true;
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omap_dma_link_lch(c->dma_ch, c->dma_ch);
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omap_enable_dma_irq(c->dma_ch, OMAP_DMA_FRAME_IRQ);
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omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
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}
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if (!cpu_class_is_omap1()) {
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omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
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omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
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}
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return vchan_tx_prep(&c->vc, &d->vd, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
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}
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static int omap_dma_slave_config(struct omap_chan *c, struct dma_slave_config *cfg)
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static int omap_dma_slave_config(struct omap_chan *c, struct dma_slave_config *cfg)
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{
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{
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if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
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if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
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@ -392,6 +470,11 @@ static int omap_dma_terminate_all(struct omap_chan *c)
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omap_stop_dma(c->dma_ch);
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omap_stop_dma(c->dma_ch);
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}
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}
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if (c->cyclic) {
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c->cyclic = false;
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omap_dma_unlink_lch(c->dma_ch, c->dma_ch);
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}
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vchan_get_all_descriptors(&c->vc, &head);
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vchan_get_all_descriptors(&c->vc, &head);
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spin_unlock_irqrestore(&c->vc.lock, flags);
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spin_unlock_irqrestore(&c->vc.lock, flags);
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vchan_dma_desc_free_list(&c->vc, &head);
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vchan_dma_desc_free_list(&c->vc, &head);
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@ -484,11 +567,13 @@ static int omap_dma_probe(struct platform_device *pdev)
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return -ENOMEM;
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return -ENOMEM;
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dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
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dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
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dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
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od->ddev.device_alloc_chan_resources = omap_dma_alloc_chan_resources;
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od->ddev.device_alloc_chan_resources = omap_dma_alloc_chan_resources;
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od->ddev.device_free_chan_resources = omap_dma_free_chan_resources;
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od->ddev.device_free_chan_resources = omap_dma_free_chan_resources;
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od->ddev.device_tx_status = omap_dma_tx_status;
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od->ddev.device_tx_status = omap_dma_tx_status;
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od->ddev.device_issue_pending = omap_dma_issue_pending;
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od->ddev.device_issue_pending = omap_dma_issue_pending;
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od->ddev.device_prep_slave_sg = omap_dma_prep_slave_sg;
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od->ddev.device_prep_slave_sg = omap_dma_prep_slave_sg;
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od->ddev.device_prep_dma_cyclic = omap_dma_prep_dma_cyclic;
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od->ddev.device_control = omap_dma_control;
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od->ddev.device_control = omap_dma_control;
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od->ddev.dev = &pdev->dev;
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od->ddev.dev = &pdev->dev;
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INIT_LIST_HEAD(&od->ddev.channels);
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INIT_LIST_HEAD(&od->ddev.channels);
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