drm/nvd0/disp: initial attempt at modeset irq handling
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
b6d8e7ec38
commit
3a89cd0292
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@ -32,6 +32,7 @@
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#include "nouveau_encoder.h"
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#include "nouveau_crtc.h"
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#include "nouveau_fb.h"
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#include "nv50_display.h"
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#define MEM_SYNC 0xe0000001
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#define MEM_VRAM 0xe0010000
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@ -43,6 +44,13 @@ struct nvd0_display {
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dma_addr_t handle;
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u32 *ptr;
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} evo[1];
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struct {
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struct dcb_entry *dis;
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struct dcb_entry *ena;
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int crtc;
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int pclk;
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u16 script;
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} irq;
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};
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static struct nvd0_display *
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@ -856,12 +864,82 @@ nvd0_sor_create(struct drm_connector *connector, struct dcb_entry *dcbe)
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/******************************************************************************
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* IRQ
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*****************************************************************************/
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static struct dcb_entry *
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lookup_dcb(struct drm_device *dev, int id, u32 mc)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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int type, or, i;
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if (id < 4) {
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type = OUTPUT_ANALOG;
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or = id;
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} else {
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type = OUTPUT_TMDS;
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or = id - 4;
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}
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for (i = 0; i < dev_priv->vbios.dcb.entries; i++) {
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struct dcb_entry *dcb = &dev_priv->vbios.dcb.entry[i];
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if (dcb->type == type && (dcb->or & (1 << or)))
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return dcb;
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}
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NV_INFO(dev, "PDISP: DCB for %d/0x%08x not found\n", id, mc);
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return NULL;
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}
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static void
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nvd0_display_unk1_handler(struct drm_device *dev)
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{
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struct nvd0_display *disp = nvd0_display(dev);
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struct dcb_entry *dcb;
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u32 unkn, crtc = 0;
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int i;
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NV_INFO(dev, "PDISP: 1 0x%08x 0x%08x 0x%08x\n", nv_rd32(dev, 0x6101d0),
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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unkn = nv_rd32(dev, 0x6101d4);
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if (!unkn) {
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unkn = nv_rd32(dev, 0x6109d4);
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crtc = 1;
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}
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disp->irq.ena = NULL;
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disp->irq.dis = NULL;
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disp->irq.crtc = crtc;
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disp->irq.pclk = nv_rd32(dev, 0x660450 + (disp->irq.crtc * 0x300));
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disp->irq.pclk /= 1000;
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for (i = 0; i < 8; i++) {
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u32 mcc = nv_rd32(dev, 0x640180 + (i * 0x20));
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u32 mcp = nv_rd32(dev, 0x660180 + (i * 0x20));
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if (mcc & (1 << crtc))
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disp->irq.dis = lookup_dcb(dev, i, mcc);
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if (mcp & (1 << crtc)) {
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disp->irq.ena = lookup_dcb(dev, i, mcp);
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switch (disp->irq.ena->type) {
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case OUTPUT_ANALOG:
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disp->irq.script = 0x00ff;
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break;
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case OUTPUT_TMDS:
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disp->irq.script = (mcp & 0x00000f00) >> 8;
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if (disp->irq.pclk >= 165000)
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disp->irq.script |= 0x0100;
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break;
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default:
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disp->irq.script = 0xbeef;
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break;
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}
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}
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}
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dcb = disp->irq.dis;
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if (dcb)
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nouveau_bios_run_display_table(dev, 0x0000, -1, dcb, crtc);
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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@ -870,9 +948,48 @@ nvd0_display_unk1_handler(struct drm_device *dev)
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static void
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nvd0_display_unk2_handler(struct drm_device *dev)
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{
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struct nvd0_display *disp = nvd0_display(dev);
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struct dcb_entry *dcb;
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int crtc = disp->irq.crtc;
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int pclk = disp->irq.pclk;
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int or;
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u32 tmp;
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NV_INFO(dev, "PDISP: 2 0x%08x 0x%08x 0x%08x\n", nv_rd32(dev, 0x6101d0),
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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dcb = disp->irq.dis;
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disp->irq.dis = NULL;
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if (dcb)
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nouveau_bios_run_display_table(dev, 0x0000, -2, dcb, crtc);
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nv50_crtc_set_clock(dev, crtc, pclk);
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dcb = disp->irq.ena;
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if (!dcb)
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goto ack;
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or = ffs(dcb->or) - 1;
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nouveau_bios_run_display_table(dev, disp->irq.script, pclk, dcb, crtc);
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nv_wr32(dev, 0x612200 + (crtc * 0x800), 0x00000000);
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switch (dcb->type) {
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case OUTPUT_ANALOG:
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nv_wr32(dev, 0x612280 + (or * 0x800), 0x00000000);
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break;
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case OUTPUT_TMDS:
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if (disp->irq.pclk >= 165000)
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tmp = 0x00000101;
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else
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tmp = 0x00000000;
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nv_mask(dev, 0x612300 + (or * 0x800), 0x00000707, tmp);
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break;
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default:
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break;
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}
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ack:
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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@ -881,9 +998,22 @@ nvd0_display_unk2_handler(struct drm_device *dev)
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static void
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nvd0_display_unk4_handler(struct drm_device *dev)
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{
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struct nvd0_display *disp = nvd0_display(dev);
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struct dcb_entry *dcb;
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int crtc = disp->irq.crtc;
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int pclk = disp->irq.pclk;
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NV_INFO(dev, "PDISP: 4 0x%08x 0x%08x 0x%08x\n", nv_rd32(dev, 0x6101d0),
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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dcb = disp->irq.ena;
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disp->irq.ena = NULL;
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if (!dcb)
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goto ack;
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nouveau_bios_run_display_table(dev, disp->irq.script, pclk, dcb, crtc);
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ack:
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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