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ARM: pxa: arbitrarily set first interrupt number 

As IRQ0, the legacy timer interrupt  should not be used as an interrupt
number, shift the interrupts by a fixed number.

As we had in a special case a shift of 16 when ISA bus was used on a
PXA, use that value as the first interrupt number, regardless of ISA or
not.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
This commit is contained in:
Robert Jarzmik 2014-11-24 23:18:22 +01:00
parent 95d8c4c849
commit 3ad32229be
2 changed files with 2 additions and 12 deletions
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5
arch/arm/mach-pxa/Kconfig
View File

@ -83,14 +83,12 @@ config ARCH_VIPER
select I2C_GPIO if I2C=y
select ISA
select PXA25x
select PXA_HAVE_ISA_IRQS
config MACH_ARCOM_ZEUS
bool "Arcom/Eurotech ZEUS SBC"
select ARCOM_PCMCIA
select ISA
select PXA27x
select PXA_HAVE_ISA_IRQS
config MACH_BALLOON3
bool "Balloon 3 board"
@ -690,9 +688,6 @@ config SHARPSL_PM_MAX1111
select SPI
select SPI_MASTER
config PXA_HAVE_ISA_IRQS
bool
config PXA310_ULPI
bool

9
arch/arm/mach-pxa/include/mach/irqs.h
View File

@ -12,14 +12,9 @@
#ifndef __ASM_MACH_IRQS_H
#define __ASM_MACH_IRQS_H
#ifdef CONFIG_PXA_HAVE_ISA_IRQS
#define PXA_ISA_IRQ(x) (x)
#define PXA_ISA_IRQ_NUM (16)
#else
#define PXA_ISA_IRQ_NUM (0)
#endif
#include <asm/irq.h>
#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x))
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */