Berlin SoC changes for v3.17
- SMP support for BG2 and BG2Q -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTsWd4AAoJEN2kpao7fSL4Uq8P/2cRieGwUc7KBKIeK9pGIOrf 9rLXyK57siZIgdBCTR0/EitNs+SuHNMy9NEYwVc0EasnarJW70Gy1Iq+F3WlaiVi OZrXqdl//pjGpmzAUujZiacsbg75AAvMKudqCLKeVK0CLvLAviRtHhtOE2878ase YGDEcFqdYqE4cktX6wOnF0MWzJa+s4V/ekh4450P+1XObR+Qluc4S2Q2U7BVfIN3 jSNtyYO1QV5dTwuCYlDA+t0dyxU1ZF7HVHvEZX7nAQQhmS0YKRJP3OdhqTRZCAj4 H0/5nJP298zbqioZ2ilGYz5o17Dn+gNL6+RDiK/rvWxeeUU7z3ZoYEOV1ddwBAxw cMto/v5gILRfQ8aROOQ6++1J0tutcMIvAdnTZ9GHfID1oGbBb9h8BD37+XB5teFX 0EwFzyZ1PPeznK4Ty803t+x5GDaz5wqe4KQpAfqNAXFwUfdpM7Tb+sFE1NDHCqmS uP7J+0yCMQQy2WkUKin3vOV/+2RyFs11QUT8onh5uuiRkG+1IPEFyA3BQjgA+H5J WZqhM923Wqx+9Y/oUK9zOP8MeJpCu5n4Q+f1FQX0Nx++HJZMTUaUIClasf36INo0 EyMqTrF8WrLaUCSiuu6/OsrMBcryFOZH+df5qMmCxVDd6Ztizo3F8rSU7fzXvRcz lVHpsWJnNYiYCN18h7T4 =iBym -----END PGP SIGNATURE----- Merge tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/soc Merge "Berlin SoC changes for v3.17" from Sebastian Hesselbarth: - SMP support for BG2 and BG2Q * tag 'berlin-soc-3.17-1' of git://git.infradead.org/users/hesselba/linux-berlin: ARM: berlin: add SMP support Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
3ae22f4d94
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@ -13,7 +13,9 @@ config MACH_BERLIN_BG2
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bool "Marvell Armada 1500 (BG2)"
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select CACHE_L2X0
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select CPU_PJ4B
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select HAVE_SMP
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select PINCTRL_BERLIN_BG2
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config MACH_BERLIN_BG2CD
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@ -25,6 +27,7 @@ config MACH_BERLIN_BG2CD
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config MACH_BERLIN_BG2Q
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bool "Marvell Armada 1500 Pro (BG2-Q)"
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select CACHE_L2X0
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select PINCTRL_BERLIN_BG2Q
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@ -1 +1,2 @@
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obj-y += berlin.o
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obj-y += berlin.o
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obj-$(CONFIG_SMP) += headsmp.o platsmp.o
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@ -0,0 +1,30 @@
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/*
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* Copyright (C) 2014 Marvell Technology Group Ltd.
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*
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* Antoine Ténart <antoine.tenart@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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ENTRY(berlin_secondary_startup)
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ARM_BE8(setend be)
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bl v7_invalidate_l1
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b secondary_startup
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ENDPROC(berlin_secondary_startup)
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/*
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* If the following instruction is set in the reset exception vector, CPUs
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* will fetch the value of the software reset address vector when being
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* reset.
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*/
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.global boot_inst
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boot_inst:
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ldr pc, [pc, #140]
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.align
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@ -0,0 +1,99 @@
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/*
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* Copyright (C) 2014 Marvell Technology Group Ltd.
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*
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* Antoine Ténart <antoine.tenart@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#define CPU_RESET 0x00
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#define RESET_VECT 0x00
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#define SW_RESET_ADDR 0x94
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extern void berlin_secondary_startup(void);
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extern u32 boot_inst;
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static void __iomem *cpu_ctrl;
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static inline void berlin_perform_reset_cpu(unsigned int cpu)
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{
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u32 val;
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val = readl(cpu_ctrl + CPU_RESET);
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val |= BIT(cpu_logical_map(cpu));
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writel(val, cpu_ctrl + CPU_RESET);
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}
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static int berlin_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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if (!cpu_ctrl)
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return -EFAULT;
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/*
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* Reset the CPU, making it to execute the instruction in the reset
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* exception vector.
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*/
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berlin_perform_reset_cpu(cpu);
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return 0;
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}
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static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *np;
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void __iomem *scu_base;
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void __iomem *vectors_base;
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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scu_base = of_iomap(np, 0);
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of_node_put(np);
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if (!scu_base)
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return;
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np = of_find_compatible_node(NULL, NULL, "marvell,berlin-cpu-ctrl");
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cpu_ctrl = of_iomap(np, 0);
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of_node_put(np);
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if (!cpu_ctrl)
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goto unmap_scu;
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vectors_base = ioremap(CONFIG_VECTORS_BASE, SZ_32K);
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if (!vectors_base)
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goto unmap_scu;
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scu_enable(scu_base);
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flush_cache_all();
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/*
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* Write the first instruction the CPU will execute after being reset
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* in the reset exception vector.
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*/
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writel(boot_inst, vectors_base + RESET_VECT);
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/*
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* Write the secondary startup address into the SW reset address
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* vector. This is used by boot_inst.
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*/
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writel(virt_to_phys(berlin_secondary_startup), vectors_base + SW_RESET_ADDR);
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iounmap(vectors_base);
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unmap_scu:
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iounmap(scu_base);
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}
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static struct smp_operations berlin_smp_ops __initdata = {
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.smp_prepare_cpus = berlin_smp_prepare_cpus,
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.smp_boot_secondary = berlin_boot_secondary,
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};
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CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops);
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