i40e/i40evf: Big endian fixes for handling HMC
Fix HMC handling for big endian architectures. Change-ID: Id8c46fc341815d47bfe0af8b819f0ab9a1e9e515 Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Paul M Stillwell Jr
Jeff Kirsher
parent
7a208e83fc
commit
3ba3faeb62
@ -746,6 +746,194 @@ static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
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{ 0 }
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};
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/**
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* i40e_write_byte - replace HMC context byte
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* @hmc_bits: pointer to the HMC memory
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* @ce_info: a description of the struct to be read from
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* @src: the struct to be read from
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**/
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static void i40e_write_byte(u8 *hmc_bits,
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struct i40e_context_ele *ce_info,
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u8 *src)
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{
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u8 src_byte, dest_byte, mask;
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u8 *from, *dest;
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u16 shift_width;
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/* copy from the next struct field */
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from = src + ce_info->offset;
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/* prepare the bits and mask */
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shift_width = ce_info->lsb % 8;
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mask = ((u8)1 << ce_info->width) - 1;
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src_byte = *from;
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src_byte &= mask;
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/* shift to correct alignment */
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mask <<= shift_width;
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src_byte <<= shift_width;
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/* get the current bits from the target bit string */
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dest = hmc_bits + (ce_info->lsb / 8);
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memcpy(&dest_byte, dest, sizeof(dest_byte));
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dest_byte &= ~mask; /* get the bits not changing */
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dest_byte |= src_byte; /* add in the new bits */
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/* put it all back */
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memcpy(dest, &dest_byte, sizeof(dest_byte));
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}
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/**
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* i40e_write_word - replace HMC context word
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* @hmc_bits: pointer to the HMC memory
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* @ce_info: a description of the struct to be read from
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* @src: the struct to be read from
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**/
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static void i40e_write_word(u8 *hmc_bits,
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struct i40e_context_ele *ce_info,
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u8 *src)
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{
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u16 src_word, mask;
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u8 *from, *dest;
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u16 shift_width;
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__le16 dest_word;
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/* copy from the next struct field */
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from = src + ce_info->offset;
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/* prepare the bits and mask */
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shift_width = ce_info->lsb % 8;
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mask = ((u16)1 << ce_info->width) - 1;
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/* don't swizzle the bits until after the mask because the mask bits
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* will be in a different bit position on big endian machines
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*/
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src_word = *(u16 *)from;
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src_word &= mask;
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/* shift to correct alignment */
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mask <<= shift_width;
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src_word <<= shift_width;
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/* get the current bits from the target bit string */
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dest = hmc_bits + (ce_info->lsb / 8);
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memcpy(&dest_word, dest, sizeof(dest_word));
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dest_word &= ~(cpu_to_le16(mask)); /* get the bits not changing */
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dest_word |= cpu_to_le16(src_word); /* add in the new bits */
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/* put it all back */
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memcpy(dest, &dest_word, sizeof(dest_word));
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}
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/**
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* i40e_write_dword - replace HMC context dword
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* @hmc_bits: pointer to the HMC memory
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* @ce_info: a description of the struct to be read from
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* @src: the struct to be read from
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**/
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static void i40e_write_dword(u8 *hmc_bits,
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struct i40e_context_ele *ce_info,
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u8 *src)
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{
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u32 src_dword, mask;
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u8 *from, *dest;
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u16 shift_width;
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__le32 dest_dword;
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/* copy from the next struct field */
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from = src + ce_info->offset;
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/* prepare the bits and mask */
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shift_width = ce_info->lsb % 8;
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/* if the field width is exactly 32 on an x86 machine, then the shift
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* operation will not work because the SHL instructions count is masked
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* to 5 bits so the shift will do nothing
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*/
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if (ce_info->width < 32)
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mask = ((u32)1 << ce_info->width) - 1;
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else
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mask = -1;
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/* don't swizzle the bits until after the mask because the mask bits
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* will be in a different bit position on big endian machines
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*/
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src_dword = *(u32 *)from;
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src_dword &= mask;
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/* shift to correct alignment */
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mask <<= shift_width;
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src_dword <<= shift_width;
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/* get the current bits from the target bit string */
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dest = hmc_bits + (ce_info->lsb / 8);
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memcpy(&dest_dword, dest, sizeof(dest_dword));
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dest_dword &= ~(cpu_to_le32(mask)); /* get the bits not changing */
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dest_dword |= cpu_to_le32(src_dword); /* add in the new bits */
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/* put it all back */
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memcpy(dest, &dest_dword, sizeof(dest_dword));
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}
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/**
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* i40e_write_qword - replace HMC context qword
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* @hmc_bits: pointer to the HMC memory
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* @ce_info: a description of the struct to be read from
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* @src: the struct to be read from
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**/
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static void i40e_write_qword(u8 *hmc_bits,
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struct i40e_context_ele *ce_info,
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u8 *src)
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{
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u64 src_qword, mask;
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u8 *from, *dest;
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u16 shift_width;
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__le64 dest_qword;
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/* copy from the next struct field */
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from = src + ce_info->offset;
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/* prepare the bits and mask */
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shift_width = ce_info->lsb % 8;
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/* if the field width is exactly 64 on an x86 machine, then the shift
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* operation will not work because the SHL instructions count is masked
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* to 6 bits so the shift will do nothing
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*/
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if (ce_info->width < 64)
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mask = ((u64)1 << ce_info->width) - 1;
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else
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mask = -1;
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/* don't swizzle the bits until after the mask because the mask bits
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* will be in a different bit position on big endian machines
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*/
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src_qword = *(u64 *)from;
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src_qword &= mask;
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/* shift to correct alignment */
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mask <<= shift_width;
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src_qword <<= shift_width;
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/* get the current bits from the target bit string */
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dest = hmc_bits + (ce_info->lsb / 8);
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memcpy(&dest_qword, dest, sizeof(dest_qword));
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dest_qword &= ~(cpu_to_le64(mask)); /* get the bits not changing */
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dest_qword |= cpu_to_le64(src_qword); /* add in the new bits */
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/* put it all back */
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memcpy(dest, &dest_qword, sizeof(dest_qword));
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}
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/**
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* i40e_clear_hmc_context - zero out the HMC context bits
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* @hw: the hardware struct
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@ -772,71 +960,28 @@ static i40e_status i40e_set_hmc_context(u8 *context_bytes,
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struct i40e_context_ele *ce_info,
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u8 *dest)
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{
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u16 shift_width;
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u64 bitfield;
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u8 hi_byte;
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u8 hi_mask;
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u64 t_bits;
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u64 mask;
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u8 *p;
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int f;
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for (f = 0; ce_info[f].width != 0; f++) {
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/* clear out the field */
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bitfield = 0;
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/* copy from the next struct field */
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p = dest + ce_info[f].offset;
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/* we have to deal with each element of the HMC using the
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* correct size so that we are correct regardless of the
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* endianness of the machine
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*/
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switch (ce_info[f].size_of) {
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case 1:
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bitfield = *p;
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i40e_write_byte(context_bytes, &ce_info[f], dest);
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break;
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case 2:
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bitfield = cpu_to_le16(*(u16 *)p);
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i40e_write_word(context_bytes, &ce_info[f], dest);
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break;
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case 4:
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bitfield = cpu_to_le32(*(u32 *)p);
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i40e_write_dword(context_bytes, &ce_info[f], dest);
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break;
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case 8:
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bitfield = cpu_to_le64(*(u64 *)p);
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i40e_write_qword(context_bytes, &ce_info[f], dest);
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break;
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}
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/* prepare the bits and mask */
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shift_width = ce_info[f].lsb % 8;
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mask = ((u64)1 << ce_info[f].width) - 1;
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/* save upper bytes for special case */
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hi_mask = (u8)((mask >> 56) & 0xff);
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hi_byte = (u8)((bitfield >> 56) & 0xff);
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/* shift to correct alignment */
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mask <<= shift_width;
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bitfield <<= shift_width;
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/* get the current bits from the target bit string */
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p = context_bytes + (ce_info[f].lsb / 8);
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memcpy(&t_bits, p, sizeof(u64));
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t_bits &= ~mask; /* get the bits not changing */
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t_bits |= bitfield; /* add in the new bits */
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/* put it all back */
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memcpy(p, &t_bits, sizeof(u64));
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/* deal with the special case if needed
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* example: 62 bit field that starts in bit 5 of first byte
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* will overlap 3 bits into byte 9
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*/
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if ((shift_width + ce_info[f].width) > 64) {
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u8 byte;
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hi_mask >>= (8 - shift_width);
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hi_byte >>= (8 - shift_width);
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byte = p[8] & ~hi_mask; /* get the bits not changing */
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byte |= hi_byte; /* add in the new bits */
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p[8] = byte; /* put it back */
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}
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}
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return 0;
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@ -32,16 +32,22 @@ struct i40e_hw;
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/* HMC element context information */
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/* Rx queue context data */
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/* Rx queue context data
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*
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* The sizes of the variables may be larger than needed due to crossing byte
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* boundaries. If we do not have the width of the variable set to the correct
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* size then we could end up shifting bits off the top of the variable when the
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* variable is at the top of a byte and crosses over into the next byte.
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*/
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struct i40e_hmc_obj_rxq {
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u16 head;
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u8 cpuid;
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u16 cpuid; /* bigger than needed, see above for reason */
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u64 base;
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u16 qlen;
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#define I40E_RXQ_CTX_DBUFF_SHIFT 7
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u8 dbuff;
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u16 dbuff; /* bigger than needed, see above for reason */
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#define I40E_RXQ_CTX_HBUFF_SHIFT 6
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u8 hbuff;
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u16 hbuff; /* bigger than needed, see above for reason */
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u8 dtype;
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u8 dsize;
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u8 crcstrip;
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@ -50,16 +56,22 @@ struct i40e_hmc_obj_rxq {
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u8 hsplit_0;
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u8 hsplit_1;
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u8 showiv;
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u16 rxmax;
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u32 rxmax; /* bigger than needed, see above for reason */
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u8 tphrdesc_ena;
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u8 tphwdesc_ena;
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u8 tphdata_ena;
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u8 tphhead_ena;
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u8 lrxqthresh;
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u16 lrxqthresh; /* bigger than needed, see above for reason */
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u8 prefena; /* NOTE: normally must be set to 1 at init */
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};
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/* Tx queue context data */
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/* Tx queue context data
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*
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* The sizes of the variables may be larger than needed due to crossing byte
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* boundaries. If we do not have the width of the variable set to the correct
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* size then we could end up shifting bits off the top of the variable when the
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* variable is at the top of a byte and crosses over into the next byte.
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*/
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struct i40e_hmc_obj_txq {
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u16 head;
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u8 new_context;
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@ -69,7 +81,7 @@ struct i40e_hmc_obj_txq {
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u8 fd_ena;
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u8 alt_vlan_ena;
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u16 thead_wb;
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u16 cpuid;
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u8 cpuid;
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u8 head_wb_ena;
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u16 qlen;
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u8 tphrdesc_ena;
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@ -32,16 +32,22 @@ struct i40e_hw;
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/* HMC element context information */
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/* Rx queue context data */
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/* Rx queue context data
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*
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* The sizes of the variables may be larger than needed due to crossing byte
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* boundaries. If we do not have the width of the variable set to the correct
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* size then we could end up shifting bits off the top of the variable when the
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* variable is at the top of a byte and crosses over into the next byte.
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*/
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struct i40e_hmc_obj_rxq {
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u16 head;
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u8 cpuid;
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u16 cpuid; /* bigger than needed, see above for reason */
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u64 base;
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u16 qlen;
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#define I40E_RXQ_CTX_DBUFF_SHIFT 7
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u8 dbuff;
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u16 dbuff; /* bigger than needed, see above for reason */
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#define I40E_RXQ_CTX_HBUFF_SHIFT 6
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u8 hbuff;
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u16 hbuff; /* bigger than needed, see above for reason */
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u8 dtype;
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u8 dsize;
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u8 crcstrip;
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@ -50,16 +56,22 @@ struct i40e_hmc_obj_rxq {
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u8 hsplit_0;
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u8 hsplit_1;
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u8 showiv;
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u16 rxmax;
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u32 rxmax; /* bigger than needed, see above for reason */
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u8 tphrdesc_ena;
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u8 tphwdesc_ena;
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u8 tphdata_ena;
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u8 tphhead_ena;
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u8 lrxqthresh;
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u16 lrxqthresh; /* bigger than needed, see above for reason */
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u8 prefena; /* NOTE: normally must be set to 1 at init */
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};
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/* Tx queue context data */
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/* Tx queue context data
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*
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* The sizes of the variables may be larger than needed due to crossing byte
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* boundaries. If we do not have the width of the variable set to the correct
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* size then we could end up shifting bits off the top of the variable when the
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* variable is at the top of a byte and crosses over into the next byte.
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*/
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struct i40e_hmc_obj_txq {
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u16 head;
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u8 new_context;
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@ -69,7 +81,7 @@ struct i40e_hmc_obj_txq {
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u8 fd_ena;
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u8 alt_vlan_ena;
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u16 thead_wb;
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u16 cpuid;
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u8 cpuid;
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u8 head_wb_ena;
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u16 qlen;
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u8 tphrdesc_ena;
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