ALSA: hda - Check CORB overflow
Add an overflow check of CORB in HD-audio controller and codec drivers so that flood of sequential writes would work properly. In the controller side, add a check of CORB read-pointer to make returning -EAGAIN when it's full. Meanwhile in the codec side, when -EAGAIN error is received, it retries the write after flushing the pending verbs (calling get_response() essentially does it). Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -222,8 +222,14 @@ static int codec_exec_verb(struct hda_codec *codec, unsigned int cmd,
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again:
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snd_hda_power_up(codec);
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mutex_lock(&bus->cmd_mutex);
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trace_hda_send_cmd(codec, cmd);
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err = bus->ops.command(bus, cmd);
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for (;;) {
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trace_hda_send_cmd(codec, cmd);
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err = bus->ops.command(bus, cmd);
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if (err != -EAGAIN)
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break;
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/* process pending verbs */
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bus->ops.get_response(bus, codec->addr);
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}
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if (!err && res) {
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*res = bus->ops.get_response(bus, codec->addr);
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trace_hda_get_response(codec, *res);
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@ -797,7 +797,7 @@ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val)
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{
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struct azx *chip = bus->private_data;
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unsigned int addr = azx_command_addr(val);
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unsigned int wp;
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unsigned int wp, rp;
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spin_lock_irq(&chip->reg_lock);
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@ -806,11 +806,18 @@ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val)
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if (wp == 0xffff) {
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/* something wrong, controller likely turned to D3 */
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spin_unlock_irq(&chip->reg_lock);
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return -1;
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return -EIO;
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}
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wp++;
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wp %= ICH6_MAX_CORB_ENTRIES;
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rp = azx_readw(chip, CORBRP);
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if (wp == rp) {
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/* oops, it's full */
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spin_unlock_irq(&chip->reg_lock);
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return -EAGAIN;
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}
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chip->rirb.cmds[addr]++;
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chip->corb.buf[wp] = cpu_to_le32(val);
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azx_writel(chip, CORBWP, wp);
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