MIPS: BCM47XX: fix position of cpu_wait disabling
The disabling of cpu_wait was done too early, before the detection was done. This moves the code to a position where it actually works. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6352/
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@ -202,15 +202,6 @@ static void __init bcm47xx_register_bcma(void)
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panic("Failed to initialize BCMA bus (err %d)", err);
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panic("Failed to initialize BCMA bus (err %d)", err);
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bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL);
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bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, NULL);
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/* The BCM4706 has a problem with the CPU wait instruction.
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* When r4k_wait or r4k_wait_irqoff is used will just hang and
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* not return from a msleep(). Removing the cpu_wait
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* functionality is a workaround for this problem. The BCM4716
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* does not have this problem.
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*/
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if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
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cpu_wait = NULL;
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}
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}
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#endif
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#endif
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@ -241,6 +232,31 @@ void __init plat_mem_setup(void)
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mips_set_machine_name(bcm47xx_board_get_name());
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mips_set_machine_name(bcm47xx_board_get_name());
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}
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}
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static int __init bcm47xx_cpu_fixes(void)
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{
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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/* Nothing to do */
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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case BCM47XX_BUS_TYPE_BCMA:
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/* The BCM4706 has a problem with the CPU wait instruction.
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* When r4k_wait or r4k_wait_irqoff is used will just hang and
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* not return from a msleep(). Removing the cpu_wait
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* functionality is a workaround for this problem. The BCM4716
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* does not have this problem.
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*/
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if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
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cpu_wait = NULL;
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break;
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#endif
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}
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return 0;
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}
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arch_initcall(bcm47xx_cpu_fixes);
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static int __init bcm47xx_register_bus_complete(void)
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static int __init bcm47xx_register_bus_complete(void)
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{
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{
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switch (bcm47xx_bus_type) {
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switch (bcm47xx_bus_type) {
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