drm/dp_helper: add defines for DP 1.2 and MST support. (v2)
This just adds the defines from the DP 1.2 spec, which we will use later. fix some DP MST to 1.2 MST Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Todd Previte <tprevite@gmail.com> Reviewed-by: Jingoo Han <jg1.han@samsung.com>
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@ -37,6 +37,7 @@
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* eDP: Embedded DisplayPort version 1
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* eDP: Embedded DisplayPort version 1
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* DPI: DisplayPort Interoperability Guideline v1.1a
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* DPI: DisplayPort Interoperability Guideline v1.1a
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* 1.2: DisplayPort 1.2
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* 1.2: DisplayPort 1.2
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* MST: Multistream Transport - part of DP 1.2a
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*
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*
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* 1.2 formally includes both eDP and DPI definitions.
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* 1.2 formally includes both eDP and DPI definitions.
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*/
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*/
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@ -103,9 +104,14 @@
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#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
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#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
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/* Multiple stream transport */
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/* Multiple stream transport */
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#define DP_FAUX_CAP 0x020 /* 1.2 */
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# define DP_FAUX_CAP_1 (1 << 0)
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#define DP_MSTM_CAP 0x021 /* 1.2 */
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#define DP_MSTM_CAP 0x021 /* 1.2 */
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# define DP_MST_CAP (1 << 0)
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# define DP_MST_CAP (1 << 0)
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#define DP_GUID 0x030 /* 1.2 */
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#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
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#define DP_PSR_SUPPORT 0x070 /* XXX 1.2? */
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# define DP_PSR_IS_SUPPORTED 1
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# define DP_PSR_IS_SUPPORTED 1
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#define DP_PSR_CAPS 0x071 /* XXX 1.2? */
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#define DP_PSR_CAPS 0x071 /* XXX 1.2? */
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@ -221,6 +227,16 @@
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# define DP_PSR_CRC_VERIFICATION (1 << 2)
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# define DP_PSR_CRC_VERIFICATION (1 << 2)
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# define DP_PSR_FRAME_CAPTURE (1 << 3)
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# define DP_PSR_FRAME_CAPTURE (1 << 3)
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#define DP_ADAPTER_CTRL 0x1a0
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# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0)
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#define DP_BRANCH_DEVICE_CTRL 0x1a1
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# define DP_BRANCH_DEVICE_IRQ_HPD (1 << 0)
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#define DP_PAYLOAD_ALLOCATE_SET 0x1c0
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#define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
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#define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
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#define DP_SINK_COUNT 0x200
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#define DP_SINK_COUNT 0x200
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/* prior to 1.2 bit 7 was reserved mbz */
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/* prior to 1.2 bit 7 was reserved mbz */
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# define DP_GET_SINK_COUNT(x) ((((x) & 0x80) >> 1) | ((x) & 0x3f))
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# define DP_GET_SINK_COUNT(x) ((((x) & 0x80) >> 1) | ((x) & 0x3f))
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@ -230,6 +246,9 @@
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# define DP_REMOTE_CONTROL_COMMAND_PENDING (1 << 0)
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# define DP_REMOTE_CONTROL_COMMAND_PENDING (1 << 0)
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# define DP_AUTOMATED_TEST_REQUEST (1 << 1)
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# define DP_AUTOMATED_TEST_REQUEST (1 << 1)
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# define DP_CP_IRQ (1 << 2)
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# define DP_CP_IRQ (1 << 2)
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# define DP_MCCS_IRQ (1 << 3)
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# define DP_DOWN_REP_MSG_RDY (1 << 4) /* 1.2 MST */
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# define DP_UP_REQ_MSG_RDY (1 << 5) /* 1.2 MST */
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# define DP_SINK_SPECIFIC_IRQ (1 << 6)
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# define DP_SINK_SPECIFIC_IRQ (1 << 6)
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#define DP_LANE0_1_STATUS 0x202
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#define DP_LANE0_1_STATUS 0x202
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@ -294,6 +313,13 @@
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#define DP_TEST_SINK 0x270
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#define DP_TEST_SINK 0x270
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#define DP_TEST_SINK_START (1 << 0)
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#define DP_TEST_SINK_START (1 << 0)
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#define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */
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# define DP_PAYLOAD_TABLE_UPDATED (1 << 0)
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# define DP_PAYLOAD_ACT_HANDLED (1 << 1)
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#define DP_VC_PAYLOAD_ID_SLOT_1 0x2c1 /* 1.2 MST */
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/* up to ID_SLOT_63 at 0x2ff */
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#define DP_SOURCE_OUI 0x300
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#define DP_SOURCE_OUI 0x300
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#define DP_SINK_OUI 0x400
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#define DP_SINK_OUI 0x400
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#define DP_BRANCH_OUI 0x500
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#define DP_BRANCH_OUI 0x500
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@ -303,6 +329,21 @@
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# define DP_SET_POWER_D3 0x2
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# define DP_SET_POWER_D3 0x2
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# define DP_SET_POWER_MASK 0x3
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# define DP_SET_POWER_MASK 0x3
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#define DP_SIDEBAND_MSG_DOWN_REQ_BASE 0x1000 /* 1.2 MST */
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#define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */
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#define DP_SIDEBAND_MSG_DOWN_REP_BASE 0x1400 /* 1.2 MST */
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#define DP_SIDEBAND_MSG_UP_REQ_BASE 0x1600 /* 1.2 MST */
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#define DP_SINK_COUNT_ESI 0x2002 /* 1.2 */
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/* 0-5 sink count */
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# define DP_SINK_COUNT_CP_READY (1 << 6)
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#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI0 0x2003 /* 1.2 */
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#define DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1 0x2004 /* 1.2 */
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#define DP_LINK_SERVICE_IRQ_VECTOR_ESI0 0x2005 /* 1.2 */
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#define DP_PSR_ERROR_STATUS 0x2006 /* XXX 1.2? */
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#define DP_PSR_ERROR_STATUS 0x2006 /* XXX 1.2? */
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# define DP_PSR_LINK_CRC_ERROR (1 << 0)
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# define DP_PSR_LINK_CRC_ERROR (1 << 0)
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# define DP_PSR_RFB_STORAGE_ERROR (1 << 1)
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# define DP_PSR_RFB_STORAGE_ERROR (1 << 1)
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@ -319,6 +360,43 @@
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# define DP_PSR_SINK_INTERNAL_ERROR 7
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# define DP_PSR_SINK_INTERNAL_ERROR 7
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# define DP_PSR_SINK_STATE_MASK 0x07
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# define DP_PSR_SINK_STATE_MASK 0x07
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/* DP 1.2 Sideband message defines */
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/* peer device type - DP 1.2a Table 2-92 */
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#define DP_PEER_DEVICE_NONE 0x0
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#define DP_PEER_DEVICE_SOURCE_OR_SST 0x1
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#define DP_PEER_DEVICE_MST_BRANCHING 0x2
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#define DP_PEER_DEVICE_SST_SINK 0x3
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#define DP_PEER_DEVICE_DP_LEGACY_CONV 0x4
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/* DP 1.2 MST sideband request names DP 1.2a Table 2-80 */
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#define DP_LINK_ADDRESS 0x01
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#define DP_CONNECTION_STATUS_NOTIFY 0x02
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#define DP_ENUM_PATH_RESOURCES 0x10
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#define DP_ALLOCATE_PAYLOAD 0x11
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#define DP_QUERY_PAYLOAD 0x12
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#define DP_RESOURCE_STATUS_NOTIFY 0x13
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#define DP_CLEAR_PAYLOAD_ID_TABLE 0x14
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#define DP_REMOTE_DPCD_READ 0x20
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#define DP_REMOTE_DPCD_WRITE 0x21
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#define DP_REMOTE_I2C_READ 0x22
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#define DP_REMOTE_I2C_WRITE 0x23
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#define DP_POWER_UP_PHY 0x24
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#define DP_POWER_DOWN_PHY 0x25
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#define DP_SINK_EVENT_NOTIFY 0x30
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#define DP_QUERY_STREAM_ENC_STATUS 0x38
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/* DP 1.2 MST sideband nak reasons - table 2.84 */
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#define DP_NAK_WRITE_FAILURE 0x01
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#define DP_NAK_INVALID_READ 0x02
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#define DP_NAK_CRC_FAILURE 0x03
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#define DP_NAK_BAD_PARAM 0x04
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#define DP_NAK_DEFER 0x05
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#define DP_NAK_LINK_FAILURE 0x06
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#define DP_NAK_NO_RESOURCES 0x07
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#define DP_NAK_DPCD_FAIL 0x08
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#define DP_NAK_I2C_NAK 0x09
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#define DP_NAK_ALLOCATE_FAIL 0x0a
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#define MODE_I2C_START 1
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#define MODE_I2C_START 1
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#define MODE_I2C_WRITE 2
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#define MODE_I2C_WRITE 2
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#define MODE_I2C_READ 4
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#define MODE_I2C_READ 4
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