[POWERPC] kill isa_{io,mem}_base definitions for !PCI

When CONFIG_PCI is disabled, the definitions for isa_io_base,
isa_mem_base and pci_dram_offset are entirely unused, but they
can result in link failure because they are defined in multiple
places.

The easiest fix is to just remove all these definitions.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2007-06-18 01:06:56 +02:00 committed by Kumar Gala
parent 143056013f
commit 3dfaa762b5
13 changed files with 0 additions and 69 deletions

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@ -28,11 +28,6 @@
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
/* ************************************************************************
*
* Setup the architecture

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@ -49,11 +49,6 @@
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
static u8 *bcsr_regs = NULL;
/* ************************************************************************

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@ -32,11 +32,6 @@
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
/* ************************************************************************
*
* Setup the architecture

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@ -38,11 +38,6 @@
#include "mpc83xx.h"
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
/* ************************************************************************
*
* Setup the architecture

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@ -38,11 +38,6 @@
#include "mpc83xx.h"
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
#define BCSR5_INT_USB 0x02
/* Note: This is only for PB, not for PB+PIB
* On PB only port0 is connected using ULPI */

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@ -55,11 +55,6 @@
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
static u8 *bcsr_regs = NULL;
/* ************************************************************************

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@ -38,11 +38,6 @@
#include <asm/fs_pd.h>
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
#ifdef CONFIG_PCI
static int mpc85xx_exclude_device(u_char bus, u_char devfn)
{

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@ -47,11 +47,6 @@
#include <sysdev/fsl_soc.h>
#include "mpc85xx.h"
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
static int cds_pci_slot = 2;
static volatile u8 *cadmus;

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@ -59,11 +59,6 @@
#define DBG(fmt...)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
/* ************************************************************************
*
* Setup the architecture

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@ -44,13 +44,6 @@
#define DBG(fmt...) do { } while(0)
#endif
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
unsigned long pci_dram_offset = 0;
#endif
#ifdef CONFIG_PCI
static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
{

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@ -54,12 +54,6 @@
#define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000
#ifndef CONFIG_PCI
isa_io_base = MPC7448_HPC2_ISA_IO_BASE;
isa_mem_base = MPC7448_HPC2_ISA_MEM_BASE;
pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET;
#endif
extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn)

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@ -18,9 +18,4 @@
#include <asm/ppcboot.h>
/* Base Addresses for the PCI bus
*/
#define MPC7448_HPC2_PCI_MEM_OFFSET (0x00000000)
#define MPC7448_HPC2_ISA_IO_BASE (0x00000000)
#define MPC7448_HPC2_ISA_MEM_BASE (0x00000000)
#endif /* __PPC_PLATFORMS_MPC7448_HPC2_H */

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@ -19,12 +19,6 @@
#ifdef CONFIG_PPC_86xx
#define _IO_BASE isa_io_base
#define _ISA_MEM_BASE isa_mem_base
#ifdef CONFIG_PCI
#define PCI_DRAM_OFFSET pci_dram_offset
#endif
#define CPU0_BOOT_RELEASE 0x01000000
#define CPU1_BOOT_RELEASE 0x02000000
#define CPU_ALL_RELEASED (CPU0_BOOT_RELEASE | CPU1_BOOT_RELEASE)