arm64: dts: allwinner: a64: Fix display clock register range
Register range of display clocks is 0x10000, as it can be seen from
DE2 documentation.
Fix it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 2c796fc8f5
("arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU")
[wens@csie.org: added fixes tag]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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@ -264,7 +264,7 @@
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display_clocks: clock@0 {
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compatible = "allwinner,sun50i-a64-de2-clk";
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reg = <0x0 0x100000>;
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reg = <0x0 0x10000>;
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clocks = <&ccu CLK_BUS_DE>,
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<&ccu CLK_DE>;
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clock-names = "bus",
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