MMC host:
- dw_mmc: Fix request timeout issues -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ/BZ7AAoJEP4mhCVzWIwp+lEP/jJUypCmGZyI3lK1lPj+/yfP ksC71iBpY2o0h/wuUNOd2A6U7C4JqBo9Wb3jVR/0+wqy55uRwtsHgNIjjT8ytgKk fSacoXHro4SftDVCd1dFMDwY+P4wkeuoizP1oRU4nCNOEuNqvsWvnKIS07s3r75h 368YW8Kj56qfqLjzpHLEGslwTOmVNjnrTiFo3xYZX14ghwGYLqs8vGlJ7bWiiZRI /+Ozr5NIwXjArAfAeFmnGXUoK/efosNxkJF19MPgHKi5H0ERO/QCg4sgCMvgnpna pJ1aRxq+Xt5exv3FSs345dHDeZXnXjAnzUCwZ38EfmNGeuuiQO/0kVwnmdZ5z9d4 6P01+JlfCMN7aTg4ArC+J2q/8DLoRA53Mq6SbAGO6fjMvKk2ZQqBjx0152SaM9mU 7jwIhgEeWVzPWMt5J3aAPjorJ7GDMOr/OyEp+0MYtFuMjG46+APGdOIm9MfM68u5 ceRvmy4Vzzih3n5N7GDwzprBjqc/HseHkxNrz+T67f5td/B1eAAQ0lXIk6YiqSVs KDx4NO0MGF/Vx8gmw9Ok9j2KDcJb5qYsi5OC6lPcHFUskBFt0zkm61J1dePd/BZU befv9GzMWP9vmOg1J/2YI0+rVu+dA3EPIxwMCDObYuz+icIrHiBZFqcRFr+K5oB1 uNBBQcpN7swgdOQ1EZxg =W+f+ -----END PGP SIGNATURE----- Merge tag 'mmc-v4.14-rc4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: "Fix dw_mmc request timeout issues" * tag 'mmc-v4.14-rc4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: dw_mmc: Fix the DTO timeout calculation mmc: dw_mmc: Add locking to the CTO timer mmc: dw_mmc: Fix the CTO timeout calculation mmc: dw_mmc: cancel the CTO timer after a voltage switch
This commit is contained in:
Linus Torvalds
commit
3f46540ee7
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@ -401,16 +401,37 @@ static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd)
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static inline void dw_mci_set_cto(struct dw_mci *host)
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{
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unsigned int cto_clks;
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unsigned int cto_div;
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unsigned int cto_ms;
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unsigned long irqflags;
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cto_clks = mci_readl(host, TMOUT) & 0xff;
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cto_ms = DIV_ROUND_UP(cto_clks, host->bus_hz / 1000);
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cto_div = (mci_readl(host, CLKDIV) & 0xff) * 2;
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if (cto_div == 0)
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cto_div = 1;
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cto_ms = DIV_ROUND_UP(MSEC_PER_SEC * cto_clks * cto_div, host->bus_hz);
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/* add a bit spare time */
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cto_ms += 10;
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mod_timer(&host->cto_timer,
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jiffies + msecs_to_jiffies(cto_ms) + 1);
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/*
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* The durations we're working with are fairly short so we have to be
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* extra careful about synchronization here. Specifically in hardware a
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* command timeout is _at most_ 5.1 ms, so that means we expect an
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* interrupt (either command done or timeout) to come rather quickly
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* after the mci_writel. ...but just in case we have a long interrupt
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* latency let's add a bit of paranoia.
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*
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* In general we'll assume that at least an interrupt will be asserted
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* in hardware by the time the cto_timer runs. ...and if it hasn't
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* been asserted in hardware by that time then we'll assume it'll never
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* come.
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*/
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spin_lock_irqsave(&host->irq_lock, irqflags);
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if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events))
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mod_timer(&host->cto_timer,
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jiffies + msecs_to_jiffies(cto_ms) + 1);
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spin_unlock_irqrestore(&host->irq_lock, irqflags);
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}
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static void dw_mci_start_command(struct dw_mci *host,
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@ -425,11 +446,11 @@ static void dw_mci_start_command(struct dw_mci *host,
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wmb(); /* drain writebuffer */
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dw_mci_wait_while_busy(host, cmd_flags);
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mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);
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/* response expected command only */
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if (cmd_flags & SDMMC_CMD_RESP_EXP)
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dw_mci_set_cto(host);
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mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);
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}
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static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data)
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@ -1915,10 +1936,15 @@ static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data)
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static void dw_mci_set_drto(struct dw_mci *host)
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{
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unsigned int drto_clks;
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unsigned int drto_div;
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unsigned int drto_ms;
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drto_clks = mci_readl(host, TMOUT) >> 8;
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drto_ms = DIV_ROUND_UP(drto_clks, host->bus_hz / 1000);
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drto_div = (mci_readl(host, CLKDIV) & 0xff) * 2;
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if (drto_div == 0)
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drto_div = 1;
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drto_ms = DIV_ROUND_UP(MSEC_PER_SEC * drto_clks * drto_div,
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host->bus_hz);
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/* add a bit spare time */
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drto_ms += 10;
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@ -1926,6 +1952,24 @@ static void dw_mci_set_drto(struct dw_mci *host)
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mod_timer(&host->dto_timer, jiffies + msecs_to_jiffies(drto_ms));
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}
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static bool dw_mci_clear_pending_cmd_complete(struct dw_mci *host)
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{
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if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events))
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return false;
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/*
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* Really be certain that the timer has stopped. This is a bit of
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* paranoia and could only really happen if we had really bad
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* interrupt latency and the interrupt routine and timeout were
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* running concurrently so that the del_timer() in the interrupt
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* handler couldn't run.
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*/
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WARN_ON(del_timer_sync(&host->cto_timer));
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clear_bit(EVENT_CMD_COMPLETE, &host->pending_events);
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return true;
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}
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static void dw_mci_tasklet_func(unsigned long priv)
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{
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struct dw_mci *host = (struct dw_mci *)priv;
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@ -1952,8 +1996,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
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case STATE_SENDING_CMD11:
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case STATE_SENDING_CMD:
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if (!test_and_clear_bit(EVENT_CMD_COMPLETE,
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&host->pending_events))
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if (!dw_mci_clear_pending_cmd_complete(host))
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break;
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cmd = host->cmd;
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@ -2122,8 +2165,7 @@ static void dw_mci_tasklet_func(unsigned long priv)
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/* fall through */
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case STATE_SENDING_STOP:
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if (!test_and_clear_bit(EVENT_CMD_COMPLETE,
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&host->pending_events))
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if (!dw_mci_clear_pending_cmd_complete(host))
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break;
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/* CMD error in data command */
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@ -2570,6 +2612,8 @@ done:
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static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status)
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{
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del_timer(&host->cto_timer);
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if (!host->cmd_status)
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host->cmd_status = status;
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@ -2594,6 +2638,7 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
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struct dw_mci *host = dev_id;
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u32 pending;
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struct dw_mci_slot *slot = host->slot;
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unsigned long irqflags;
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pending = mci_readl(host, MINTSTS); /* read-only mask reg */
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@ -2601,8 +2646,6 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
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/* Check volt switch first, since it can look like an error */
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if ((host->state == STATE_SENDING_CMD11) &&
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(pending & SDMMC_INT_VOLT_SWITCH)) {
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unsigned long irqflags;
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mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);
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pending &= ~SDMMC_INT_VOLT_SWITCH;
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@ -2618,11 +2661,15 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
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}
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if (pending & DW_MCI_CMD_ERROR_FLAGS) {
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spin_lock_irqsave(&host->irq_lock, irqflags);
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del_timer(&host->cto_timer);
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mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);
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host->cmd_status = pending;
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smp_wmb(); /* drain writebuffer */
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set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
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spin_unlock_irqrestore(&host->irq_lock, irqflags);
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}
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if (pending & DW_MCI_DATA_ERROR_FLAGS) {
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@ -2662,9 +2709,12 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
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}
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if (pending & SDMMC_INT_CMD_DONE) {
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del_timer(&host->cto_timer);
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spin_lock_irqsave(&host->irq_lock, irqflags);
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mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);
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dw_mci_cmd_interrupt(host, pending);
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spin_unlock_irqrestore(&host->irq_lock, irqflags);
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}
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if (pending & SDMMC_INT_CD) {
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@ -2938,7 +2988,35 @@ static void dw_mci_cmd11_timer(unsigned long arg)
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static void dw_mci_cto_timer(unsigned long arg)
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{
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struct dw_mci *host = (struct dw_mci *)arg;
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unsigned long irqflags;
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u32 pending;
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spin_lock_irqsave(&host->irq_lock, irqflags);
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/*
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* If somehow we have very bad interrupt latency it's remotely possible
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* that the timer could fire while the interrupt is still pending or
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* while the interrupt is midway through running. Let's be paranoid
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* and detect those two cases. Note that this is paranoia is somewhat
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* justified because in this function we don't actually cancel the
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* pending command in the controller--we just assume it will never come.
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*/
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pending = mci_readl(host, MINTSTS); /* read-only mask reg */
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if (pending & (DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_CMD_DONE)) {
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/* The interrupt should fire; no need to act but we can warn */
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dev_warn(host->dev, "Unexpected interrupt latency\n");
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goto exit;
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}
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if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) {
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/* Presumably interrupt handler couldn't delete the timer */
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dev_warn(host->dev, "CTO timeout when already completed\n");
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goto exit;
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}
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/*
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* Continued paranoia to make sure we're in the state we expect.
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* This paranoia isn't really justified but it seems good to be safe.
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*/
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switch (host->state) {
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case STATE_SENDING_CMD11:
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case STATE_SENDING_CMD:
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@ -2957,6 +3035,9 @@ static void dw_mci_cto_timer(unsigned long arg)
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host->state);
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break;
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}
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exit:
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spin_unlock_irqrestore(&host->irq_lock, irqflags);
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}
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static void dw_mci_dto_timer(unsigned long arg)
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