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ASoC: TWL4030: Syncronize the reg_cache for ANAMICL after the offset cancelation 

The offset cancelation bit in ANAMICL register is self cleanig.
Make sure that the reg_cache holds the same value as the HW
register.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Peter Ujfalusi 2009-01-27 11:29:39 +02:00 committed by Mark Brown
parent 6627a653bc
commit 3fc93030e5
1 changed files with 3 additions and 0 deletions
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3
sound/soc/codecs/twl4030.c
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@ -913,6 +913,9 @@ static void twl4030_power_up(struct snd_soc_codec *codec)
((byte & TWL4030_CNCL_OFFSET_START) ==
TWL4030_CNCL_OFFSET_START));
/* Make sure that the reg_cache has the same value as the HW */
twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
/* anti-pop when changing analog gain */
regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
twl4030_write(codec, TWL4030_REG_MISC_SET_1,