cxgb4/cxgb4vf/csiostor: Add T4/T5 PCI ID Table
Add a new file t4_pci_id_tbl.h that contains T4/T5 PCI ID Table so that for all
drivers that uses T4/T5 PCI functions changes can be done in one place.
checkpatch.pl script reports following error, which if tried to fix ends up in
compilation error.
ERROR: Macros with complex values should be enclosed in parentheses
+#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END \
+ { 0, } \
+ }
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
new file mode 100644
ERROR: Macros with complex values should be enclosed in parentheses
+#define CH_PCI_ID_TABLE_FENTRY(devid) \
+ CH_PCI_ID_TABLE_ENTRY((devid) | \
+ ((CH_PCI_DEVICE_ID_FUNCTION) << 8)), \
+ CH_PCI_ID_TABLE_ENTRY((devid) | \
+ ((CH_PCI_DEVICE_ID_FUNCTION2) << 8))
ERROR: Macros with complex values should be enclosed in parentheses
+#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END { 0, } }
ERROR: Macros with complex values should be enclosed in parentheses
+#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END { 0, } }
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Hariprasad Shenai
David S. Miller
parent
3a611e26e9
commit
3fedeab10b
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@ -210,114 +210,25 @@ struct filter_entry {
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NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
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NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
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#define CH_DEVICE(devid, data) { PCI_VDEVICE(CHELSIO, devid), (data) }
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/* Macros needed to support the PCI Device ID Table ...
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*/
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#define CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN \
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static struct pci_device_id cxgb4_pci_tbl[] = {
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#define CH_PCI_DEVICE_ID_FUNCTION 0x4
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static const struct pci_device_id cxgb4_pci_tbl[] = {
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CH_DEVICE(0xa000, 0), /* PE10K */
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CH_DEVICE(0x4001, -1),
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CH_DEVICE(0x4002, -1),
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CH_DEVICE(0x4003, -1),
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CH_DEVICE(0x4004, -1),
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CH_DEVICE(0x4005, -1),
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CH_DEVICE(0x4006, -1),
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CH_DEVICE(0x4007, -1),
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CH_DEVICE(0x4008, -1),
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CH_DEVICE(0x4009, -1),
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CH_DEVICE(0x400a, -1),
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CH_DEVICE(0x400d, -1),
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CH_DEVICE(0x400e, -1),
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CH_DEVICE(0x4080, -1),
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CH_DEVICE(0x4081, -1),
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CH_DEVICE(0x4082, -1),
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CH_DEVICE(0x4083, -1),
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CH_DEVICE(0x4084, -1),
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CH_DEVICE(0x4085, -1),
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CH_DEVICE(0x4086, -1),
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CH_DEVICE(0x4087, -1),
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CH_DEVICE(0x4088, -1),
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CH_DEVICE(0x4401, 4),
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CH_DEVICE(0x4402, 4),
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CH_DEVICE(0x4403, 4),
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CH_DEVICE(0x4404, 4),
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CH_DEVICE(0x4405, 4),
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CH_DEVICE(0x4406, 4),
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CH_DEVICE(0x4407, 4),
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CH_DEVICE(0x4408, 4),
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CH_DEVICE(0x4409, 4),
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CH_DEVICE(0x440a, 4),
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CH_DEVICE(0x440d, 4),
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CH_DEVICE(0x440e, 4),
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CH_DEVICE(0x4480, 4),
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CH_DEVICE(0x4481, 4),
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CH_DEVICE(0x4482, 4),
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CH_DEVICE(0x4483, 4),
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CH_DEVICE(0x4484, 4),
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CH_DEVICE(0x4485, 4),
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CH_DEVICE(0x4486, 4),
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CH_DEVICE(0x4487, 4),
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CH_DEVICE(0x4488, 4),
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CH_DEVICE(0x5001, 4),
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CH_DEVICE(0x5002, 4),
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CH_DEVICE(0x5003, 4),
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CH_DEVICE(0x5004, 4),
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CH_DEVICE(0x5005, 4),
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CH_DEVICE(0x5006, 4),
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CH_DEVICE(0x5007, 4),
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CH_DEVICE(0x5008, 4),
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CH_DEVICE(0x5009, 4),
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CH_DEVICE(0x500A, 4),
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CH_DEVICE(0x500B, 4),
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CH_DEVICE(0x500C, 4),
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CH_DEVICE(0x500D, 4),
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CH_DEVICE(0x500E, 4),
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CH_DEVICE(0x500F, 4),
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CH_DEVICE(0x5010, 4),
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CH_DEVICE(0x5011, 4),
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CH_DEVICE(0x5012, 4),
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CH_DEVICE(0x5013, 4),
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CH_DEVICE(0x5014, 4),
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CH_DEVICE(0x5015, 4),
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CH_DEVICE(0x5080, 4),
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CH_DEVICE(0x5081, 4),
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CH_DEVICE(0x5082, 4),
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CH_DEVICE(0x5083, 4),
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CH_DEVICE(0x5084, 4),
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CH_DEVICE(0x5085, 4),
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CH_DEVICE(0x5086, 4),
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CH_DEVICE(0x5087, 4),
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CH_DEVICE(0x5088, 4),
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CH_DEVICE(0x5401, 4),
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CH_DEVICE(0x5402, 4),
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CH_DEVICE(0x5403, 4),
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CH_DEVICE(0x5404, 4),
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CH_DEVICE(0x5405, 4),
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CH_DEVICE(0x5406, 4),
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CH_DEVICE(0x5407, 4),
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CH_DEVICE(0x5408, 4),
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CH_DEVICE(0x5409, 4),
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CH_DEVICE(0x540A, 4),
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CH_DEVICE(0x540B, 4),
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CH_DEVICE(0x540C, 4),
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CH_DEVICE(0x540D, 4),
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CH_DEVICE(0x540E, 4),
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CH_DEVICE(0x540F, 4),
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CH_DEVICE(0x5410, 4),
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CH_DEVICE(0x5411, 4),
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CH_DEVICE(0x5412, 4),
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CH_DEVICE(0x5413, 4),
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CH_DEVICE(0x5414, 4),
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CH_DEVICE(0x5415, 4),
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CH_DEVICE(0x5480, 4),
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CH_DEVICE(0x5481, 4),
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CH_DEVICE(0x5482, 4),
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CH_DEVICE(0x5483, 4),
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CH_DEVICE(0x5484, 4),
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CH_DEVICE(0x5485, 4),
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CH_DEVICE(0x5486, 4),
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CH_DEVICE(0x5487, 4),
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CH_DEVICE(0x5488, 4),
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{ 0, }
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};
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/* Include PCI Device IDs for both PF4 and PF0-3 so our PCI probe() routine is
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* called for both.
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*/
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#define CH_PCI_DEVICE_ID_FUNCTION2 0x0
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#define CH_PCI_ID_TABLE_ENTRY(devid) \
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{PCI_VDEVICE(CHELSIO, (devid)), 4}
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#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END \
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{ 0, } \
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}
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#include "t4_pci_id_tbl.h"
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#define FW4_FNAME "cxgb4/t4fw.bin"
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#define FW5_FNAME "cxgb4/t5fw.bin"
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@ -0,0 +1,160 @@
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/*
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* This file is part of the Chelsio T4/T5 Ethernet driver for Linux.
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*
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* Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __T4_PCI_ID_TBL_H__
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#define __T4_PCI_ID_TBL_H__
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/* The code can defined cpp macros for creating a PCI Device ID Table. This is
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* useful because it allows the PCI ID Table to be maintained in a single place.
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*
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* The macros are:
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*
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* CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
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* -- Used to start the definition of the PCI ID Table.
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*
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* CH_PCI_DEVICE_ID_FUNCTION
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* -- The PCI Function Number to use in the PCI Device ID Table. "0"
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* -- for drivers attaching to PF0-3, "4" for drivers attaching to PF4,
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* -- "8" for drivers attaching to SR-IOV Virtual Functions, etc.
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*
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* CH_PCI_DEVICE_ID_FUNCTION2 [optional]
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* -- If defined, create a PCI Device ID Table with both
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* -- CH_PCI_DEVICE_ID_FUNCTION and CH_PCI_DEVICE_ID_FUNCTION2 populated.
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*
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* CH_PCI_ID_TABLE_ENTRY(DeviceID)
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* -- Used for the individual PCI Device ID entries. Note that we will
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* -- be adding a trailing comma (",") after all of the entries (and
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* -- between the pairs of entries if CH_PCI_DEVICE_ID_FUNCTION2 is defined).
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*
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* CH_PCI_DEVICE_ID_TABLE_DEFINE_END
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* -- Used to finish the definition of the PCI ID Table. Note that we
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* -- will be adding a trailing semi-colon (";") here.
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*/
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#ifdef CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
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#ifndef CH_PCI_DEVICE_ID_FUNCTION
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#error CH_PCI_DEVICE_ID_FUNCTION not defined!
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#endif
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#ifndef CH_PCI_ID_TABLE_ENTRY
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#error CH_PCI_ID_TABLE_ENTRY not defined!
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#endif
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#ifndef CH_PCI_DEVICE_ID_TABLE_DEFINE_END
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#error CH_PCI_DEVICE_ID_TABLE_DEFINE_END not defined!
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#endif
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/* T4 and later ASICs use a PCI Device ID scheme of 0xVFPP where:
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*
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* V = "4" for T4; "5" for T5, etc.
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* F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
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* PP = adapter product designation
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*
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* We use this consistency in order to create the proper PCI Device IDs
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* for the specified CH_PCI_DEVICE_ID_FUNCTION.
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*/
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#ifndef CH_PCI_DEVICE_ID_FUNCTION2
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#define CH_PCI_ID_TABLE_FENTRY(devid) \
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CH_PCI_ID_TABLE_ENTRY((devid) | \
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((CH_PCI_DEVICE_ID_FUNCTION) << 8))
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#else
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#define CH_PCI_ID_TABLE_FENTRY(devid) \
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CH_PCI_ID_TABLE_ENTRY((devid) | \
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((CH_PCI_DEVICE_ID_FUNCTION) << 8)), \
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CH_PCI_ID_TABLE_ENTRY((devid) | \
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((CH_PCI_DEVICE_ID_FUNCTION2) << 8))
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#endif
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CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN
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/* T4 adapters:
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*/
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CH_PCI_ID_TABLE_FENTRY(0x4000), /* T440-dbg */
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CH_PCI_ID_TABLE_FENTRY(0x4001), /* T420-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4002), /* T422-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4003), /* T440-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4004), /* T420-bch */
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CH_PCI_ID_TABLE_FENTRY(0x4005), /* T440-bch */
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CH_PCI_ID_TABLE_FENTRY(0x4006), /* T440-ch */
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CH_PCI_ID_TABLE_FENTRY(0x4007), /* T420-so */
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CH_PCI_ID_TABLE_FENTRY(0x4008), /* T420-cx */
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CH_PCI_ID_TABLE_FENTRY(0x4009), /* T420-bt */
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CH_PCI_ID_TABLE_FENTRY(0x400a), /* T404-bt */
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CH_PCI_ID_TABLE_FENTRY(0x400b), /* B420-sr */
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CH_PCI_ID_TABLE_FENTRY(0x400c), /* B404-bt */
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CH_PCI_ID_TABLE_FENTRY(0x400d), /* T480-cr */
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CH_PCI_ID_TABLE_FENTRY(0x400e), /* T440-LP-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4080), /* Custom T480-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4081), /* Custom T440-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4082), /* Custom T420-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4083), /* Custom T420-xaui */
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CH_PCI_ID_TABLE_FENTRY(0x4084), /* Custom T440-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4085), /* Custom T420-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4086), /* Custom T440-bt */
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CH_PCI_ID_TABLE_FENTRY(0x4087), /* Custom T440-cr */
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CH_PCI_ID_TABLE_FENTRY(0x4088), /* Custom T440 2-xaui, 2-xfi */
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/* T5 adapters:
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*/
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CH_PCI_ID_TABLE_FENTRY(0x5000), /* T580-dbg */
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CH_PCI_ID_TABLE_FENTRY(0x5001), /* T520-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5002), /* T522-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5003), /* T540-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5004), /* T520-bch */
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CH_PCI_ID_TABLE_FENTRY(0x5005), /* T540-bch */
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CH_PCI_ID_TABLE_FENTRY(0x5006), /* T540-ch */
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CH_PCI_ID_TABLE_FENTRY(0x5007), /* T520-so */
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CH_PCI_ID_TABLE_FENTRY(0x5008), /* T520-cx */
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CH_PCI_ID_TABLE_FENTRY(0x5009), /* T520-bt */
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CH_PCI_ID_TABLE_FENTRY(0x500a), /* T504-bt */
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CH_PCI_ID_TABLE_FENTRY(0x500b), /* B520-sr */
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CH_PCI_ID_TABLE_FENTRY(0x500c), /* B504-bt */
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CH_PCI_ID_TABLE_FENTRY(0x500d), /* T580-cr */
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CH_PCI_ID_TABLE_FENTRY(0x500e), /* T540-LP-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5010), /* T580-LP-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5011), /* T520-LL-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5012), /* T560-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5013), /* T580-chr */
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CH_PCI_ID_TABLE_FENTRY(0x5014), /* T580-so */
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CH_PCI_ID_TABLE_FENTRY(0x5015), /* T502-bt */
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CH_PCI_ID_TABLE_FENTRY(0x5080), /* Custom T540-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5081), /* Custom T540-LL-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5082), /* Custom T504-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5083), /* Custom T540-LP-CR */
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CH_PCI_ID_TABLE_FENTRY(0x5084), /* Custom T580-cr */
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CH_PCI_ID_TABLE_FENTRY(0x5085), /* Custom 3x T580-CR */
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CH_PCI_ID_TABLE_FENTRY(0x5086), /* Custom 2x T580-CR */
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CH_PCI_ID_TABLE_FENTRY(0x5087), /* Custom T580-CR */
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CH_PCI_ID_TABLE_FENTRY(0x5088), /* Custom T570-CR */
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CH_PCI_DEVICE_ID_TABLE_DEFINE_END;
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#endif /* CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN */
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#endif /* __T4_PCI_ID_TBL_H__ */
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@ -2908,67 +2908,18 @@ static void cxgb4vf_pci_shutdown(struct pci_dev *pdev)
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pci_set_drvdata(pdev, NULL);
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}
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/*
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* PCI Device registration data structures.
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/* Macros needed to support the PCI Device ID Table ...
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*/
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#define CH_DEVICE(devid) \
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{ PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }
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#define CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN \
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static struct pci_device_id cxgb4vf_pci_tbl[] = {
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#define CH_PCI_DEVICE_ID_FUNCTION 0x8
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static const struct pci_device_id cxgb4vf_pci_tbl[] = {
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CH_DEVICE(0xb000), /* PE10K FPGA */
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CH_DEVICE(0x4801), /* T420-cr */
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CH_DEVICE(0x4802), /* T422-cr */
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CH_DEVICE(0x4803), /* T440-cr */
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CH_DEVICE(0x4804), /* T420-bch */
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CH_DEVICE(0x4805), /* T440-bch */
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CH_DEVICE(0x4806), /* T460-ch */
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CH_DEVICE(0x4807), /* T420-so */
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CH_DEVICE(0x4808), /* T420-cx */
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CH_DEVICE(0x4809), /* T420-bt */
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CH_DEVICE(0x480a), /* T404-bt */
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CH_DEVICE(0x480d), /* T480-cr */
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CH_DEVICE(0x480e), /* T440-lp-cr */
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CH_DEVICE(0x4880),
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CH_DEVICE(0x4881),
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CH_DEVICE(0x4882),
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CH_DEVICE(0x4883),
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CH_DEVICE(0x4884),
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CH_DEVICE(0x4885),
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CH_DEVICE(0x4886),
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CH_DEVICE(0x4887),
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CH_DEVICE(0x4888),
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CH_DEVICE(0x5801), /* T520-cr */
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CH_DEVICE(0x5802), /* T522-cr */
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CH_DEVICE(0x5803), /* T540-cr */
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CH_DEVICE(0x5804), /* T520-bch */
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CH_DEVICE(0x5805), /* T540-bch */
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CH_DEVICE(0x5806), /* T540-ch */
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CH_DEVICE(0x5807), /* T520-so */
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CH_DEVICE(0x5808), /* T520-cx */
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CH_DEVICE(0x5809), /* T520-bt */
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CH_DEVICE(0x580a), /* T504-bt */
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CH_DEVICE(0x580b), /* T520-sr */
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CH_DEVICE(0x580c), /* T504-bt */
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CH_DEVICE(0x580d), /* T580-cr */
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CH_DEVICE(0x580e), /* T540-lp-cr */
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CH_DEVICE(0x580f), /* Amsterdam */
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CH_DEVICE(0x5810), /* T580-lp-cr */
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CH_DEVICE(0x5811), /* T520-lp-cr */
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CH_DEVICE(0x5812), /* T560-cr */
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CH_DEVICE(0x5813), /* T580-cr */
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CH_DEVICE(0x5814), /* T580-so-cr */
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CH_DEVICE(0x5815), /* T502-bt */
|
||||
CH_DEVICE(0x5880),
|
||||
CH_DEVICE(0x5881),
|
||||
CH_DEVICE(0x5882),
|
||||
CH_DEVICE(0x5883),
|
||||
CH_DEVICE(0x5884),
|
||||
CH_DEVICE(0x5885),
|
||||
CH_DEVICE(0x5886),
|
||||
CH_DEVICE(0x5887),
|
||||
CH_DEVICE(0x5888),
|
||||
{ 0, }
|
||||
};
|
||||
#define CH_PCI_ID_TABLE_ENTRY(devid) \
|
||||
{ PCI_VDEVICE(CHELSIO, (devid)), 0 }
|
||||
|
||||
#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END { 0, } }
|
||||
|
||||
#include "../cxgb4/t4_pci_id_tbl.h"
|
||||
|
||||
MODULE_DESCRIPTION(DRV_DESC);
|
||||
MODULE_AUTHOR("Chelsio Communications");
|
||||
|
|
|
|||
|
|
@ -36,60 +36,13 @@
|
|||
|
||||
#include "csio_defs.h"
|
||||
|
||||
/* FCoE device IDs for T4 */
|
||||
#define CSIO_DEVID_T440DBG_FCOE 0x4600
|
||||
#define CSIO_DEVID_T420CR_FCOE 0x4601
|
||||
#define CSIO_DEVID_T422CR_FCOE 0x4602
|
||||
#define CSIO_DEVID_T440CR_FCOE 0x4603
|
||||
#define CSIO_DEVID_T420BCH_FCOE 0x4604
|
||||
#define CSIO_DEVID_T440BCH_FCOE 0x4605
|
||||
#define CSIO_DEVID_T440CH_FCOE 0x4606
|
||||
#define CSIO_DEVID_T420SO_FCOE 0x4607
|
||||
#define CSIO_DEVID_T420CX_FCOE 0x4608
|
||||
#define CSIO_DEVID_T420BT_FCOE 0x4609
|
||||
#define CSIO_DEVID_T404BT_FCOE 0x460A
|
||||
#define CSIO_DEVID_B420_FCOE 0x460B
|
||||
#define CSIO_DEVID_B404_FCOE 0x460C
|
||||
#define CSIO_DEVID_T480CR_FCOE 0x460D
|
||||
#define CSIO_DEVID_T440LPCR_FCOE 0x460E
|
||||
#define CSIO_DEVID_AMSTERDAM_T4_FCOE 0x460F
|
||||
#define CSIO_DEVID_HUAWEI_T480_FCOE 0x4680
|
||||
#define CSIO_DEVID_HUAWEI_T440_FCOE 0x4681
|
||||
#define CSIO_DEVID_HUAWEI_STG310_FCOE 0x4682
|
||||
#define CSIO_DEVID_ACROMAG_XMC_XAUI 0x4683
|
||||
#define CSIO_DEVID_ACROMAG_XMC_SFP_FCOE 0x4684
|
||||
#define CSIO_DEVID_QUANTA_MEZZ_SFP_FCOE 0x4685
|
||||
#define CSIO_DEVID_HUAWEI_10GT_FCOE 0x4686
|
||||
#define CSIO_DEVID_HUAWEI_T440_TOE_FCOE 0x4687
|
||||
|
||||
/* FCoE device IDs for T5 */
|
||||
#define CSIO_DEVID_T580DBG_FCOE 0x5600
|
||||
#define CSIO_DEVID_T520CR_FCOE 0x5601
|
||||
#define CSIO_DEVID_T522CR_FCOE 0x5602
|
||||
#define CSIO_DEVID_T540CR_FCOE 0x5603
|
||||
#define CSIO_DEVID_T520BCH_FCOE 0x5604
|
||||
#define CSIO_DEVID_T540BCH_FCOE 0x5605
|
||||
#define CSIO_DEVID_T540CH_FCOE 0x5606
|
||||
#define CSIO_DEVID_T520SO_FCOE 0x5607
|
||||
#define CSIO_DEVID_T520CX_FCOE 0x5608
|
||||
#define CSIO_DEVID_T520BT_FCOE 0x5609
|
||||
#define CSIO_DEVID_T504BT_FCOE 0x560A
|
||||
#define CSIO_DEVID_B520_FCOE 0x560B
|
||||
#define CSIO_DEVID_B504_FCOE 0x560C
|
||||
#define CSIO_DEVID_T580CR2_FCOE 0x560D
|
||||
#define CSIO_DEVID_T540LPCR_FCOE 0x560E
|
||||
#define CSIO_DEVID_AMSTERDAM_T5_FCOE 0x560F
|
||||
#define CSIO_DEVID_T580LPCR_FCOE 0x5610
|
||||
#define CSIO_DEVID_T520LLCR_FCOE 0x5611
|
||||
#define CSIO_DEVID_T560CR_FCOE 0x5612
|
||||
#define CSIO_DEVID_T580CR_FCOE 0x5613
|
||||
|
||||
/* Define MACRO values */
|
||||
#define CSIO_HW_T4 0x4000
|
||||
#define CSIO_T4_FCOE_ASIC 0x4600
|
||||
#define CSIO_HW_T5 0x5000
|
||||
#define CSIO_T5_FCOE_ASIC 0x5600
|
||||
#define CSIO_HW_CHIP_MASK 0xF000
|
||||
|
||||
#define T4_REGMAP_SIZE (160 * 1024)
|
||||
#define T5_REGMAP_SIZE (332 * 1024)
|
||||
#define FW_FNAME_T4 "cxgb4/t4fw.bin"
|
||||
|
|
|
|||
|
|
@ -955,6 +955,10 @@ static int csio_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
struct csio_hw *hw;
|
||||
struct csio_lnode *ln;
|
||||
|
||||
/* probe only T5 cards */
|
||||
if (!csio_is_t5((pdev->device & CSIO_HW_CHIP_MASK)))
|
||||
return -ENODEV;
|
||||
|
||||
rv = csio_pci_init(pdev, &bars);
|
||||
if (rv)
|
||||
goto err;
|
||||
|
|
@ -1167,53 +1171,21 @@ static struct pci_error_handlers csio_err_handler = {
|
|||
.resume = csio_pci_resume,
|
||||
};
|
||||
|
||||
static const struct pci_device_id csio_pci_tbl[] = {
|
||||
CSIO_DEVICE(CSIO_DEVID_T440DBG_FCOE, 0), /* T4 DEBUG FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T420CR_FCOE, 0), /* T420CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T422CR_FCOE, 0), /* T422CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T440CR_FCOE, 0), /* T440CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T420BCH_FCOE, 0), /* T420BCH FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T440BCH_FCOE, 0), /* T440BCH FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T440CH_FCOE, 0), /* T440CH FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T420SO_FCOE, 0), /* T420SO FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T420CX_FCOE, 0), /* T420CX FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T420BT_FCOE, 0), /* T420BT FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T404BT_FCOE, 0), /* T404BT FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_B420_FCOE, 0), /* B420 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_B404_FCOE, 0), /* B404 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T480CR_FCOE, 0), /* T480 CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T440LPCR_FCOE, 0), /* T440 LP-CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_AMSTERDAM_T4_FCOE, 0), /* AMSTERDAM T4 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_HUAWEI_T480_FCOE, 0), /* HUAWEI T480 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_HUAWEI_T440_FCOE, 0), /* HUAWEI T440 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_HUAWEI_STG310_FCOE, 0), /* HUAWEI STG FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_ACROMAG_XMC_XAUI, 0), /* ACROMAG XAUI FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_QUANTA_MEZZ_SFP_FCOE, 0),/* QUANTA MEZZ FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_HUAWEI_10GT_FCOE, 0), /* HUAWEI 10GT FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_HUAWEI_T440_TOE_FCOE, 0),/* HUAWEI T4 TOE FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T580DBG_FCOE, 0), /* T5 DEBUG FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T520CR_FCOE, 0), /* T520CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T522CR_FCOE, 0), /* T522CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T540CR_FCOE, 0), /* T540CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T520BCH_FCOE, 0), /* T520BCH FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T540BCH_FCOE, 0), /* T540BCH FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T540CH_FCOE, 0), /* T540CH FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T520SO_FCOE, 0), /* T520SO FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T520CX_FCOE, 0), /* T520CX FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T520BT_FCOE, 0), /* T520BT FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T504BT_FCOE, 0), /* T504BT FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_B520_FCOE, 0), /* B520 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_B504_FCOE, 0), /* B504 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T580CR2_FCOE, 0), /* T580 CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T540LPCR_FCOE, 0), /* T540 LP-CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_AMSTERDAM_T5_FCOE, 0), /* AMSTERDAM T5 FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T580LPCR_FCOE, 0), /* T580 LP-CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T520LLCR_FCOE, 0), /* T520 LL-CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T560CR_FCOE, 0), /* T560 CR FCOE */
|
||||
CSIO_DEVICE(CSIO_DEVID_T580CR_FCOE, 0), /* T580 CR FCOE */
|
||||
{ 0, 0, 0, 0, 0, 0, 0 }
|
||||
};
|
||||
/*
|
||||
* Macros needed to support the PCI Device ID Table ...
|
||||
*/
|
||||
#define CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN \
|
||||
static struct pci_device_id csio_pci_tbl[] = {
|
||||
/* Define for iSCSI uses PF5, FCoE uses PF6 */
|
||||
#define CH_PCI_DEVICE_ID_FUNCTION 0x5
|
||||
#define CH_PCI_DEVICE_ID_FUNCTION2 0x6
|
||||
|
||||
#define CH_PCI_ID_TABLE_ENTRY(devid) \
|
||||
{ PCI_VDEVICE(CHELSIO, (devid)), 0 }
|
||||
|
||||
#define CH_PCI_DEVICE_ID_TABLE_DEFINE_END { 0, } }
|
||||
|
||||
#include "t4_pci_id_tbl.h"
|
||||
|
||||
static struct pci_driver csio_pci_driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
|
|
|
|||
Loading…
Reference in New Issue