KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler
Add a handler for writing the guest's view of the ICC_DIR_EL1 register, performing the deactivation of an interrupt if EOImode is set ot 1. Tested-by: Alexander Graf <agraf@suse.de> Acked-by: David Daney <david.daney@cavium.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <cdall@linaro.org>
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@ -652,6 +652,30 @@ static void __hyp_text __vgic_v3_bump_eoicount(void)
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write_gicreg(hcr, ICH_HCR_EL2);
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write_gicreg(hcr, ICH_HCR_EL2);
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}
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}
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static void __hyp_text __vgic_v3_write_dir(struct kvm_vcpu *vcpu,
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u32 vmcr, int rt)
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{
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u32 vid = vcpu_get_reg(vcpu, rt);
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u64 lr_val;
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int lr;
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/* EOImode == 0, nothing to be done here */
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if (!(vmcr & ICH_VMCR_EOIM_MASK))
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return;
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/* No deactivate to be performed on an LPI */
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if (vid >= VGIC_MIN_LPI)
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return;
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lr = __vgic_v3_find_active_lr(vcpu, vid, &lr_val);
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if (lr == -1) {
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__vgic_v3_bump_eoicount();
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return;
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}
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__vgic_v3_clear_active_lr(lr, lr_val);
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}
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static void __hyp_text __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
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static void __hyp_text __vgic_v3_write_eoir(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
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{
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{
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u32 vid = vcpu_get_reg(vcpu, rt);
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u32 vid = vcpu_get_reg(vcpu, rt);
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@ -946,6 +970,9 @@ int __hyp_text __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu)
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else
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else
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fn = __vgic_v3_write_bpr0;
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fn = __vgic_v3_write_bpr0;
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break;
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break;
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case SYS_ICC_DIR_EL1:
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fn = __vgic_v3_write_dir;
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break;
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default:
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default:
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return 0;
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return 0;
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}
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}
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