Merge branch 'pinmux-dt' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/dt
This branch enables device tree bindings for the CSR Prima pin control subsystem. All patches acked by Linus W (pinctrl maintainer). * 'pinmux-dt' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel: pinctrl: sirf: add DT-binding pinmux mapping support ARM: PRIMA2: rename prima2-cb.dts to prima2.dtsi as it only has SoC features ARM: PRIMA2: add missing interrupts property for pinctrl node + sync to Linux 3.6-rc4
This commit is contained in:
commit
402efdb48d
|
@ -3,15 +3,21 @@
|
||||||
biodoc.txt
|
biodoc.txt
|
||||||
- Notes on the Generic Block Layer Rewrite in Linux 2.5
|
- Notes on the Generic Block Layer Rewrite in Linux 2.5
|
||||||
capability.txt
|
capability.txt
|
||||||
- Generic Block Device Capability (/sys/block/<disk>/capability)
|
- Generic Block Device Capability (/sys/block/<device>/capability)
|
||||||
|
cfq-iosched.txt
|
||||||
|
- CFQ IO scheduler tunables
|
||||||
|
data-integrity.txt
|
||||||
|
- Block data integrity
|
||||||
deadline-iosched.txt
|
deadline-iosched.txt
|
||||||
- Deadline IO scheduler tunables
|
- Deadline IO scheduler tunables
|
||||||
ioprio.txt
|
ioprio.txt
|
||||||
- Block io priorities (in CFQ scheduler)
|
- Block io priorities (in CFQ scheduler)
|
||||||
|
queue-sysfs.txt
|
||||||
|
- Queue's sysfs entries
|
||||||
request.txt
|
request.txt
|
||||||
- The members of struct request (in include/linux/blkdev.h)
|
- The members of struct request (in include/linux/blkdev.h)
|
||||||
stat.txt
|
stat.txt
|
||||||
- Block layer statistics in /sys/block/<dev>/stat
|
- Block layer statistics in /sys/block/<device>/stat
|
||||||
switching-sched.txt
|
switching-sched.txt
|
||||||
- Switching I/O schedulers at runtime
|
- Switching I/O schedulers at runtime
|
||||||
writeback_cache_control.txt
|
writeback_cache_control.txt
|
||||||
|
|
|
@ -1,3 +1,14 @@
|
||||||
|
CFQ (Complete Fairness Queueing)
|
||||||
|
===============================
|
||||||
|
|
||||||
|
The main aim of CFQ scheduler is to provide a fair allocation of the disk
|
||||||
|
I/O bandwidth for all the processes which requests an I/O operation.
|
||||||
|
|
||||||
|
CFQ maintains the per process queue for the processes which request I/O
|
||||||
|
operation(syncronous requests). In case of asynchronous requests, all the
|
||||||
|
requests from all the processes are batched together according to their
|
||||||
|
process's I/O priority.
|
||||||
|
|
||||||
CFQ ioscheduler tunables
|
CFQ ioscheduler tunables
|
||||||
========================
|
========================
|
||||||
|
|
||||||
|
@ -25,6 +36,72 @@ there are multiple spindles behind single LUN (Host based hardware RAID
|
||||||
controller or for storage arrays), setting slice_idle=0 might end up in better
|
controller or for storage arrays), setting slice_idle=0 might end up in better
|
||||||
throughput and acceptable latencies.
|
throughput and acceptable latencies.
|
||||||
|
|
||||||
|
back_seek_max
|
||||||
|
-------------
|
||||||
|
This specifies, given in Kbytes, the maximum "distance" for backward seeking.
|
||||||
|
The distance is the amount of space from the current head location to the
|
||||||
|
sectors that are backward in terms of distance.
|
||||||
|
|
||||||
|
This parameter allows the scheduler to anticipate requests in the "backward"
|
||||||
|
direction and consider them as being the "next" if they are within this
|
||||||
|
distance from the current head location.
|
||||||
|
|
||||||
|
back_seek_penalty
|
||||||
|
-----------------
|
||||||
|
This parameter is used to compute the cost of backward seeking. If the
|
||||||
|
backward distance of request is just 1/back_seek_penalty from a "front"
|
||||||
|
request, then the seeking cost of two requests is considered equivalent.
|
||||||
|
|
||||||
|
So scheduler will not bias toward one or the other request (otherwise scheduler
|
||||||
|
will bias toward front request). Default value of back_seek_penalty is 2.
|
||||||
|
|
||||||
|
fifo_expire_async
|
||||||
|
-----------------
|
||||||
|
This parameter is used to set the timeout of asynchronous requests. Default
|
||||||
|
value of this is 248ms.
|
||||||
|
|
||||||
|
fifo_expire_sync
|
||||||
|
----------------
|
||||||
|
This parameter is used to set the timeout of synchronous requests. Default
|
||||||
|
value of this is 124ms. In case to favor synchronous requests over asynchronous
|
||||||
|
one, this value should be decreased relative to fifo_expire_async.
|
||||||
|
|
||||||
|
slice_async
|
||||||
|
-----------
|
||||||
|
This parameter is same as of slice_sync but for asynchronous queue. The
|
||||||
|
default value is 40ms.
|
||||||
|
|
||||||
|
slice_async_rq
|
||||||
|
--------------
|
||||||
|
This parameter is used to limit the dispatching of asynchronous request to
|
||||||
|
device request queue in queue's slice time. The maximum number of request that
|
||||||
|
are allowed to be dispatched also depends upon the io priority. Default value
|
||||||
|
for this is 2.
|
||||||
|
|
||||||
|
slice_sync
|
||||||
|
----------
|
||||||
|
When a queue is selected for execution, the queues IO requests are only
|
||||||
|
executed for a certain amount of time(time_slice) before switching to another
|
||||||
|
queue. This parameter is used to calculate the time slice of synchronous
|
||||||
|
queue.
|
||||||
|
|
||||||
|
time_slice is computed using the below equation:-
|
||||||
|
time_slice = slice_sync + (slice_sync/5 * (4 - prio)). To increase the
|
||||||
|
time_slice of synchronous queue, increase the value of slice_sync. Default
|
||||||
|
value is 100ms.
|
||||||
|
|
||||||
|
quantum
|
||||||
|
-------
|
||||||
|
This specifies the number of request dispatched to the device queue. In a
|
||||||
|
queue's time slice, a request will not be dispatched if the number of request
|
||||||
|
in the device exceeds this parameter. This parameter is used for synchronous
|
||||||
|
request.
|
||||||
|
|
||||||
|
In case of storage with several disk, this setting can limit the parallel
|
||||||
|
processing of request. Therefore, increasing the value can imporve the
|
||||||
|
performace although this can cause the latency of some I/O to increase due
|
||||||
|
to more number of requests.
|
||||||
|
|
||||||
CFQ IOPS Mode for group scheduling
|
CFQ IOPS Mode for group scheduling
|
||||||
===================================
|
===================================
|
||||||
Basic CFQ design is to provide priority based time slices. Higher priority
|
Basic CFQ design is to provide priority based time slices. Higher priority
|
||||||
|
|
|
@ -9,20 +9,71 @@ These files are the ones found in the /sys/block/xxx/queue/ directory.
|
||||||
Files denoted with a RO postfix are readonly and the RW postfix means
|
Files denoted with a RO postfix are readonly and the RW postfix means
|
||||||
read-write.
|
read-write.
|
||||||
|
|
||||||
|
add_random (RW)
|
||||||
|
----------------
|
||||||
|
This file allows to trun off the disk entropy contribution. Default
|
||||||
|
value of this file is '1'(on).
|
||||||
|
|
||||||
|
discard_granularity (RO)
|
||||||
|
-----------------------
|
||||||
|
This shows the size of internal allocation of the device in bytes, if
|
||||||
|
reported by the device. A value of '0' means device does not support
|
||||||
|
the discard functionality.
|
||||||
|
|
||||||
|
discard_max_bytes (RO)
|
||||||
|
----------------------
|
||||||
|
Devices that support discard functionality may have internal limits on
|
||||||
|
the number of bytes that can be trimmed or unmapped in a single operation.
|
||||||
|
The discard_max_bytes parameter is set by the device driver to the maximum
|
||||||
|
number of bytes that can be discarded in a single operation. Discard
|
||||||
|
requests issued to the device must not exceed this limit. A discard_max_bytes
|
||||||
|
value of 0 means that the device does not support discard functionality.
|
||||||
|
|
||||||
|
discard_zeroes_data (RO)
|
||||||
|
------------------------
|
||||||
|
When read, this file will show if the discarded block are zeroed by the
|
||||||
|
device or not. If its value is '1' the blocks are zeroed otherwise not.
|
||||||
|
|
||||||
hw_sector_size (RO)
|
hw_sector_size (RO)
|
||||||
-------------------
|
-------------------
|
||||||
This is the hardware sector size of the device, in bytes.
|
This is the hardware sector size of the device, in bytes.
|
||||||
|
|
||||||
|
iostats (RW)
|
||||||
|
-------------
|
||||||
|
This file is used to control (on/off) the iostats accounting of the
|
||||||
|
disk.
|
||||||
|
|
||||||
|
logical_block_size (RO)
|
||||||
|
-----------------------
|
||||||
|
This is the logcal block size of the device, in bytes.
|
||||||
|
|
||||||
max_hw_sectors_kb (RO)
|
max_hw_sectors_kb (RO)
|
||||||
----------------------
|
----------------------
|
||||||
This is the maximum number of kilobytes supported in a single data transfer.
|
This is the maximum number of kilobytes supported in a single data transfer.
|
||||||
|
|
||||||
|
max_integrity_segments (RO)
|
||||||
|
---------------------------
|
||||||
|
When read, this file shows the max limit of integrity segments as
|
||||||
|
set by block layer which a hardware controller can handle.
|
||||||
|
|
||||||
max_sectors_kb (RW)
|
max_sectors_kb (RW)
|
||||||
-------------------
|
-------------------
|
||||||
This is the maximum number of kilobytes that the block layer will allow
|
This is the maximum number of kilobytes that the block layer will allow
|
||||||
for a filesystem request. Must be smaller than or equal to the maximum
|
for a filesystem request. Must be smaller than or equal to the maximum
|
||||||
size allowed by the hardware.
|
size allowed by the hardware.
|
||||||
|
|
||||||
|
max_segments (RO)
|
||||||
|
-----------------
|
||||||
|
Maximum number of segments of the device.
|
||||||
|
|
||||||
|
max_segment_size (RO)
|
||||||
|
---------------------
|
||||||
|
Maximum segment size of the device.
|
||||||
|
|
||||||
|
minimum_io_size (RO)
|
||||||
|
--------------------
|
||||||
|
This is the smallest preferred io size reported by the device.
|
||||||
|
|
||||||
nomerges (RW)
|
nomerges (RW)
|
||||||
-------------
|
-------------
|
||||||
This enables the user to disable the lookup logic involved with IO
|
This enables the user to disable the lookup logic involved with IO
|
||||||
|
@ -45,11 +96,24 @@ per-block-cgroup request pool. IOW, if there are N block cgroups,
|
||||||
each request queue may have upto N request pools, each independently
|
each request queue may have upto N request pools, each independently
|
||||||
regulated by nr_requests.
|
regulated by nr_requests.
|
||||||
|
|
||||||
|
optimal_io_size (RO)
|
||||||
|
--------------------
|
||||||
|
This is the optimal io size reported by the device.
|
||||||
|
|
||||||
|
physical_block_size (RO)
|
||||||
|
------------------------
|
||||||
|
This is the physical block size of device, in bytes.
|
||||||
|
|
||||||
read_ahead_kb (RW)
|
read_ahead_kb (RW)
|
||||||
------------------
|
------------------
|
||||||
Maximum number of kilobytes to read-ahead for filesystems on this block
|
Maximum number of kilobytes to read-ahead for filesystems on this block
|
||||||
device.
|
device.
|
||||||
|
|
||||||
|
rotational (RW)
|
||||||
|
---------------
|
||||||
|
This file is used to stat if the device is of rotational type or
|
||||||
|
non-rotational type.
|
||||||
|
|
||||||
rq_affinity (RW)
|
rq_affinity (RW)
|
||||||
----------------
|
----------------
|
||||||
If this option is '1', the block layer will migrate request completions to the
|
If this option is '1', the block layer will migrate request completions to the
|
||||||
|
|
|
@ -10,8 +10,8 @@ Required properties:
|
||||||
- compatible : Should be "fsl,<chip>-esdhc"
|
- compatible : Should be "fsl,<chip>-esdhc"
|
||||||
|
|
||||||
Optional properties:
|
Optional properties:
|
||||||
- fsl,cd-internal : Indicate to use controller internal card detection
|
- fsl,cd-controller : Indicate to use controller internal card detection
|
||||||
- fsl,wp-internal : Indicate to use controller internal write protection
|
- fsl,wp-controller : Indicate to use controller internal write protection
|
||||||
|
|
||||||
Examples:
|
Examples:
|
||||||
|
|
||||||
|
@ -19,8 +19,8 @@ esdhc@70004000 {
|
||||||
compatible = "fsl,imx51-esdhc";
|
compatible = "fsl,imx51-esdhc";
|
||||||
reg = <0x70004000 0x4000>;
|
reg = <0x70004000 0x4000>;
|
||||||
interrupts = <1>;
|
interrupts = <1>;
|
||||||
fsl,cd-internal;
|
fsl,cd-controller;
|
||||||
fsl,wp-internal;
|
fsl,wp-controller;
|
||||||
};
|
};
|
||||||
|
|
||||||
esdhc@70008000 {
|
esdhc@70008000 {
|
||||||
|
|
|
@ -31,7 +31,7 @@ static void keep_alive(void)
|
||||||
* or "-e" to enable the card.
|
* or "-e" to enable the card.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
void term(int sig)
|
static void term(int sig)
|
||||||
{
|
{
|
||||||
close(fd);
|
close(fd);
|
||||||
fprintf(stderr, "Stopping watchdog ticks...\n");
|
fprintf(stderr, "Stopping watchdog ticks...\n");
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 3
|
VERSION = 3
|
||||||
PATCHLEVEL = 6
|
PATCHLEVEL = 6
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc3
|
EXTRAVERSION = -rc4
|
||||||
NAME = Saber-toothed Squirrel
|
NAME = Saber-toothed Squirrel
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
@ -2144,6 +2144,7 @@ source "drivers/cpufreq/Kconfig"
|
||||||
config CPU_FREQ_IMX
|
config CPU_FREQ_IMX
|
||||||
tristate "CPUfreq driver for i.MX CPUs"
|
tristate "CPUfreq driver for i.MX CPUs"
|
||||||
depends on ARCH_MXC && CPU_FREQ
|
depends on ARCH_MXC && CPU_FREQ
|
||||||
|
select CPU_FREQ_TABLE
|
||||||
help
|
help
|
||||||
This enables the CPUfreq driver for i.MX CPUs.
|
This enables the CPUfreq driver for i.MX CPUs.
|
||||||
|
|
||||||
|
|
|
@ -154,5 +154,10 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
ti,hwmods = "i2c3";
|
ti,hwmods = "i2c3";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
wdt2: wdt@44e35000 {
|
||||||
|
compatible = "ti,omap3-wdt";
|
||||||
|
ti,hwmods = "wd_timer2";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
@ -25,8 +25,8 @@
|
||||||
aips@70000000 { /* aips-1 */
|
aips@70000000 { /* aips-1 */
|
||||||
spba@70000000 {
|
spba@70000000 {
|
||||||
esdhc@70004000 { /* ESDHC1 */
|
esdhc@70004000 { /* ESDHC1 */
|
||||||
fsl,cd-internal;
|
fsl,cd-controller;
|
||||||
fsl,wp-internal;
|
fsl,wp-controller;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -41,9 +41,13 @@
|
||||||
};
|
};
|
||||||
power-blue {
|
power-blue {
|
||||||
label = "power:blue";
|
label = "power:blue";
|
||||||
gpios = <&gpio1 11 0>;
|
gpios = <&gpio1 10 0>;
|
||||||
linux,default-trigger = "timer";
|
linux,default-trigger = "timer";
|
||||||
};
|
};
|
||||||
|
power-red {
|
||||||
|
label = "power:red";
|
||||||
|
gpios = <&gpio1 11 0>;
|
||||||
|
};
|
||||||
usb1 {
|
usb1 {
|
||||||
label = "usb1:blue";
|
label = "usb1:blue";
|
||||||
gpios = <&gpio1 12 0>;
|
gpios = <&gpio1 12 0>;
|
||||||
|
|
|
@ -1,424 +0,0 @@
|
||||||
/dts-v1/;
|
|
||||||
/ {
|
|
||||||
model = "SiRF Prima2 eVB";
|
|
||||||
compatible = "sirf,prima2-cb", "sirf,prima2";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
interrupt-parent = <&intc>;
|
|
||||||
|
|
||||||
memory {
|
|
||||||
reg = <0x00000000 0x20000000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
chosen {
|
|
||||||
bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
|
|
||||||
linux,stdout-path = &uart1;
|
|
||||||
};
|
|
||||||
|
|
||||||
cpus {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
cpu@0 {
|
|
||||||
reg = <0x0>;
|
|
||||||
d-cache-line-size = <32>;
|
|
||||||
i-cache-line-size = <32>;
|
|
||||||
d-cache-size = <32768>;
|
|
||||||
i-cache-size = <32768>;
|
|
||||||
/* from bootloader */
|
|
||||||
timebase-frequency = <0>;
|
|
||||||
bus-frequency = <0>;
|
|
||||||
clock-frequency = <0>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
axi {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0x40000000 0x40000000 0x80000000>;
|
|
||||||
|
|
||||||
l2-cache-controller@80040000 {
|
|
||||||
compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
|
|
||||||
reg = <0x80040000 0x1000>;
|
|
||||||
interrupts = <59>;
|
|
||||||
arm,tag-latency = <1 1 1>;
|
|
||||||
arm,data-latency = <1 1 1>;
|
|
||||||
arm,filter-ranges = <0 0x40000000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
intc: interrupt-controller@80020000 {
|
|
||||||
#interrupt-cells = <1>;
|
|
||||||
interrupt-controller;
|
|
||||||
compatible = "sirf,prima2-intc";
|
|
||||||
reg = <0x80020000 0x1000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sys-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0x88000000 0x88000000 0x40000>;
|
|
||||||
|
|
||||||
clock-controller@88000000 {
|
|
||||||
compatible = "sirf,prima2-clkc";
|
|
||||||
reg = <0x88000000 0x1000>;
|
|
||||||
interrupts = <3>;
|
|
||||||
};
|
|
||||||
|
|
||||||
reset-controller@88010000 {
|
|
||||||
compatible = "sirf,prima2-rstc";
|
|
||||||
reg = <0x88010000 0x1000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
rsc-controller@88020000 {
|
|
||||||
compatible = "sirf,prima2-rsc";
|
|
||||||
reg = <0x88020000 0x1000>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
mem-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0x90000000 0x90000000 0x10000>;
|
|
||||||
|
|
||||||
memory-controller@90000000 {
|
|
||||||
compatible = "sirf,prima2-memc";
|
|
||||||
reg = <0x90000000 0x10000>;
|
|
||||||
interrupts = <27>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
disp-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0x90010000 0x90010000 0x30000>;
|
|
||||||
|
|
||||||
display@90010000 {
|
|
||||||
compatible = "sirf,prima2-lcd";
|
|
||||||
reg = <0x90010000 0x20000>;
|
|
||||||
interrupts = <30>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vpp@90020000 {
|
|
||||||
compatible = "sirf,prima2-vpp";
|
|
||||||
reg = <0x90020000 0x10000>;
|
|
||||||
interrupts = <31>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
graphics-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0x98000000 0x98000000 0x8000000>;
|
|
||||||
|
|
||||||
graphics@98000000 {
|
|
||||||
compatible = "powervr,sgx531";
|
|
||||||
reg = <0x98000000 0x8000000>;
|
|
||||||
interrupts = <6>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
multimedia-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0xa0000000 0xa0000000 0x8000000>;
|
|
||||||
|
|
||||||
multimedia@a0000000 {
|
|
||||||
compatible = "sirf,prima2-video-codec";
|
|
||||||
reg = <0xa0000000 0x8000000>;
|
|
||||||
interrupts = <5>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
dsp-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0xa8000000 0xa8000000 0x2000000>;
|
|
||||||
|
|
||||||
dspif@a8000000 {
|
|
||||||
compatible = "sirf,prima2-dspif";
|
|
||||||
reg = <0xa8000000 0x10000>;
|
|
||||||
interrupts = <9>;
|
|
||||||
};
|
|
||||||
|
|
||||||
gps@a8010000 {
|
|
||||||
compatible = "sirf,prima2-gps";
|
|
||||||
reg = <0xa8010000 0x10000>;
|
|
||||||
interrupts = <7>;
|
|
||||||
};
|
|
||||||
|
|
||||||
dsp@a9000000 {
|
|
||||||
compatible = "sirf,prima2-dsp";
|
|
||||||
reg = <0xa9000000 0x1000000>;
|
|
||||||
interrupts = <8>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
peri-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0xb0000000 0xb0000000 0x180000>;
|
|
||||||
|
|
||||||
timer@b0020000 {
|
|
||||||
compatible = "sirf,prima2-tick";
|
|
||||||
reg = <0xb0020000 0x1000>;
|
|
||||||
interrupts = <0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
nand@b0030000 {
|
|
||||||
compatible = "sirf,prima2-nand";
|
|
||||||
reg = <0xb0030000 0x10000>;
|
|
||||||
interrupts = <41>;
|
|
||||||
};
|
|
||||||
|
|
||||||
audio@b0040000 {
|
|
||||||
compatible = "sirf,prima2-audio";
|
|
||||||
reg = <0xb0040000 0x10000>;
|
|
||||||
interrupts = <35>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart0: uart@b0050000 {
|
|
||||||
cell-index = <0>;
|
|
||||||
compatible = "sirf,prima2-uart";
|
|
||||||
reg = <0xb0050000 0x10000>;
|
|
||||||
interrupts = <17>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart1: uart@b0060000 {
|
|
||||||
cell-index = <1>;
|
|
||||||
compatible = "sirf,prima2-uart";
|
|
||||||
reg = <0xb0060000 0x10000>;
|
|
||||||
interrupts = <18>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart2: uart@b0070000 {
|
|
||||||
cell-index = <2>;
|
|
||||||
compatible = "sirf,prima2-uart";
|
|
||||||
reg = <0xb0070000 0x10000>;
|
|
||||||
interrupts = <19>;
|
|
||||||
};
|
|
||||||
|
|
||||||
usp0: usp@b0080000 {
|
|
||||||
cell-index = <0>;
|
|
||||||
compatible = "sirf,prima2-usp";
|
|
||||||
reg = <0xb0080000 0x10000>;
|
|
||||||
interrupts = <20>;
|
|
||||||
};
|
|
||||||
|
|
||||||
usp1: usp@b0090000 {
|
|
||||||
cell-index = <1>;
|
|
||||||
compatible = "sirf,prima2-usp";
|
|
||||||
reg = <0xb0090000 0x10000>;
|
|
||||||
interrupts = <21>;
|
|
||||||
};
|
|
||||||
|
|
||||||
usp2: usp@b00a0000 {
|
|
||||||
cell-index = <2>;
|
|
||||||
compatible = "sirf,prima2-usp";
|
|
||||||
reg = <0xb00a0000 0x10000>;
|
|
||||||
interrupts = <22>;
|
|
||||||
};
|
|
||||||
|
|
||||||
dmac0: dma-controller@b00b0000 {
|
|
||||||
cell-index = <0>;
|
|
||||||
compatible = "sirf,prima2-dmac";
|
|
||||||
reg = <0xb00b0000 0x10000>;
|
|
||||||
interrupts = <12>;
|
|
||||||
};
|
|
||||||
|
|
||||||
dmac1: dma-controller@b0160000 {
|
|
||||||
cell-index = <1>;
|
|
||||||
compatible = "sirf,prima2-dmac";
|
|
||||||
reg = <0xb0160000 0x10000>;
|
|
||||||
interrupts = <13>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vip@b00C0000 {
|
|
||||||
compatible = "sirf,prima2-vip";
|
|
||||||
reg = <0xb00C0000 0x10000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
spi0: spi@b00d0000 {
|
|
||||||
cell-index = <0>;
|
|
||||||
compatible = "sirf,prima2-spi";
|
|
||||||
reg = <0xb00d0000 0x10000>;
|
|
||||||
interrupts = <15>;
|
|
||||||
};
|
|
||||||
|
|
||||||
spi1: spi@b0170000 {
|
|
||||||
cell-index = <1>;
|
|
||||||
compatible = "sirf,prima2-spi";
|
|
||||||
reg = <0xb0170000 0x10000>;
|
|
||||||
interrupts = <16>;
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c0: i2c@b00e0000 {
|
|
||||||
cell-index = <0>;
|
|
||||||
compatible = "sirf,prima2-i2c";
|
|
||||||
reg = <0xb00e0000 0x10000>;
|
|
||||||
interrupts = <24>;
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c1: i2c@b00f0000 {
|
|
||||||
cell-index = <1>;
|
|
||||||
compatible = "sirf,prima2-i2c";
|
|
||||||
reg = <0xb00f0000 0x10000>;
|
|
||||||
interrupts = <25>;
|
|
||||||
};
|
|
||||||
|
|
||||||
tsc@b0110000 {
|
|
||||||
compatible = "sirf,prima2-tsc";
|
|
||||||
reg = <0xb0110000 0x10000>;
|
|
||||||
interrupts = <33>;
|
|
||||||
};
|
|
||||||
|
|
||||||
gpio: gpio-controller@b0120000 {
|
|
||||||
#gpio-cells = <2>;
|
|
||||||
#interrupt-cells = <2>;
|
|
||||||
compatible = "sirf,prima2-gpio-pinmux";
|
|
||||||
reg = <0xb0120000 0x10000>;
|
|
||||||
gpio-controller;
|
|
||||||
interrupt-controller;
|
|
||||||
};
|
|
||||||
|
|
||||||
pwm@b0130000 {
|
|
||||||
compatible = "sirf,prima2-pwm";
|
|
||||||
reg = <0xb0130000 0x10000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
efusesys@b0140000 {
|
|
||||||
compatible = "sirf,prima2-efuse";
|
|
||||||
reg = <0xb0140000 0x10000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pulsec@b0150000 {
|
|
||||||
compatible = "sirf,prima2-pulsec";
|
|
||||||
reg = <0xb0150000 0x10000>;
|
|
||||||
interrupts = <48>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pci-iobg {
|
|
||||||
compatible = "sirf,prima2-pciiobg", "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0x56000000 0x56000000 0x1b00000>;
|
|
||||||
|
|
||||||
sd0: sdhci@56000000 {
|
|
||||||
cell-index = <0>;
|
|
||||||
compatible = "sirf,prima2-sdhc";
|
|
||||||
reg = <0x56000000 0x100000>;
|
|
||||||
interrupts = <38>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sd1: sdhci@56100000 {
|
|
||||||
cell-index = <1>;
|
|
||||||
compatible = "sirf,prima2-sdhc";
|
|
||||||
reg = <0x56100000 0x100000>;
|
|
||||||
interrupts = <38>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sd2: sdhci@56200000 {
|
|
||||||
cell-index = <2>;
|
|
||||||
compatible = "sirf,prima2-sdhc";
|
|
||||||
reg = <0x56200000 0x100000>;
|
|
||||||
interrupts = <23>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sd3: sdhci@56300000 {
|
|
||||||
cell-index = <3>;
|
|
||||||
compatible = "sirf,prima2-sdhc";
|
|
||||||
reg = <0x56300000 0x100000>;
|
|
||||||
interrupts = <23>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sd4: sdhci@56400000 {
|
|
||||||
cell-index = <4>;
|
|
||||||
compatible = "sirf,prima2-sdhc";
|
|
||||||
reg = <0x56400000 0x100000>;
|
|
||||||
interrupts = <39>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sd5: sdhci@56500000 {
|
|
||||||
cell-index = <5>;
|
|
||||||
compatible = "sirf,prima2-sdhc";
|
|
||||||
reg = <0x56500000 0x100000>;
|
|
||||||
interrupts = <39>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pci-copy@57900000 {
|
|
||||||
compatible = "sirf,prima2-pcicp";
|
|
||||||
reg = <0x57900000 0x100000>;
|
|
||||||
interrupts = <40>;
|
|
||||||
};
|
|
||||||
|
|
||||||
rom-interface@57a00000 {
|
|
||||||
compatible = "sirf,prima2-romif";
|
|
||||||
reg = <0x57a00000 0x100000>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
rtc-iobg {
|
|
||||||
compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
reg = <0x80030000 0x10000>;
|
|
||||||
|
|
||||||
gpsrtc@1000 {
|
|
||||||
compatible = "sirf,prima2-gpsrtc";
|
|
||||||
reg = <0x1000 0x1000>;
|
|
||||||
interrupts = <55 56 57>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sysrtc@2000 {
|
|
||||||
compatible = "sirf,prima2-sysrtc";
|
|
||||||
reg = <0x2000 0x1000>;
|
|
||||||
interrupts = <52 53 54>;
|
|
||||||
};
|
|
||||||
|
|
||||||
pwrc@3000 {
|
|
||||||
compatible = "sirf,prima2-pwrc";
|
|
||||||
reg = <0x3000 0x1000>;
|
|
||||||
interrupts = <32>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
uus-iobg {
|
|
||||||
compatible = "simple-bus";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges = <0xb8000000 0xb8000000 0x40000>;
|
|
||||||
|
|
||||||
usb0: usb@b00e0000 {
|
|
||||||
compatible = "chipidea,ci13611a-prima2";
|
|
||||||
reg = <0xb8000000 0x10000>;
|
|
||||||
interrupts = <10>;
|
|
||||||
};
|
|
||||||
|
|
||||||
usb1: usb@b00f0000 {
|
|
||||||
compatible = "chipidea,ci13611a-prima2";
|
|
||||||
reg = <0xb8010000 0x10000>;
|
|
||||||
interrupts = <11>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sata@b00f0000 {
|
|
||||||
compatible = "synopsys,dwc-ahsata";
|
|
||||||
reg = <0xb8020000 0x10000>;
|
|
||||||
interrupts = <37>;
|
|
||||||
};
|
|
||||||
|
|
||||||
security@b00f0000 {
|
|
||||||
compatible = "sirf,prima2-security";
|
|
||||||
reg = <0xb8030000 0x10000>;
|
|
||||||
interrupts = <42>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
|
@ -0,0 +1,37 @@
|
||||||
|
/*
|
||||||
|
* DTS file for CSR SiRFprimaII Evaluation Board
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||||
|
*
|
||||||
|
* Licensed under GPLv2 or later.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
/include/ "prima2.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "CSR SiRFprimaII Evaluation Board";
|
||||||
|
compatible = "sirf,prima2", "sirf,prima2-cb";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x00000000 0x20000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
axi {
|
||||||
|
peri-iobg {
|
||||||
|
uart@b0060000 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&uart1_pins_a>;
|
||||||
|
};
|
||||||
|
spi@b00d0000 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&spi0_pins_a>;
|
||||||
|
};
|
||||||
|
spi@b0170000 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&spi1_pins_a>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
|
@ -0,0 +1,640 @@
|
||||||
|
/*
|
||||||
|
* DTS file for CSR SiRFprimaII SoC
|
||||||
|
*
|
||||||
|
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
|
||||||
|
*
|
||||||
|
* Licensed under GPLv2 or later.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/include/ "skeleton.dtsi"
|
||||||
|
/ {
|
||||||
|
compatible = "sirf,prima2";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
interrupt-parent = <&intc>;
|
||||||
|
|
||||||
|
cpus {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
cpu@0 {
|
||||||
|
reg = <0x0>;
|
||||||
|
d-cache-line-size = <32>;
|
||||||
|
i-cache-line-size = <32>;
|
||||||
|
d-cache-size = <32768>;
|
||||||
|
i-cache-size = <32768>;
|
||||||
|
/* from bootloader */
|
||||||
|
timebase-frequency = <0>;
|
||||||
|
bus-frequency = <0>;
|
||||||
|
clock-frequency = <0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
axi {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x40000000 0x40000000 0x80000000>;
|
||||||
|
|
||||||
|
l2-cache-controller@80040000 {
|
||||||
|
compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
|
||||||
|
reg = <0x80040000 0x1000>;
|
||||||
|
interrupts = <59>;
|
||||||
|
arm,tag-latency = <1 1 1>;
|
||||||
|
arm,data-latency = <1 1 1>;
|
||||||
|
arm,filter-ranges = <0 0x40000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
intc: interrupt-controller@80020000 {
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
interrupt-controller;
|
||||||
|
compatible = "sirf,prima2-intc";
|
||||||
|
reg = <0x80020000 0x1000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sys-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x88000000 0x88000000 0x40000>;
|
||||||
|
|
||||||
|
clock-controller@88000000 {
|
||||||
|
compatible = "sirf,prima2-clkc";
|
||||||
|
reg = <0x88000000 0x1000>;
|
||||||
|
interrupts = <3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
reset-controller@88010000 {
|
||||||
|
compatible = "sirf,prima2-rstc";
|
||||||
|
reg = <0x88010000 0x1000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
rsc-controller@88020000 {
|
||||||
|
compatible = "sirf,prima2-rsc";
|
||||||
|
reg = <0x88020000 0x1000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
mem-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x90000000 0x90000000 0x10000>;
|
||||||
|
|
||||||
|
memory-controller@90000000 {
|
||||||
|
compatible = "sirf,prima2-memc";
|
||||||
|
reg = <0x90000000 0x10000>;
|
||||||
|
interrupts = <27>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
disp-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x90010000 0x90010000 0x30000>;
|
||||||
|
|
||||||
|
display@90010000 {
|
||||||
|
compatible = "sirf,prima2-lcd";
|
||||||
|
reg = <0x90010000 0x20000>;
|
||||||
|
interrupts = <30>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vpp@90020000 {
|
||||||
|
compatible = "sirf,prima2-vpp";
|
||||||
|
reg = <0x90020000 0x10000>;
|
||||||
|
interrupts = <31>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
graphics-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x98000000 0x98000000 0x8000000>;
|
||||||
|
|
||||||
|
graphics@98000000 {
|
||||||
|
compatible = "powervr,sgx531";
|
||||||
|
reg = <0x98000000 0x8000000>;
|
||||||
|
interrupts = <6>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
multimedia-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0xa0000000 0xa0000000 0x8000000>;
|
||||||
|
|
||||||
|
multimedia@a0000000 {
|
||||||
|
compatible = "sirf,prima2-video-codec";
|
||||||
|
reg = <0xa0000000 0x8000000>;
|
||||||
|
interrupts = <5>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
dsp-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0xa8000000 0xa8000000 0x2000000>;
|
||||||
|
|
||||||
|
dspif@a8000000 {
|
||||||
|
compatible = "sirf,prima2-dspif";
|
||||||
|
reg = <0xa8000000 0x10000>;
|
||||||
|
interrupts = <9>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gps@a8010000 {
|
||||||
|
compatible = "sirf,prima2-gps";
|
||||||
|
reg = <0xa8010000 0x10000>;
|
||||||
|
interrupts = <7>;
|
||||||
|
};
|
||||||
|
|
||||||
|
dsp@a9000000 {
|
||||||
|
compatible = "sirf,prima2-dsp";
|
||||||
|
reg = <0xa9000000 0x1000000>;
|
||||||
|
interrupts = <8>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
peri-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0xb0000000 0xb0000000 0x180000>;
|
||||||
|
|
||||||
|
timer@b0020000 {
|
||||||
|
compatible = "sirf,prima2-tick";
|
||||||
|
reg = <0xb0020000 0x1000>;
|
||||||
|
interrupts = <0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
nand@b0030000 {
|
||||||
|
compatible = "sirf,prima2-nand";
|
||||||
|
reg = <0xb0030000 0x10000>;
|
||||||
|
interrupts = <41>;
|
||||||
|
};
|
||||||
|
|
||||||
|
audio@b0040000 {
|
||||||
|
compatible = "sirf,prima2-audio";
|
||||||
|
reg = <0xb0040000 0x10000>;
|
||||||
|
interrupts = <35>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart0: uart@b0050000 {
|
||||||
|
cell-index = <0>;
|
||||||
|
compatible = "sirf,prima2-uart";
|
||||||
|
reg = <0xb0050000 0x10000>;
|
||||||
|
interrupts = <17>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart1: uart@b0060000 {
|
||||||
|
cell-index = <1>;
|
||||||
|
compatible = "sirf,prima2-uart";
|
||||||
|
reg = <0xb0060000 0x10000>;
|
||||||
|
interrupts = <18>;
|
||||||
|
};
|
||||||
|
|
||||||
|
uart2: uart@b0070000 {
|
||||||
|
cell-index = <2>;
|
||||||
|
compatible = "sirf,prima2-uart";
|
||||||
|
reg = <0xb0070000 0x10000>;
|
||||||
|
interrupts = <19>;
|
||||||
|
};
|
||||||
|
|
||||||
|
usp0: usp@b0080000 {
|
||||||
|
cell-index = <0>;
|
||||||
|
compatible = "sirf,prima2-usp";
|
||||||
|
reg = <0xb0080000 0x10000>;
|
||||||
|
interrupts = <20>;
|
||||||
|
};
|
||||||
|
|
||||||
|
usp1: usp@b0090000 {
|
||||||
|
cell-index = <1>;
|
||||||
|
compatible = "sirf,prima2-usp";
|
||||||
|
reg = <0xb0090000 0x10000>;
|
||||||
|
interrupts = <21>;
|
||||||
|
};
|
||||||
|
|
||||||
|
usp2: usp@b00a0000 {
|
||||||
|
cell-index = <2>;
|
||||||
|
compatible = "sirf,prima2-usp";
|
||||||
|
reg = <0xb00a0000 0x10000>;
|
||||||
|
interrupts = <22>;
|
||||||
|
};
|
||||||
|
|
||||||
|
dmac0: dma-controller@b00b0000 {
|
||||||
|
cell-index = <0>;
|
||||||
|
compatible = "sirf,prima2-dmac";
|
||||||
|
reg = <0xb00b0000 0x10000>;
|
||||||
|
interrupts = <12>;
|
||||||
|
};
|
||||||
|
|
||||||
|
dmac1: dma-controller@b0160000 {
|
||||||
|
cell-index = <1>;
|
||||||
|
compatible = "sirf,prima2-dmac";
|
||||||
|
reg = <0xb0160000 0x10000>;
|
||||||
|
interrupts = <13>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vip@b00C0000 {
|
||||||
|
compatible = "sirf,prima2-vip";
|
||||||
|
reg = <0xb00C0000 0x10000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
spi0: spi@b00d0000 {
|
||||||
|
cell-index = <0>;
|
||||||
|
compatible = "sirf,prima2-spi";
|
||||||
|
reg = <0xb00d0000 0x10000>;
|
||||||
|
interrupts = <15>;
|
||||||
|
};
|
||||||
|
|
||||||
|
spi1: spi@b0170000 {
|
||||||
|
cell-index = <1>;
|
||||||
|
compatible = "sirf,prima2-spi";
|
||||||
|
reg = <0xb0170000 0x10000>;
|
||||||
|
interrupts = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c0: i2c@b00e0000 {
|
||||||
|
cell-index = <0>;
|
||||||
|
compatible = "sirf,prima2-i2c";
|
||||||
|
reg = <0xb00e0000 0x10000>;
|
||||||
|
interrupts = <24>;
|
||||||
|
};
|
||||||
|
|
||||||
|
i2c1: i2c@b00f0000 {
|
||||||
|
cell-index = <1>;
|
||||||
|
compatible = "sirf,prima2-i2c";
|
||||||
|
reg = <0xb00f0000 0x10000>;
|
||||||
|
interrupts = <25>;
|
||||||
|
};
|
||||||
|
|
||||||
|
tsc@b0110000 {
|
||||||
|
compatible = "sirf,prima2-tsc";
|
||||||
|
reg = <0xb0110000 0x10000>;
|
||||||
|
interrupts = <33>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio: pinctrl@b0120000 {
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
#interrupt-cells = <2>;
|
||||||
|
compatible = "sirf,prima2-pinctrl";
|
||||||
|
reg = <0xb0120000 0x10000>;
|
||||||
|
interrupts = <43 44 45 46 47>;
|
||||||
|
gpio-controller;
|
||||||
|
interrupt-controller;
|
||||||
|
|
||||||
|
lcd_16pins_a: lcd0@0 {
|
||||||
|
lcd {
|
||||||
|
sirf,pins = "lcd_16bitsgrp";
|
||||||
|
sirf,function = "lcd_16bits";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
lcd_18pins_a: lcd0@1 {
|
||||||
|
lcd {
|
||||||
|
sirf,pins = "lcd_18bitsgrp";
|
||||||
|
sirf,function = "lcd_18bits";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
lcd_24pins_a: lcd0@2 {
|
||||||
|
lcd {
|
||||||
|
sirf,pins = "lcd_24bitsgrp";
|
||||||
|
sirf,function = "lcd_24bits";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
lcdrom_pins_a: lcdrom0@0 {
|
||||||
|
lcd {
|
||||||
|
sirf,pins = "lcdromgrp";
|
||||||
|
sirf,function = "lcdrom";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
uart0_pins_a: uart0@0 {
|
||||||
|
uart {
|
||||||
|
sirf,pins = "uart0grp";
|
||||||
|
sirf,function = "uart0";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
uart1_pins_a: uart1@0 {
|
||||||
|
uart {
|
||||||
|
sirf,pins = "uart1grp";
|
||||||
|
sirf,function = "uart1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
uart2_pins_a: uart2@0 {
|
||||||
|
uart {
|
||||||
|
sirf,pins = "uart2grp";
|
||||||
|
sirf,function = "uart2";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
uart2_noflow_pins_a: uart2@1 {
|
||||||
|
uart {
|
||||||
|
sirf,pins = "uart2_nostreamctrlgrp";
|
||||||
|
sirf,function = "uart2_nostreamctrl";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
spi0_pins_a: spi0@0 {
|
||||||
|
spi {
|
||||||
|
sirf,pins = "spi0grp";
|
||||||
|
sirf,function = "spi0";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
spi1_pins_a: spi1@0 {
|
||||||
|
spi {
|
||||||
|
sirf,pins = "spi1grp";
|
||||||
|
sirf,function = "spi1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
i2c0_pins_a: i2c0@0 {
|
||||||
|
i2c {
|
||||||
|
sirf,pins = "i2c0grp";
|
||||||
|
sirf,function = "i2c0";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
i2c1_pins_a: i2c1@0 {
|
||||||
|
i2c {
|
||||||
|
sirf,pins = "i2c1grp";
|
||||||
|
sirf,function = "i2c1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
pwm0_pins_a: pwm0@0 {
|
||||||
|
pwm {
|
||||||
|
sirf,pins = "pwm0grp";
|
||||||
|
sirf,function = "pwm0";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
pwm1_pins_a: pwm1@0 {
|
||||||
|
pwm {
|
||||||
|
sirf,pins = "pwm1grp";
|
||||||
|
sirf,function = "pwm1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
pwm2_pins_a: pwm2@0 {
|
||||||
|
pwm {
|
||||||
|
sirf,pins = "pwm2grp";
|
||||||
|
sirf,function = "pwm2";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
pwm3_pins_a: pwm3@0 {
|
||||||
|
pwm {
|
||||||
|
sirf,pins = "pwm3grp";
|
||||||
|
sirf,function = "pwm3";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
gps_pins_a: gps@0 {
|
||||||
|
gps {
|
||||||
|
sirf,pins = "gpsgrp";
|
||||||
|
sirf,function = "gps";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
vip_pins_a: vip@0 {
|
||||||
|
vip {
|
||||||
|
sirf,pins = "vipgrp";
|
||||||
|
sirf,function = "vip";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sdmmc0_pins_a: sdmmc0@0 {
|
||||||
|
sdmmc0 {
|
||||||
|
sirf,pins = "sdmmc0grp";
|
||||||
|
sirf,function = "sdmmc0";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sdmmc1_pins_a: sdmmc1@0 {
|
||||||
|
sdmmc1 {
|
||||||
|
sirf,pins = "sdmmc1grp";
|
||||||
|
sirf,function = "sdmmc1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sdmmc2_pins_a: sdmmc2@0 {
|
||||||
|
sdmmc2 {
|
||||||
|
sirf,pins = "sdmmc2grp";
|
||||||
|
sirf,function = "sdmmc2";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sdmmc3_pins_a: sdmmc3@0 {
|
||||||
|
sdmmc3 {
|
||||||
|
sirf,pins = "sdmmc3grp";
|
||||||
|
sirf,function = "sdmmc3";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sdmmc4_pins_a: sdmmc4@0 {
|
||||||
|
sdmmc4 {
|
||||||
|
sirf,pins = "sdmmc4grp";
|
||||||
|
sirf,function = "sdmmc4";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sdmmc5_pins_a: sdmmc5@0 {
|
||||||
|
sdmmc5 {
|
||||||
|
sirf,pins = "sdmmc5grp";
|
||||||
|
sirf,function = "sdmmc5";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
i2s_pins_a: i2s@0 {
|
||||||
|
i2s {
|
||||||
|
sirf,pins = "i2sgrp";
|
||||||
|
sirf,function = "i2s";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
ac97_pins_a: ac97@0 {
|
||||||
|
ac97 {
|
||||||
|
sirf,pins = "ac97grp";
|
||||||
|
sirf,function = "ac97";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
nand_pins_a: nand@0 {
|
||||||
|
nand {
|
||||||
|
sirf,pins = "nandgrp";
|
||||||
|
sirf,function = "nand";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
usp0_pins_a: usp0@0 {
|
||||||
|
usp0 {
|
||||||
|
sirf,pins = "usp0grp";
|
||||||
|
sirf,function = "usp0";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
usp1_pins_a: usp1@0 {
|
||||||
|
usp1 {
|
||||||
|
sirf,pins = "usp1grp";
|
||||||
|
sirf,function = "usp1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
usp2_pins_a: usp2@0 {
|
||||||
|
usp2 {
|
||||||
|
sirf,pins = "usp2grp";
|
||||||
|
sirf,function = "usp2";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
|
||||||
|
usb0_utmi_drvbus {
|
||||||
|
sirf,pins = "usb0_utmi_drvbusgrp";
|
||||||
|
sirf,function = "usb0_utmi_drvbus";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
|
||||||
|
usb1_utmi_drvbus {
|
||||||
|
sirf,pins = "usb1_utmi_drvbusgrp";
|
||||||
|
sirf,function = "usb1_utmi_drvbus";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
warm_rst_pins_a: warm_rst@0 {
|
||||||
|
warm_rst {
|
||||||
|
sirf,pins = "warm_rstgrp";
|
||||||
|
sirf,function = "warm_rst";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
pulse_count_pins_a: pulse_count@0 {
|
||||||
|
pulse_count {
|
||||||
|
sirf,pins = "pulse_countgrp";
|
||||||
|
sirf,function = "pulse_count";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
cko0_rst_pins_a: cko0_rst@0 {
|
||||||
|
cko0_rst {
|
||||||
|
sirf,pins = "cko0_rstgrp";
|
||||||
|
sirf,function = "cko0_rst";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
cko1_rst_pins_a: cko1_rst@0 {
|
||||||
|
cko1_rst {
|
||||||
|
sirf,pins = "cko1_rstgrp";
|
||||||
|
sirf,function = "cko1_rst";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
pwm@b0130000 {
|
||||||
|
compatible = "sirf,prima2-pwm";
|
||||||
|
reg = <0xb0130000 0x10000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
efusesys@b0140000 {
|
||||||
|
compatible = "sirf,prima2-efuse";
|
||||||
|
reg = <0xb0140000 0x10000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pulsec@b0150000 {
|
||||||
|
compatible = "sirf,prima2-pulsec";
|
||||||
|
reg = <0xb0150000 0x10000>;
|
||||||
|
interrupts = <48>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pci-iobg {
|
||||||
|
compatible = "sirf,prima2-pciiobg", "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x56000000 0x56000000 0x1b00000>;
|
||||||
|
|
||||||
|
sd0: sdhci@56000000 {
|
||||||
|
cell-index = <0>;
|
||||||
|
compatible = "sirf,prima2-sdhc";
|
||||||
|
reg = <0x56000000 0x100000>;
|
||||||
|
interrupts = <38>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sd1: sdhci@56100000 {
|
||||||
|
cell-index = <1>;
|
||||||
|
compatible = "sirf,prima2-sdhc";
|
||||||
|
reg = <0x56100000 0x100000>;
|
||||||
|
interrupts = <38>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sd2: sdhci@56200000 {
|
||||||
|
cell-index = <2>;
|
||||||
|
compatible = "sirf,prima2-sdhc";
|
||||||
|
reg = <0x56200000 0x100000>;
|
||||||
|
interrupts = <23>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sd3: sdhci@56300000 {
|
||||||
|
cell-index = <3>;
|
||||||
|
compatible = "sirf,prima2-sdhc";
|
||||||
|
reg = <0x56300000 0x100000>;
|
||||||
|
interrupts = <23>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sd4: sdhci@56400000 {
|
||||||
|
cell-index = <4>;
|
||||||
|
compatible = "sirf,prima2-sdhc";
|
||||||
|
reg = <0x56400000 0x100000>;
|
||||||
|
interrupts = <39>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sd5: sdhci@56500000 {
|
||||||
|
cell-index = <5>;
|
||||||
|
compatible = "sirf,prima2-sdhc";
|
||||||
|
reg = <0x56500000 0x100000>;
|
||||||
|
interrupts = <39>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pci-copy@57900000 {
|
||||||
|
compatible = "sirf,prima2-pcicp";
|
||||||
|
reg = <0x57900000 0x100000>;
|
||||||
|
interrupts = <40>;
|
||||||
|
};
|
||||||
|
|
||||||
|
rom-interface@57a00000 {
|
||||||
|
compatible = "sirf,prima2-romif";
|
||||||
|
reg = <0x57a00000 0x100000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
rtc-iobg {
|
||||||
|
compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
reg = <0x80030000 0x10000>;
|
||||||
|
|
||||||
|
gpsrtc@1000 {
|
||||||
|
compatible = "sirf,prima2-gpsrtc";
|
||||||
|
reg = <0x1000 0x1000>;
|
||||||
|
interrupts = <55 56 57>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sysrtc@2000 {
|
||||||
|
compatible = "sirf,prima2-sysrtc";
|
||||||
|
reg = <0x2000 0x1000>;
|
||||||
|
interrupts = <52 53 54>;
|
||||||
|
};
|
||||||
|
|
||||||
|
pwrc@3000 {
|
||||||
|
compatible = "sirf,prima2-pwrc";
|
||||||
|
reg = <0x3000 0x1000>;
|
||||||
|
interrupts = <32>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
uus-iobg {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0xb8000000 0xb8000000 0x40000>;
|
||||||
|
|
||||||
|
usb0: usb@b00e0000 {
|
||||||
|
compatible = "chipidea,ci13611a-prima2";
|
||||||
|
reg = <0xb8000000 0x10000>;
|
||||||
|
interrupts = <10>;
|
||||||
|
};
|
||||||
|
|
||||||
|
usb1: usb@b00f0000 {
|
||||||
|
compatible = "chipidea,ci13611a-prima2";
|
||||||
|
reg = <0xb8010000 0x10000>;
|
||||||
|
interrupts = <11>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sata@b00f0000 {
|
||||||
|
compatible = "synopsys,dwc-ahsata";
|
||||||
|
reg = <0xb8020000 0x10000>;
|
||||||
|
interrupts = <37>;
|
||||||
|
};
|
||||||
|
|
||||||
|
security@b00f0000 {
|
||||||
|
compatible = "sirf,prima2-security";
|
||||||
|
reg = <0xb8030000 0x10000>;
|
||||||
|
interrupts = <42>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
|
@ -66,6 +66,7 @@
|
||||||
|
|
||||||
vcxio: regulator@8 {
|
vcxio: regulator@8 {
|
||||||
compatible = "ti,twl6030-vcxio";
|
compatible = "ti,twl6030-vcxio";
|
||||||
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
vusb: regulator@9 {
|
vusb: regulator@9 {
|
||||||
|
@ -74,10 +75,12 @@
|
||||||
|
|
||||||
v1v8: regulator@10 {
|
v1v8: regulator@10 {
|
||||||
compatible = "ti,twl6030-v1v8";
|
compatible = "ti,twl6030-v1v8";
|
||||||
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
v2v1: regulator@11 {
|
v2v1: regulator@11 {
|
||||||
compatible = "ti,twl6030-v2v1";
|
compatible = "ti,twl6030-v2v1";
|
||||||
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
clk32kg: regulator@12 {
|
clk32kg: regulator@12 {
|
||||||
|
|
|
@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
|
||||||
CONFIG_LEDS_CLASS=y
|
CONFIG_LEDS_CLASS=y
|
||||||
CONFIG_LEDS_LM3530=y
|
CONFIG_LEDS_LM3530=y
|
||||||
CONFIG_LEDS_LP5521=y
|
CONFIG_LEDS_LP5521=y
|
||||||
|
CONFIG_LEDS_GPIO=y
|
||||||
CONFIG_RTC_CLASS=y
|
CONFIG_RTC_CLASS=y
|
||||||
CONFIG_RTC_DRV_AB8500=y
|
CONFIG_RTC_DRV_AB8500=y
|
||||||
CONFIG_RTC_DRV_PL031=y
|
CONFIG_RTC_DRV_PL031=y
|
||||||
|
|
|
@ -102,7 +102,8 @@ void __init dove_ehci1_init(void)
|
||||||
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
||||||
{
|
{
|
||||||
orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
|
orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
|
||||||
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
|
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
|
||||||
|
1600);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
|
|
|
@ -42,6 +42,7 @@
|
||||||
#include <plat/backlight.h>
|
#include <plat/backlight.h>
|
||||||
#include <plat/fb.h>
|
#include <plat/fb.h>
|
||||||
#include <plat/mfc.h>
|
#include <plat/mfc.h>
|
||||||
|
#include <plat/hdmi.h>
|
||||||
|
|
||||||
#include <mach/ohci.h>
|
#include <mach/ohci.h>
|
||||||
#include <mach/map.h>
|
#include <mach/map.h>
|
||||||
|
@ -734,6 +735,11 @@ static void __init origen_bt_setup(void)
|
||||||
s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
|
s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* I2C module and id for HDMIPHY */
|
||||||
|
static struct i2c_board_info hdmiphy_info = {
|
||||||
|
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
|
||||||
|
};
|
||||||
|
|
||||||
static void s5p_tv_setup(void)
|
static void s5p_tv_setup(void)
|
||||||
{
|
{
|
||||||
/* Direct HPD to HDMI chip */
|
/* Direct HPD to HDMI chip */
|
||||||
|
@ -781,6 +787,7 @@ static void __init origen_machine_init(void)
|
||||||
|
|
||||||
s5p_tv_setup();
|
s5p_tv_setup();
|
||||||
s5p_i2c_hdmiphy_set_platdata(NULL);
|
s5p_i2c_hdmiphy_set_platdata(NULL);
|
||||||
|
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
|
||||||
|
|
||||||
#ifdef CONFIG_DRM_EXYNOS
|
#ifdef CONFIG_DRM_EXYNOS
|
||||||
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
|
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
|
||||||
|
|
|
@ -40,6 +40,7 @@
|
||||||
#include <plat/mfc.h>
|
#include <plat/mfc.h>
|
||||||
#include <plat/ehci.h>
|
#include <plat/ehci.h>
|
||||||
#include <plat/clock.h>
|
#include <plat/clock.h>
|
||||||
|
#include <plat/hdmi.h>
|
||||||
|
|
||||||
#include <mach/map.h>
|
#include <mach/map.h>
|
||||||
#include <mach/ohci.h>
|
#include <mach/ohci.h>
|
||||||
|
@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = {
|
||||||
.pwm_period_ns = 1000,
|
.pwm_period_ns = 1000,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* I2C module and id for HDMIPHY */
|
||||||
|
static struct i2c_board_info hdmiphy_info = {
|
||||||
|
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
|
||||||
|
};
|
||||||
|
|
||||||
static void s5p_tv_setup(void)
|
static void s5p_tv_setup(void)
|
||||||
{
|
{
|
||||||
/* direct HPD to HDMI chip */
|
/* direct HPD to HDMI chip */
|
||||||
|
@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void)
|
||||||
|
|
||||||
s5p_tv_setup();
|
s5p_tv_setup();
|
||||||
s5p_i2c_hdmiphy_set_platdata(NULL);
|
s5p_i2c_hdmiphy_set_platdata(NULL);
|
||||||
|
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
|
||||||
|
|
||||||
samsung_keypad_set_platdata(&smdkv310_keypad_data);
|
samsung_keypad_set_platdata(&smdkv310_keypad_data);
|
||||||
|
|
||||||
|
|
|
@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
|
||||||
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
|
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
|
||||||
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
|
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
|
||||||
|
|
||||||
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
|
imx5-pm-$(CONFIG_PM) += pm-imx5.o
|
||||||
|
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
|
||||||
|
|
||||||
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
|
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
|
||||||
clk-pfd.o clk-busy.o
|
clk-pfd.o clk-busy.o
|
||||||
|
@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
|
||||||
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
|
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
|
||||||
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
|
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
|
||||||
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
|
obj-$(CONFIG_HAVE_IMX_SRC) += src.o
|
||||||
obj-$(CONFIG_CPU_V7) += head-v7.o
|
AFLAGS_headsmp.o :=-Wa,-march=armv7-a
|
||||||
AFLAGS_head-v7.o :=-Wa,-march=armv7-a
|
obj-$(CONFIG_SMP) += headsmp.o platsmp.o
|
||||||
obj-$(CONFIG_SMP) += platsmp.o
|
|
||||||
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
|
||||||
obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
|
obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
|
||||||
|
|
||||||
ifeq ($(CONFIG_PM),y)
|
ifeq ($(CONFIG_PM),y)
|
||||||
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
|
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
|
||||||
endif
|
endif
|
||||||
|
|
||||||
# i.MX5 based machines
|
# i.MX5 based machines
|
||||||
|
|
|
@ -152,7 +152,7 @@ enum mx6q_clks {
|
||||||
ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
|
ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
|
||||||
usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
|
usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
|
||||||
pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
|
pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
|
||||||
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
|
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
|
||||||
clk_max
|
clk_max
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void)
|
||||||
clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
|
clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
|
||||||
clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
|
clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
|
||||||
clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
|
clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
|
||||||
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_sel", base + 0x20, 10, 1);
|
clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
|
||||||
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_sel", base + 0x20, 11, 1);
|
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_div_3_5", base + 0x20, 10, 1);
|
||||||
|
clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
|
||||||
|
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_div_3_5", base + 0x20, 11, 1);
|
||||||
clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3);
|
clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3);
|
||||||
clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3);
|
clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3);
|
||||||
clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3);
|
clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3);
|
||||||
|
|
|
@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void)
|
||||||
: "cc");
|
: "cc");
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void cpu_leave_lowpower(void)
|
|
||||||
{
|
|
||||||
unsigned int v;
|
|
||||||
|
|
||||||
asm volatile(
|
|
||||||
"mrc p15, 0, %0, c1, c0, 0\n"
|
|
||||||
" orr %0, %0, %1\n"
|
|
||||||
" mcr p15, 0, %0, c1, c0, 0\n"
|
|
||||||
" mrc p15, 0, %0, c1, c0, 1\n"
|
|
||||||
" orr %0, %0, %2\n"
|
|
||||||
" mcr p15, 0, %0, c1, c0, 1\n"
|
|
||||||
: "=&r" (v)
|
|
||||||
: "Ir" (CR_C), "Ir" (0x40)
|
|
||||||
: "cc");
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* platform-specific code to shutdown a CPU
|
* platform-specific code to shutdown a CPU
|
||||||
*
|
*
|
||||||
|
@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu)
|
||||||
{
|
{
|
||||||
cpu_enter_lowpower();
|
cpu_enter_lowpower();
|
||||||
imx_enable_cpu(cpu, false);
|
imx_enable_cpu(cpu, false);
|
||||||
cpu_do_idle();
|
|
||||||
cpu_leave_lowpower();
|
|
||||||
|
|
||||||
/* We should never return from idle */
|
/* spin here until hardware takes it down */
|
||||||
panic("cpu %d unexpectedly exit from shutdown\n", cpu);
|
while (1)
|
||||||
|
;
|
||||||
}
|
}
|
||||||
|
|
||||||
int platform_cpu_disable(unsigned int cpu)
|
int platform_cpu_disable(unsigned int cpu)
|
||||||
|
|
|
@ -71,7 +71,7 @@ soft:
|
||||||
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
|
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
|
||||||
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
|
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
|
||||||
{
|
{
|
||||||
if (IS_ENABLED(CONFIG_PHYLIB)) {
|
if (IS_BUILTIN(CONFIG_PHYLIB)) {
|
||||||
/* min rx data delay */
|
/* min rx data delay */
|
||||||
phy_write(phydev, 0x0b, 0x8105);
|
phy_write(phydev, 0x0b, 0x8105);
|
||||||
phy_write(phydev, 0x0c, 0x0000);
|
phy_write(phydev, 0x0c, 0x0000);
|
||||||
|
@ -112,7 +112,7 @@ put_clk:
|
||||||
|
|
||||||
static void __init imx6q_sabrelite_init(void)
|
static void __init imx6q_sabrelite_init(void)
|
||||||
{
|
{
|
||||||
if (IS_ENABLED(CONFIG_PHYLIB))
|
if (IS_BUILTIN(CONFIG_PHYLIB))
|
||||||
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
|
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
|
||||||
ksz9021rn_phy_fixup);
|
ksz9021rn_phy_fixup);
|
||||||
imx6q_sabrelite_cko1_setup();
|
imx6q_sabrelite_cko1_setup();
|
||||||
|
|
|
@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
|
||||||
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
|
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
|
||||||
dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
|
dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
|
||||||
dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
|
dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
|
||||||
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-qnap-ts219.dtb
|
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb
|
||||||
|
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb
|
||||||
dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
|
dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
|
||||||
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
|
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
|
||||||
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
|
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
|
||||||
|
|
|
@ -301,7 +301,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
||||||
{
|
{
|
||||||
orion_ge00_init(eth_data,
|
orion_ge00_init(eth_data,
|
||||||
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
|
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
|
||||||
IRQ_KIRKWOOD_GE00_ERR);
|
IRQ_KIRKWOOD_GE00_ERR, 1600);
|
||||||
/* The interface forgets the MAC address assigned by u-boot if
|
/* The interface forgets the MAC address assigned by u-boot if
|
||||||
the clock is turned off, so claim the clk now. */
|
the clock is turned off, so claim the clk now. */
|
||||||
clk_prepare_enable(ge0);
|
clk_prepare_enable(ge0);
|
||||||
|
@ -315,7 +315,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
||||||
{
|
{
|
||||||
orion_ge01_init(eth_data,
|
orion_ge01_init(eth_data,
|
||||||
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
|
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
|
||||||
IRQ_KIRKWOOD_GE01_ERR);
|
IRQ_KIRKWOOD_GE01_ERR, 1600);
|
||||||
clk_prepare_enable(ge1);
|
clk_prepare_enable(ge1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev)
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
if (!pdata && !pdata->pool_name)
|
if (!pdata || !pdata->pool_name)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
info = kzalloc(sizeof(*info), GFP_KERNEL);
|
info = kzalloc(sizeof(*info), GFP_KERNEL);
|
||||||
|
|
|
@ -37,7 +37,7 @@
|
||||||
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
|
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
|
||||||
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
|
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
|
||||||
|
|
||||||
static void __init __iomem *win_cfg_base(int win)
|
static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* Find the control register base address for this window.
|
* Find the control register base address for this window.
|
||||||
|
|
|
@ -213,7 +213,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
||||||
{
|
{
|
||||||
orion_ge00_init(eth_data,
|
orion_ge00_init(eth_data,
|
||||||
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
|
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
|
||||||
IRQ_MV78XX0_GE_ERR);
|
IRQ_MV78XX0_GE_ERR,
|
||||||
|
MV643XX_TX_CSUM_DEFAULT_LIMIT);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -224,7 +225,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
||||||
{
|
{
|
||||||
orion_ge01_init(eth_data,
|
orion_ge01_init(eth_data,
|
||||||
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
|
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
|
||||||
NO_IRQ);
|
NO_IRQ,
|
||||||
|
MV643XX_TX_CSUM_DEFAULT_LIMIT);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -62,13 +62,14 @@ config ARCH_OMAP4
|
||||||
select PM_OPP if PM
|
select PM_OPP if PM
|
||||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||||
select ARM_CPU_SUSPEND if PM
|
select ARM_CPU_SUSPEND if PM
|
||||||
select ARCH_NEEDS_CPU_IDLE_COUPLED
|
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
|
||||||
|
|
||||||
config SOC_OMAP5
|
config SOC_OMAP5
|
||||||
bool "TI OMAP5"
|
bool "TI OMAP5"
|
||||||
select CPU_V7
|
select CPU_V7
|
||||||
select ARM_GIC
|
select ARM_GIC
|
||||||
select HAVE_SMP
|
select HAVE_SMP
|
||||||
|
select ARM_CPU_SUSPEND if PM
|
||||||
|
|
||||||
comment "OMAP Core Type"
|
comment "OMAP Core Type"
|
||||||
depends on ARCH_OMAP2
|
depends on ARCH_OMAP2
|
||||||
|
|
|
@ -554,6 +554,8 @@ static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = {
|
||||||
|
|
||||||
#ifdef CONFIG_OMAP_MUX
|
#ifdef CONFIG_OMAP_MUX
|
||||||
static struct omap_board_mux board_mux[] __initdata = {
|
static struct omap_board_mux board_mux[] __initdata = {
|
||||||
|
/* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
|
||||||
|
OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
||||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -58,6 +58,7 @@
|
||||||
#include "hsmmc.h"
|
#include "hsmmc.h"
|
||||||
#include "common-board-devices.h"
|
#include "common-board-devices.h"
|
||||||
|
|
||||||
|
#define OMAP3_EVM_TS_GPIO 175
|
||||||
#define OMAP3_EVM_EHCI_VBUS 22
|
#define OMAP3_EVM_EHCI_VBUS 22
|
||||||
#define OMAP3_EVM_EHCI_SELECT 61
|
#define OMAP3_EVM_EHCI_SELECT 61
|
||||||
|
|
||||||
|
|
|
@ -35,16 +35,6 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = {
|
||||||
.turbo_mode = 0,
|
.turbo_mode = 0,
|
||||||
};
|
};
|
||||||
|
|
||||||
/*
|
|
||||||
* ADS7846 driver maybe request a gpio according to the value
|
|
||||||
* of pdata->get_pendown_state, but we have done this. So set
|
|
||||||
* get_pendown_state to avoid twice gpio requesting.
|
|
||||||
*/
|
|
||||||
static int omap3_get_pendown_state(void)
|
|
||||||
{
|
|
||||||
return !gpio_get_value(OMAP3_EVM_TS_GPIO);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct ads7846_platform_data ads7846_config = {
|
static struct ads7846_platform_data ads7846_config = {
|
||||||
.x_max = 0x0fff,
|
.x_max = 0x0fff,
|
||||||
.y_max = 0x0fff,
|
.y_max = 0x0fff,
|
||||||
|
@ -55,7 +45,6 @@ static struct ads7846_platform_data ads7846_config = {
|
||||||
.debounce_rep = 1,
|
.debounce_rep = 1,
|
||||||
.gpio_pendown = -EINVAL,
|
.gpio_pendown = -EINVAL,
|
||||||
.keep_vref_on = 1,
|
.keep_vref_on = 1,
|
||||||
.get_pendown_state = &omap3_get_pendown_state,
|
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct spi_board_info ads7846_spi_board_info __initdata = {
|
static struct spi_board_info ads7846_spi_board_info __initdata = {
|
||||||
|
|
|
@ -4,7 +4,6 @@
|
||||||
#include "twl-common.h"
|
#include "twl-common.h"
|
||||||
|
|
||||||
#define NAND_BLOCK_SIZE SZ_128K
|
#define NAND_BLOCK_SIZE SZ_128K
|
||||||
#define OMAP3_EVM_TS_GPIO 175
|
|
||||||
|
|
||||||
struct mtd_partition;
|
struct mtd_partition;
|
||||||
struct ads7846_platform_data;
|
struct ads7846_platform_data;
|
||||||
|
|
|
@ -238,8 +238,9 @@ int __init omap4_idle_init(void)
|
||||||
for_each_cpu(cpu_id, cpu_online_mask) {
|
for_each_cpu(cpu_id, cpu_online_mask) {
|
||||||
dev = &per_cpu(omap4_idle_dev, cpu_id);
|
dev = &per_cpu(omap4_idle_dev, cpu_id);
|
||||||
dev->cpu = cpu_id;
|
dev->cpu = cpu_id;
|
||||||
|
#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
|
||||||
dev->coupled_cpus = *cpu_online_mask;
|
dev->coupled_cpus = *cpu_online_mask;
|
||||||
|
#endif
|
||||||
cpuidle_register_driver(&omap4_idle_driver);
|
cpuidle_register_driver(&omap4_idle_driver);
|
||||||
|
|
||||||
if (cpuidle_register_device(dev)) {
|
if (cpuidle_register_device(dev)) {
|
||||||
|
|
|
@ -127,7 +127,6 @@ struct omap_mux_partition {
|
||||||
* @gpio: GPIO number
|
* @gpio: GPIO number
|
||||||
* @muxnames: available signal modes for a ball
|
* @muxnames: available signal modes for a ball
|
||||||
* @balls: available balls on the package
|
* @balls: available balls on the package
|
||||||
* @partition: mux partition
|
|
||||||
*/
|
*/
|
||||||
struct omap_mux {
|
struct omap_mux {
|
||||||
u16 reg_offset;
|
u16 reg_offset;
|
||||||
|
|
|
@ -94,7 +94,7 @@ int __init omap4_opp_init(void)
|
||||||
{
|
{
|
||||||
int r = -ENODEV;
|
int r = -ENODEV;
|
||||||
|
|
||||||
if (!cpu_is_omap44xx())
|
if (!cpu_is_omap443x())
|
||||||
return r;
|
return r;
|
||||||
|
|
||||||
r = omap_init_opp_table(omap44xx_opp_def_list,
|
r = omap_init_opp_table(omap44xx_opp_def_list,
|
||||||
|
|
|
@ -272,21 +272,16 @@ void omap_sram_idle(void)
|
||||||
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
|
per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
|
||||||
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
|
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
|
||||||
|
|
||||||
if (mpu_next_state < PWRDM_POWER_ON) {
|
pwrdm_pre_transition(NULL);
|
||||||
pwrdm_pre_transition(mpu_pwrdm);
|
|
||||||
pwrdm_pre_transition(neon_pwrdm);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* PER */
|
/* PER */
|
||||||
if (per_next_state < PWRDM_POWER_ON) {
|
if (per_next_state < PWRDM_POWER_ON) {
|
||||||
pwrdm_pre_transition(per_pwrdm);
|
|
||||||
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
|
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
|
||||||
omap2_gpio_prepare_for_idle(per_going_off);
|
omap2_gpio_prepare_for_idle(per_going_off);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* CORE */
|
/* CORE */
|
||||||
if (core_next_state < PWRDM_POWER_ON) {
|
if (core_next_state < PWRDM_POWER_ON) {
|
||||||
pwrdm_pre_transition(core_pwrdm);
|
|
||||||
if (core_next_state == PWRDM_POWER_OFF) {
|
if (core_next_state == PWRDM_POWER_OFF) {
|
||||||
omap3_core_save_context();
|
omap3_core_save_context();
|
||||||
omap3_cm_save_context();
|
omap3_cm_save_context();
|
||||||
|
@ -339,20 +334,14 @@ void omap_sram_idle(void)
|
||||||
omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
|
omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
|
||||||
OMAP3430_GR_MOD,
|
OMAP3430_GR_MOD,
|
||||||
OMAP3_PRM_VOLTCTRL_OFFSET);
|
OMAP3_PRM_VOLTCTRL_OFFSET);
|
||||||
pwrdm_post_transition(core_pwrdm);
|
|
||||||
}
|
}
|
||||||
omap3_intc_resume_idle();
|
omap3_intc_resume_idle();
|
||||||
|
|
||||||
/* PER */
|
pwrdm_post_transition(NULL);
|
||||||
if (per_next_state < PWRDM_POWER_ON) {
|
|
||||||
omap2_gpio_resume_after_idle();
|
|
||||||
pwrdm_post_transition(per_pwrdm);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (mpu_next_state < PWRDM_POWER_ON) {
|
/* PER */
|
||||||
pwrdm_post_transition(mpu_pwrdm);
|
if (per_next_state < PWRDM_POWER_ON)
|
||||||
pwrdm_post_transition(neon_pwrdm);
|
omap2_gpio_resume_after_idle();
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void omap3_pm_idle(void)
|
static void omap3_pm_idle(void)
|
||||||
|
|
|
@ -56,9 +56,13 @@ ppa_por_params:
|
||||||
* The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
|
* The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
|
||||||
* It returns to the caller for CPU INACTIVE and ON power states or in case
|
* It returns to the caller for CPU INACTIVE and ON power states or in case
|
||||||
* CPU failed to transition to targeted OFF/DORMANT state.
|
* CPU failed to transition to targeted OFF/DORMANT state.
|
||||||
|
*
|
||||||
|
* omap4_finish_suspend() calls v7_flush_dcache_all() which doesn't save
|
||||||
|
* stack frame and it expects the caller to take care of it. Hence the entire
|
||||||
|
* stack frame is saved to avoid possible stack corruption.
|
||||||
*/
|
*/
|
||||||
ENTRY(omap4_finish_suspend)
|
ENTRY(omap4_finish_suspend)
|
||||||
stmfd sp!, {lr}
|
stmfd sp!, {r4-r12, lr}
|
||||||
cmp r0, #0x0
|
cmp r0, #0x0
|
||||||
beq do_WFI @ No lowpower state, jump to WFI
|
beq do_WFI @ No lowpower state, jump to WFI
|
||||||
|
|
||||||
|
@ -226,7 +230,7 @@ scu_gp_clear:
|
||||||
skip_scu_gp_clear:
|
skip_scu_gp_clear:
|
||||||
isb
|
isb
|
||||||
dsb
|
dsb
|
||||||
ldmfd sp!, {pc}
|
ldmfd sp!, {r4-r12, pc}
|
||||||
ENDPROC(omap4_finish_suspend)
|
ENDPROC(omap4_finish_suspend)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
|
||||||
const char *pmic_type, int pmic_irq,
|
const char *pmic_type, int pmic_irq,
|
||||||
struct twl4030_platform_data *pmic_data)
|
struct twl4030_platform_data *pmic_data)
|
||||||
{
|
{
|
||||||
|
omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
|
||||||
strncpy(pmic_i2c_board_info.type, pmic_type,
|
strncpy(pmic_i2c_board_info.type, pmic_type,
|
||||||
sizeof(pmic_i2c_board_info.type));
|
sizeof(pmic_i2c_board_info.type));
|
||||||
pmic_i2c_board_info.irq = pmic_irq;
|
pmic_i2c_board_info.irq = pmic_irq;
|
||||||
|
|
|
@ -109,7 +109,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
|
||||||
{
|
{
|
||||||
orion_ge00_init(eth_data,
|
orion_ge00_init(eth_data,
|
||||||
ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
|
ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
|
||||||
IRQ_ORION5X_ETH_ERR);
|
IRQ_ORION5X_ETH_ERR,
|
||||||
|
MV643XX_TX_CSUM_DEFAULT_LIMIT);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,3 +1,5 @@
|
||||||
zreladdr-y += 0x00008000
|
zreladdr-y += 0x00008000
|
||||||
params_phys-y := 0x00000100
|
params_phys-y := 0x00000100
|
||||||
initrd_phys-y := 0x00800000
|
initrd_phys-y := 0x00800000
|
||||||
|
|
||||||
|
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
|
||||||
|
|
|
@ -24,7 +24,8 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
enum dma_ch {
|
enum dma_ch {
|
||||||
DMACH_XD0,
|
DMACH_DT_PROP = -1, /* not yet supported, do not use */
|
||||||
|
DMACH_XD0 = 0,
|
||||||
DMACH_XD1,
|
DMACH_XD1,
|
||||||
DMACH_SDI,
|
DMACH_SDI,
|
||||||
DMACH_SPI0,
|
DMACH_SPI0,
|
||||||
|
|
|
@ -41,7 +41,6 @@ config MACH_HREFV60
|
||||||
config MACH_SNOWBALL
|
config MACH_SNOWBALL
|
||||||
bool "U8500 Snowball platform"
|
bool "U8500 Snowball platform"
|
||||||
select MACH_MOP500
|
select MACH_MOP500
|
||||||
select LEDS_GPIO
|
|
||||||
help
|
help
|
||||||
Include support for the snowball development platform.
|
Include support for the snowball development platform.
|
||||||
|
|
||||||
|
|
|
@ -191,9 +191,9 @@ static struct platform_device *db8500_add_msp_i2s(struct device *parent,
|
||||||
return pdev;
|
return pdev;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Platform device for ASoC U8500 machine */
|
/* Platform device for ASoC MOP500 machine */
|
||||||
static struct platform_device snd_soc_u8500 = {
|
static struct platform_device snd_soc_mop500 = {
|
||||||
.name = "snd-soc-u8500",
|
.name = "snd-soc-mop500",
|
||||||
.id = 0,
|
.id = 0,
|
||||||
.dev = {
|
.dev = {
|
||||||
.platform_data = NULL,
|
.platform_data = NULL,
|
||||||
|
@ -227,8 +227,8 @@ int mop500_msp_init(struct device *parent)
|
||||||
{
|
{
|
||||||
struct platform_device *msp1;
|
struct platform_device *msp1;
|
||||||
|
|
||||||
pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
|
pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
|
||||||
platform_device_register(&snd_soc_u8500);
|
platform_device_register(&snd_soc_mop500);
|
||||||
|
|
||||||
pr_info("Initialize MSP I2S-devices.\n");
|
pr_info("Initialize MSP I2S-devices.\n");
|
||||||
db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
|
db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
|
||||||
|
|
|
@ -797,6 +797,7 @@ static void __init u8500_init_machine(void)
|
||||||
ARRAY_SIZE(mop500_platform_devs));
|
ARRAY_SIZE(mop500_platform_devs));
|
||||||
|
|
||||||
mop500_sdi_init(parent);
|
mop500_sdi_init(parent);
|
||||||
|
mop500_msp_init(parent);
|
||||||
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
||||||
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
|
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
|
||||||
i2c_register_board_info(2, mop500_i2c2_devices,
|
i2c_register_board_info(2, mop500_i2c2_devices,
|
||||||
|
@ -804,6 +805,8 @@ static void __init u8500_init_machine(void)
|
||||||
|
|
||||||
mop500_uib_init();
|
mop500_uib_init();
|
||||||
|
|
||||||
|
} else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
|
||||||
|
mop500_msp_init(parent);
|
||||||
} else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
|
} else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
|
||||||
/*
|
/*
|
||||||
* The HREFv60 board removed a GPIO expander and routed
|
* The HREFv60 board removed a GPIO expander and routed
|
||||||
|
@ -815,6 +818,7 @@ static void __init u8500_init_machine(void)
|
||||||
ARRAY_SIZE(mop500_platform_devs));
|
ARRAY_SIZE(mop500_platform_devs));
|
||||||
|
|
||||||
hrefv60_sdi_init(parent);
|
hrefv60_sdi_init(parent);
|
||||||
|
mop500_msp_init(parent);
|
||||||
|
|
||||||
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
|
||||||
i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
|
i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
|
||||||
|
|
|
@ -189,6 +189,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
|
||||||
timer->reserved = 1;
|
timer->reserved = 1;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
spin_unlock_irqrestore(&dm_timer_lock, flags);
|
||||||
|
|
||||||
if (timer) {
|
if (timer) {
|
||||||
ret = omap_dm_timer_prepare(timer);
|
ret = omap_dm_timer_prepare(timer);
|
||||||
|
@ -197,7 +198,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
|
||||||
timer = NULL;
|
timer = NULL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
spin_unlock_irqrestore(&dm_timer_lock, flags);
|
|
||||||
|
|
||||||
if (!timer)
|
if (!timer)
|
||||||
pr_debug("%s: timer request failed!\n", __func__);
|
pr_debug("%s: timer request failed!\n", __func__);
|
||||||
|
@ -220,6 +220,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
spin_unlock_irqrestore(&dm_timer_lock, flags);
|
||||||
|
|
||||||
if (timer) {
|
if (timer) {
|
||||||
ret = omap_dm_timer_prepare(timer);
|
ret = omap_dm_timer_prepare(timer);
|
||||||
|
@ -228,7 +229,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
|
||||||
timer = NULL;
|
timer = NULL;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
spin_unlock_irqrestore(&dm_timer_lock, flags);
|
|
||||||
|
|
||||||
if (!timer)
|
if (!timer)
|
||||||
pr_debug("%s: timer%d request failed!\n", __func__, id);
|
pr_debug("%s: timer%d request failed!\n", __func__, id);
|
||||||
|
@ -258,7 +258,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
|
||||||
|
|
||||||
void omap_dm_timer_disable(struct omap_dm_timer *timer)
|
void omap_dm_timer_disable(struct omap_dm_timer *timer)
|
||||||
{
|
{
|
||||||
pm_runtime_put(&timer->pdev->dev);
|
pm_runtime_put_sync(&timer->pdev->dev);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
|
EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
|
||||||
|
|
||||||
|
|
|
@ -372,7 +372,8 @@ IS_OMAP_TYPE(3430, 0x3430)
|
||||||
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
|
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
|
||||||
cpu_is_omap16xx())
|
cpu_is_omap16xx())
|
||||||
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
|
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
|
||||||
cpu_is_omap44xx() || soc_is_omap54xx())
|
cpu_is_omap44xx() || soc_is_omap54xx() || \
|
||||||
|
soc_is_am33xx())
|
||||||
|
|
||||||
/* Various silicon revisions for omap2 */
|
/* Various silicon revisions for omap2 */
|
||||||
#define OMAP242X_CLASS 0x24200024
|
#define OMAP242X_CLASS 0x24200024
|
||||||
|
|
|
@ -108,4 +108,13 @@
|
||||||
# endif
|
# endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SOC_AM33XX
|
||||||
|
# ifdef OMAP_NAME
|
||||||
|
# undef MULTI_OMAP2
|
||||||
|
# define MULTI_OMAP2
|
||||||
|
# else
|
||||||
|
# define OMAP_NAME am33xx
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif /* __PLAT_OMAP_MULTI_H */
|
#endif /* __PLAT_OMAP_MULTI_H */
|
||||||
|
|
|
@ -110,7 +110,7 @@ static inline void flush(void)
|
||||||
_DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
|
_DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
|
||||||
AM33XXUART##p)
|
AM33XXUART##p)
|
||||||
|
|
||||||
static inline void __arch_decomp_setup(unsigned long arch_id)
|
static inline void arch_decomp_setup(void)
|
||||||
{
|
{
|
||||||
int port = 0;
|
int port = 0;
|
||||||
|
|
||||||
|
@ -198,8 +198,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
|
||||||
} while (0);
|
} while (0);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define arch_decomp_setup() __arch_decomp_setup(arch_id)
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* nothing to do
|
* nothing to do
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -291,10 +291,12 @@ static struct platform_device orion_ge00 = {
|
||||||
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
|
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
|
||||||
unsigned long mapbase,
|
unsigned long mapbase,
|
||||||
unsigned long irq,
|
unsigned long irq,
|
||||||
unsigned long irq_err)
|
unsigned long irq_err,
|
||||||
|
unsigned int tx_csum_limit)
|
||||||
{
|
{
|
||||||
fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
|
fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
|
||||||
mapbase + 0x2000, SZ_16K - 1, irq_err);
|
mapbase + 0x2000, SZ_16K - 1, irq_err);
|
||||||
|
orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
|
||||||
ge_complete(&orion_ge00_shared_data,
|
ge_complete(&orion_ge00_shared_data,
|
||||||
orion_ge00_resources, irq, &orion_ge00_shared,
|
orion_ge00_resources, irq, &orion_ge00_shared,
|
||||||
eth_data, &orion_ge00);
|
eth_data, &orion_ge00);
|
||||||
|
@ -343,10 +345,12 @@ static struct platform_device orion_ge01 = {
|
||||||
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
|
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
|
||||||
unsigned long mapbase,
|
unsigned long mapbase,
|
||||||
unsigned long irq,
|
unsigned long irq,
|
||||||
unsigned long irq_err)
|
unsigned long irq_err,
|
||||||
|
unsigned int tx_csum_limit)
|
||||||
{
|
{
|
||||||
fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
|
fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
|
||||||
mapbase + 0x2000, SZ_16K - 1, irq_err);
|
mapbase + 0x2000, SZ_16K - 1, irq_err);
|
||||||
|
orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
|
||||||
ge_complete(&orion_ge01_shared_data,
|
ge_complete(&orion_ge01_shared_data,
|
||||||
orion_ge01_resources, irq, &orion_ge01_shared,
|
orion_ge01_resources, irq, &orion_ge01_shared,
|
||||||
eth_data, &orion_ge01);
|
eth_data, &orion_ge01);
|
||||||
|
|
|
@ -39,12 +39,14 @@ void __init orion_rtc_init(unsigned long mapbase,
|
||||||
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
|
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
|
||||||
unsigned long mapbase,
|
unsigned long mapbase,
|
||||||
unsigned long irq,
|
unsigned long irq,
|
||||||
unsigned long irq_err);
|
unsigned long irq_err,
|
||||||
|
unsigned int tx_csum_limit);
|
||||||
|
|
||||||
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
|
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
|
||||||
unsigned long mapbase,
|
unsigned long mapbase,
|
||||||
unsigned long irq,
|
unsigned long irq,
|
||||||
unsigned long irq_err);
|
unsigned long irq_err,
|
||||||
|
unsigned int tx_csum_limit);
|
||||||
|
|
||||||
void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
|
void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
|
||||||
unsigned long mapbase,
|
unsigned long mapbase,
|
||||||
|
|
|
@ -430,7 +430,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
|
||||||
* when necessary.
|
* when necessary.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
int s3c2410_dma_enqueue(unsigned int channel, void *id,
|
int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
|
||||||
dma_addr_t data, int size)
|
dma_addr_t data, int size)
|
||||||
{
|
{
|
||||||
struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
|
struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
|
||||||
|
|
|
@ -32,6 +32,8 @@
|
||||||
#include <linux/platform_data/s3c-hsudc.h>
|
#include <linux/platform_data/s3c-hsudc.h>
|
||||||
#include <linux/platform_data/s3c-hsotg.h>
|
#include <linux/platform_data/s3c-hsotg.h>
|
||||||
|
|
||||||
|
#include <media/s5p_hdmi.h>
|
||||||
|
|
||||||
#include <asm/irq.h>
|
#include <asm/irq.h>
|
||||||
#include <asm/pmu.h>
|
#include <asm/pmu.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
@ -748,7 +750,8 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
|
||||||
if (!pd) {
|
if (!pd) {
|
||||||
pd = &default_i2c_data;
|
pd = &default_i2c_data;
|
||||||
|
|
||||||
if (soc_is_exynos4210())
|
if (soc_is_exynos4210() ||
|
||||||
|
soc_is_exynos4212() || soc_is_exynos4412())
|
||||||
pd->bus_num = 8;
|
pd->bus_num = 8;
|
||||||
else if (soc_is_s5pv210())
|
else if (soc_is_s5pv210())
|
||||||
pd->bus_num = 3;
|
pd->bus_num = 3;
|
||||||
|
@ -759,6 +762,30 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
|
||||||
npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
|
npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
|
||||||
&s5p_device_i2c_hdmiphy);
|
&s5p_device_i2c_hdmiphy);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
|
||||||
|
|
||||||
|
void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
|
||||||
|
struct i2c_board_info *mhl_info, int mhl_bus)
|
||||||
|
{
|
||||||
|
struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
|
||||||
|
|
||||||
|
if (soc_is_exynos4210() ||
|
||||||
|
soc_is_exynos4212() || soc_is_exynos4412())
|
||||||
|
pd->hdmiphy_bus = 8;
|
||||||
|
else if (soc_is_s5pv210())
|
||||||
|
pd->hdmiphy_bus = 3;
|
||||||
|
else
|
||||||
|
pd->hdmiphy_bus = 0;
|
||||||
|
|
||||||
|
pd->hdmiphy_info = hdmiphy_info;
|
||||||
|
pd->mhl_info = mhl_info;
|
||||||
|
pd->mhl_bus = mhl_bus;
|
||||||
|
|
||||||
|
s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
|
||||||
|
&s5p_device_hdmi);
|
||||||
|
}
|
||||||
|
|
||||||
#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
|
#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
|
||||||
|
|
||||||
/* I2S */
|
/* I2S */
|
||||||
|
|
|
@ -0,0 +1,16 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2012 Samsung Electronics Co.Ltd
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of the GNU General Public License as published by the
|
||||||
|
* Free Software Foundation; either version 2 of the License, or (at your
|
||||||
|
* option) any later version.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __PLAT_SAMSUNG_HDMI_H
|
||||||
|
#define __PLAT_SAMSUNG_HDMI_H __FILE__
|
||||||
|
|
||||||
|
extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
|
||||||
|
struct i2c_board_info *mhl_info, int mhl_bus);
|
||||||
|
|
||||||
|
#endif /* __PLAT_SAMSUNG_HDMI_H */
|
|
@ -74,7 +74,7 @@ unsigned char pm_uart_udivslot;
|
||||||
|
|
||||||
#ifdef CONFIG_SAMSUNG_PM_DEBUG
|
#ifdef CONFIG_SAMSUNG_PM_DEBUG
|
||||||
|
|
||||||
struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
|
static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
|
||||||
|
|
||||||
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
|
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
|
||||||
{
|
{
|
||||||
|
|
|
@ -89,6 +89,7 @@ config ATH79
|
||||||
select CEVT_R4K
|
select CEVT_R4K
|
||||||
select CSRC_R4K
|
select CSRC_R4K
|
||||||
select DMA_NONCOHERENT
|
select DMA_NONCOHERENT
|
||||||
|
select HAVE_CLK
|
||||||
select IRQ_CPU
|
select IRQ_CPU
|
||||||
select MIPS_MACHINE
|
select MIPS_MACHINE
|
||||||
select SYS_HAS_CPU_MIPS32_R2
|
select SYS_HAS_CPU_MIPS32_R2
|
||||||
|
|
|
@ -228,6 +228,8 @@ static int mtx1_pci_idsel(unsigned int devsel, int assert)
|
||||||
* adapter on the mtx-1 "singleboard" variant. It triggers a custom
|
* adapter on the mtx-1 "singleboard" variant. It triggers a custom
|
||||||
* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
|
* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
|
||||||
*/
|
*/
|
||||||
|
udelay(1);
|
||||||
|
|
||||||
if (assert && devsel != 0)
|
if (assert && devsel != 0)
|
||||||
/* Suppress signal to Cardbus */
|
/* Suppress signal to Cardbus */
|
||||||
alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
|
alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
|
||||||
|
|
|
@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void)
|
||||||
|
|
||||||
ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
|
ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
|
||||||
ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
|
ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
|
||||||
|
ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
|
||||||
|
ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
|
||||||
platform_device_register(&ath79_ohci_device);
|
platform_device_register(&ath79_ohci_device);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -188,8 +188,10 @@ void __init ath79_gpio_init(void)
|
||||||
|
|
||||||
if (soc_is_ar71xx())
|
if (soc_is_ar71xx())
|
||||||
ath79_gpio_count = AR71XX_GPIO_COUNT;
|
ath79_gpio_count = AR71XX_GPIO_COUNT;
|
||||||
else if (soc_is_ar724x())
|
else if (soc_is_ar7240())
|
||||||
ath79_gpio_count = AR724X_GPIO_COUNT;
|
ath79_gpio_count = AR7240_GPIO_COUNT;
|
||||||
|
else if (soc_is_ar7241() || soc_is_ar7242())
|
||||||
|
ath79_gpio_count = AR7241_GPIO_COUNT;
|
||||||
else if (soc_is_ar913x())
|
else if (soc_is_ar913x())
|
||||||
ath79_gpio_count = AR913X_GPIO_COUNT;
|
ath79_gpio_count = AR913X_GPIO_COUNT;
|
||||||
else if (soc_is_ar933x())
|
else if (soc_is_ar933x())
|
||||||
|
|
|
@ -106,11 +106,15 @@ int __init bcm63xx_spi_register(void)
|
||||||
if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
|
if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
|
||||||
spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
|
spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
|
||||||
spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
|
spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
|
||||||
|
spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT;
|
||||||
|
spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
|
if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
|
||||||
spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
|
spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
|
||||||
spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
|
spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
|
||||||
|
spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
|
||||||
|
spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH;
|
||||||
}
|
}
|
||||||
|
|
||||||
bcm63xx_spi_regs_init();
|
bcm63xx_spi_regs_init();
|
||||||
|
|
|
@ -61,6 +61,12 @@ static void octeon_irq_set_ciu_mapping(int irq, int line, int bit,
|
||||||
octeon_irq_ciu_to_irq[line][bit] = irq;
|
octeon_irq_ciu_to_irq[line][bit] = irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void octeon_irq_force_ciu_mapping(struct irq_domain *domain,
|
||||||
|
int irq, int line, int bit)
|
||||||
|
{
|
||||||
|
irq_domain_associate(domain, irq, line << 6 | bit);
|
||||||
|
}
|
||||||
|
|
||||||
static int octeon_coreid_for_cpu(int cpu)
|
static int octeon_coreid_for_cpu(int cpu)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_SMP
|
#ifdef CONFIG_SMP
|
||||||
|
@ -183,19 +189,9 @@ static void __init octeon_irq_init_core(void)
|
||||||
mutex_init(&cd->core_irq_mutex);
|
mutex_init(&cd->core_irq_mutex);
|
||||||
|
|
||||||
irq = OCTEON_IRQ_SW0 + i;
|
irq = OCTEON_IRQ_SW0 + i;
|
||||||
switch (irq) {
|
irq_set_chip_data(irq, cd);
|
||||||
case OCTEON_IRQ_TIMER:
|
irq_set_chip_and_handler(irq, &octeon_irq_chip_core,
|
||||||
case OCTEON_IRQ_SW0:
|
handle_percpu_irq);
|
||||||
case OCTEON_IRQ_SW1:
|
|
||||||
case OCTEON_IRQ_5:
|
|
||||||
case OCTEON_IRQ_PERF:
|
|
||||||
irq_set_chip_data(irq, cd);
|
|
||||||
irq_set_chip_and_handler(irq, &octeon_irq_chip_core,
|
|
||||||
handle_percpu_irq);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -890,7 +886,6 @@ static int octeon_irq_gpio_xlat(struct irq_domain *d,
|
||||||
unsigned int type;
|
unsigned int type;
|
||||||
unsigned int pin;
|
unsigned int pin;
|
||||||
unsigned int trigger;
|
unsigned int trigger;
|
||||||
struct octeon_irq_gpio_domain_data *gpiod;
|
|
||||||
|
|
||||||
if (d->of_node != node)
|
if (d->of_node != node)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
@ -925,8 +920,7 @@ static int octeon_irq_gpio_xlat(struct irq_domain *d,
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
*out_type = type;
|
*out_type = type;
|
||||||
gpiod = d->host_data;
|
*out_hwirq = pin;
|
||||||
*out_hwirq = gpiod->base_hwirq + pin;
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -996,19 +990,21 @@ static int octeon_irq_ciu_map(struct irq_domain *d,
|
||||||
static int octeon_irq_gpio_map(struct irq_domain *d,
|
static int octeon_irq_gpio_map(struct irq_domain *d,
|
||||||
unsigned int virq, irq_hw_number_t hw)
|
unsigned int virq, irq_hw_number_t hw)
|
||||||
{
|
{
|
||||||
unsigned int line = hw >> 6;
|
struct octeon_irq_gpio_domain_data *gpiod = d->host_data;
|
||||||
unsigned int bit = hw & 63;
|
unsigned int line, bit;
|
||||||
|
|
||||||
if (!octeon_irq_virq_in_range(virq))
|
if (!octeon_irq_virq_in_range(virq))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
|
hw += gpiod->base_hwirq;
|
||||||
|
line = hw >> 6;
|
||||||
|
bit = hw & 63;
|
||||||
if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0)
|
if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
octeon_irq_set_ciu_mapping(virq, line, bit,
|
octeon_irq_set_ciu_mapping(virq, line, bit,
|
||||||
octeon_irq_gpio_chip,
|
octeon_irq_gpio_chip,
|
||||||
octeon_irq_handle_gpio);
|
octeon_irq_handle_gpio);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1149,6 +1145,7 @@ static void __init octeon_irq_init_ciu(void)
|
||||||
struct irq_chip *chip_wd;
|
struct irq_chip *chip_wd;
|
||||||
struct device_node *gpio_node;
|
struct device_node *gpio_node;
|
||||||
struct device_node *ciu_node;
|
struct device_node *ciu_node;
|
||||||
|
struct irq_domain *ciu_domain = NULL;
|
||||||
|
|
||||||
octeon_irq_init_ciu_percpu();
|
octeon_irq_init_ciu_percpu();
|
||||||
octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu;
|
octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu;
|
||||||
|
@ -1177,31 +1174,6 @@ static void __init octeon_irq_init_ciu(void)
|
||||||
/* Mips internal */
|
/* Mips internal */
|
||||||
octeon_irq_init_core();
|
octeon_irq_init_core();
|
||||||
|
|
||||||
/* CIU_0 */
|
|
||||||
for (i = 0; i < 16; i++)
|
|
||||||
octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WORKQ0, 0, i + 0, chip, handle_level_irq);
|
|
||||||
|
|
||||||
octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
|
|
||||||
octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
|
|
||||||
|
|
||||||
for (i = 0; i < 4; i++)
|
|
||||||
octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_INT0, 0, i + 36, chip, handle_level_irq);
|
|
||||||
for (i = 0; i < 4; i++)
|
|
||||||
octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_MSI0, 0, i + 40, chip, handle_level_irq);
|
|
||||||
|
|
||||||
octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq);
|
|
||||||
for (i = 0; i < 4; i++)
|
|
||||||
octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq);
|
|
||||||
|
|
||||||
octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq);
|
|
||||||
octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq);
|
|
||||||
|
|
||||||
/* CIU_1 */
|
|
||||||
for (i = 0; i < 16; i++)
|
|
||||||
octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
|
|
||||||
|
|
||||||
octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq);
|
|
||||||
|
|
||||||
gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio");
|
gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio");
|
||||||
if (gpio_node) {
|
if (gpio_node) {
|
||||||
struct octeon_irq_gpio_domain_data *gpiod;
|
struct octeon_irq_gpio_domain_data *gpiod;
|
||||||
|
@ -1219,10 +1191,35 @@ static void __init octeon_irq_init_ciu(void)
|
||||||
|
|
||||||
ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu");
|
ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu");
|
||||||
if (ciu_node) {
|
if (ciu_node) {
|
||||||
irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
|
ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
|
||||||
of_node_put(ciu_node);
|
of_node_put(ciu_node);
|
||||||
} else
|
} else
|
||||||
pr_warn("Cannot find device node for cavium,octeon-3860-ciu.\n");
|
panic("Cannot find device node for cavium,octeon-3860-ciu.");
|
||||||
|
|
||||||
|
/* CIU_0 */
|
||||||
|
for (i = 0; i < 16; i++)
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i + 0);
|
||||||
|
|
||||||
|
octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
|
||||||
|
octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
|
||||||
|
|
||||||
|
for (i = 0; i < 4; i++)
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 0, i + 36);
|
||||||
|
for (i = 0; i < 4; i++)
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
|
||||||
|
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
|
||||||
|
for (i = 0; i < 4; i++)
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
|
||||||
|
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_BOOTDMA, 0, 63);
|
||||||
|
|
||||||
|
/* CIU_1 */
|
||||||
|
for (i = 0; i < 16; i++)
|
||||||
|
octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
|
||||||
|
|
||||||
|
octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB1, 1, 17);
|
||||||
|
|
||||||
/* Enable the CIU lines */
|
/* Enable the CIU lines */
|
||||||
set_c0_status(STATUSF_IP3 | STATUSF_IP2);
|
set_c0_status(STATUSF_IP3 | STATUSF_IP2);
|
||||||
|
|
|
@ -393,7 +393,8 @@
|
||||||
#define AR71XX_GPIO_REG_FUNC 0x28
|
#define AR71XX_GPIO_REG_FUNC 0x28
|
||||||
|
|
||||||
#define AR71XX_GPIO_COUNT 16
|
#define AR71XX_GPIO_COUNT 16
|
||||||
#define AR724X_GPIO_COUNT 18
|
#define AR7240_GPIO_COUNT 18
|
||||||
|
#define AR7241_GPIO_COUNT 20
|
||||||
#define AR913X_GPIO_COUNT 22
|
#define AR913X_GPIO_COUNT 22
|
||||||
#define AR933X_GPIO_COUNT 30
|
#define AR933X_GPIO_COUNT 30
|
||||||
#define AR934X_GPIO_COUNT 23
|
#define AR934X_GPIO_COUNT 23
|
||||||
|
|
|
@ -42,7 +42,6 @@
|
||||||
#define cpu_has_mips64r1 0
|
#define cpu_has_mips64r1 0
|
||||||
#define cpu_has_mips64r2 0
|
#define cpu_has_mips64r2 0
|
||||||
|
|
||||||
#define cpu_has_dsp 0
|
|
||||||
#define cpu_has_mipsmt 0
|
#define cpu_has_mipsmt 0
|
||||||
|
|
||||||
#define cpu_has_64bits 0
|
#define cpu_has_64bits 0
|
||||||
|
|
|
@ -9,6 +9,8 @@ int __init bcm63xx_spi_register(void);
|
||||||
|
|
||||||
struct bcm63xx_spi_pdata {
|
struct bcm63xx_spi_pdata {
|
||||||
unsigned int fifo_size;
|
unsigned int fifo_size;
|
||||||
|
unsigned int msg_type_shift;
|
||||||
|
unsigned int msg_ctl_width;
|
||||||
int bus_num;
|
int bus_num;
|
||||||
int num_chipselect;
|
int num_chipselect;
|
||||||
u32 speed_hz;
|
u32 speed_hz;
|
||||||
|
|
|
@ -1054,7 +1054,8 @@
|
||||||
#define SPI_6338_FILL_BYTE 0x07
|
#define SPI_6338_FILL_BYTE 0x07
|
||||||
#define SPI_6338_MSG_TAIL 0x09
|
#define SPI_6338_MSG_TAIL 0x09
|
||||||
#define SPI_6338_RX_TAIL 0x0b
|
#define SPI_6338_RX_TAIL 0x0b
|
||||||
#define SPI_6338_MSG_CTL 0x40
|
#define SPI_6338_MSG_CTL 0x40 /* 8-bits register */
|
||||||
|
#define SPI_6338_MSG_CTL_WIDTH 8
|
||||||
#define SPI_6338_MSG_DATA 0x41
|
#define SPI_6338_MSG_DATA 0x41
|
||||||
#define SPI_6338_MSG_DATA_SIZE 0x3f
|
#define SPI_6338_MSG_DATA_SIZE 0x3f
|
||||||
#define SPI_6338_RX_DATA 0x80
|
#define SPI_6338_RX_DATA 0x80
|
||||||
|
@ -1070,7 +1071,8 @@
|
||||||
#define SPI_6348_FILL_BYTE 0x07
|
#define SPI_6348_FILL_BYTE 0x07
|
||||||
#define SPI_6348_MSG_TAIL 0x09
|
#define SPI_6348_MSG_TAIL 0x09
|
||||||
#define SPI_6348_RX_TAIL 0x0b
|
#define SPI_6348_RX_TAIL 0x0b
|
||||||
#define SPI_6348_MSG_CTL 0x40
|
#define SPI_6348_MSG_CTL 0x40 /* 8-bits register */
|
||||||
|
#define SPI_6348_MSG_CTL_WIDTH 8
|
||||||
#define SPI_6348_MSG_DATA 0x41
|
#define SPI_6348_MSG_DATA 0x41
|
||||||
#define SPI_6348_MSG_DATA_SIZE 0x3f
|
#define SPI_6348_MSG_DATA_SIZE 0x3f
|
||||||
#define SPI_6348_RX_DATA 0x80
|
#define SPI_6348_RX_DATA 0x80
|
||||||
|
@ -1078,6 +1080,7 @@
|
||||||
|
|
||||||
/* BCM 6358 SPI core */
|
/* BCM 6358 SPI core */
|
||||||
#define SPI_6358_MSG_CTL 0x00 /* 16-bits register */
|
#define SPI_6358_MSG_CTL 0x00 /* 16-bits register */
|
||||||
|
#define SPI_6358_MSG_CTL_WIDTH 16
|
||||||
#define SPI_6358_MSG_DATA 0x02
|
#define SPI_6358_MSG_DATA 0x02
|
||||||
#define SPI_6358_MSG_DATA_SIZE 0x21e
|
#define SPI_6358_MSG_DATA_SIZE 0x21e
|
||||||
#define SPI_6358_RX_DATA 0x400
|
#define SPI_6358_RX_DATA 0x400
|
||||||
|
@ -1094,6 +1097,7 @@
|
||||||
|
|
||||||
/* BCM 6358 SPI core */
|
/* BCM 6358 SPI core */
|
||||||
#define SPI_6368_MSG_CTL 0x00 /* 16-bits register */
|
#define SPI_6368_MSG_CTL 0x00 /* 16-bits register */
|
||||||
|
#define SPI_6368_MSG_CTL_WIDTH 16
|
||||||
#define SPI_6368_MSG_DATA 0x02
|
#define SPI_6368_MSG_DATA 0x02
|
||||||
#define SPI_6368_MSG_DATA_SIZE 0x21e
|
#define SPI_6368_MSG_DATA_SIZE 0x21e
|
||||||
#define SPI_6368_RX_DATA 0x400
|
#define SPI_6368_RX_DATA 0x400
|
||||||
|
@ -1115,7 +1119,10 @@
|
||||||
#define SPI_HD_W 0x01
|
#define SPI_HD_W 0x01
|
||||||
#define SPI_HD_R 0x02
|
#define SPI_HD_R 0x02
|
||||||
#define SPI_BYTE_CNT_SHIFT 0
|
#define SPI_BYTE_CNT_SHIFT 0
|
||||||
#define SPI_MSG_TYPE_SHIFT 14
|
#define SPI_6338_MSG_TYPE_SHIFT 6
|
||||||
|
#define SPI_6348_MSG_TYPE_SHIFT 6
|
||||||
|
#define SPI_6358_MSG_TYPE_SHIFT 14
|
||||||
|
#define SPI_6368_MSG_TYPE_SHIFT 14
|
||||||
|
|
||||||
/* Command */
|
/* Command */
|
||||||
#define SPI_CMD_NOOP 0x00
|
#define SPI_CMD_NOOP 0x00
|
||||||
|
|
|
@ -21,14 +21,10 @@ enum octeon_irq {
|
||||||
OCTEON_IRQ_TIMER,
|
OCTEON_IRQ_TIMER,
|
||||||
/* sources in CIU_INTX_EN0 */
|
/* sources in CIU_INTX_EN0 */
|
||||||
OCTEON_IRQ_WORKQ0,
|
OCTEON_IRQ_WORKQ0,
|
||||||
OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16,
|
OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16,
|
||||||
OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16,
|
|
||||||
OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
|
OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
|
||||||
OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
|
OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
|
||||||
OCTEON_IRQ_MBOX1,
|
OCTEON_IRQ_MBOX1,
|
||||||
OCTEON_IRQ_UART0,
|
|
||||||
OCTEON_IRQ_UART1,
|
|
||||||
OCTEON_IRQ_UART2,
|
|
||||||
OCTEON_IRQ_PCI_INT0,
|
OCTEON_IRQ_PCI_INT0,
|
||||||
OCTEON_IRQ_PCI_INT1,
|
OCTEON_IRQ_PCI_INT1,
|
||||||
OCTEON_IRQ_PCI_INT2,
|
OCTEON_IRQ_PCI_INT2,
|
||||||
|
@ -38,8 +34,6 @@ enum octeon_irq {
|
||||||
OCTEON_IRQ_PCI_MSI2,
|
OCTEON_IRQ_PCI_MSI2,
|
||||||
OCTEON_IRQ_PCI_MSI3,
|
OCTEON_IRQ_PCI_MSI3,
|
||||||
|
|
||||||
OCTEON_IRQ_TWSI,
|
|
||||||
OCTEON_IRQ_TWSI2,
|
|
||||||
OCTEON_IRQ_RML,
|
OCTEON_IRQ_RML,
|
||||||
OCTEON_IRQ_TIMER0,
|
OCTEON_IRQ_TIMER0,
|
||||||
OCTEON_IRQ_TIMER1,
|
OCTEON_IRQ_TIMER1,
|
||||||
|
@ -47,8 +41,6 @@ enum octeon_irq {
|
||||||
OCTEON_IRQ_TIMER3,
|
OCTEON_IRQ_TIMER3,
|
||||||
OCTEON_IRQ_USB0,
|
OCTEON_IRQ_USB0,
|
||||||
OCTEON_IRQ_USB1,
|
OCTEON_IRQ_USB1,
|
||||||
OCTEON_IRQ_MII0,
|
|
||||||
OCTEON_IRQ_MII1,
|
|
||||||
OCTEON_IRQ_BOOTDMA,
|
OCTEON_IRQ_BOOTDMA,
|
||||||
#ifndef CONFIG_PCI_MSI
|
#ifndef CONFIG_PCI_MSI
|
||||||
OCTEON_IRQ_LAST = 127
|
OCTEON_IRQ_LAST = 127
|
||||||
|
|
|
@ -10,6 +10,7 @@ struct mod_arch_specific {
|
||||||
struct list_head dbe_list;
|
struct list_head dbe_list;
|
||||||
const struct exception_table_entry *dbe_start;
|
const struct exception_table_entry *dbe_start;
|
||||||
const struct exception_table_entry *dbe_end;
|
const struct exception_table_entry *dbe_end;
|
||||||
|
struct mips_hi16 *r_mips_hi16_list;
|
||||||
};
|
};
|
||||||
|
|
||||||
typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
|
typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
|
||||||
|
|
|
@ -12,16 +12,16 @@
|
||||||
|
|
||||||
#ifdef CONFIG_SYNC_R4K
|
#ifdef CONFIG_SYNC_R4K
|
||||||
|
|
||||||
extern void synchronise_count_master(void);
|
extern void synchronise_count_master(int cpu);
|
||||||
extern void synchronise_count_slave(void);
|
extern void synchronise_count_slave(int cpu);
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
static inline void synchronise_count_master(void)
|
static inline void synchronise_count_master(int cpu)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void synchronise_count_slave(void)
|
static inline void synchronise_count_slave(int cpu)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -39,8 +39,6 @@ struct mips_hi16 {
|
||||||
Elf_Addr value;
|
Elf_Addr value;
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct mips_hi16 *mips_hi16_list;
|
|
||||||
|
|
||||||
static LIST_HEAD(dbe_list);
|
static LIST_HEAD(dbe_list);
|
||||||
static DEFINE_SPINLOCK(dbe_lock);
|
static DEFINE_SPINLOCK(dbe_lock);
|
||||||
|
|
||||||
|
@ -128,8 +126,8 @@ static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v)
|
||||||
|
|
||||||
n->addr = (Elf_Addr *)location;
|
n->addr = (Elf_Addr *)location;
|
||||||
n->value = v;
|
n->value = v;
|
||||||
n->next = mips_hi16_list;
|
n->next = me->arch.r_mips_hi16_list;
|
||||||
mips_hi16_list = n;
|
me->arch.r_mips_hi16_list = n;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -142,18 +140,28 @@ static int apply_r_mips_hi16_rela(struct module *me, u32 *location, Elf_Addr v)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void free_relocation_chain(struct mips_hi16 *l)
|
||||||
|
{
|
||||||
|
struct mips_hi16 *next;
|
||||||
|
|
||||||
|
while (l) {
|
||||||
|
next = l->next;
|
||||||
|
kfree(l);
|
||||||
|
l = next;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
|
static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
|
||||||
{
|
{
|
||||||
unsigned long insnlo = *location;
|
unsigned long insnlo = *location;
|
||||||
|
struct mips_hi16 *l;
|
||||||
Elf_Addr val, vallo;
|
Elf_Addr val, vallo;
|
||||||
|
|
||||||
/* Sign extend the addend we extract from the lo insn. */
|
/* Sign extend the addend we extract from the lo insn. */
|
||||||
vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
|
vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
|
||||||
|
|
||||||
if (mips_hi16_list != NULL) {
|
if (me->arch.r_mips_hi16_list != NULL) {
|
||||||
struct mips_hi16 *l;
|
l = me->arch.r_mips_hi16_list;
|
||||||
|
|
||||||
l = mips_hi16_list;
|
|
||||||
while (l != NULL) {
|
while (l != NULL) {
|
||||||
struct mips_hi16 *next;
|
struct mips_hi16 *next;
|
||||||
unsigned long insn;
|
unsigned long insn;
|
||||||
|
@ -188,7 +196,7 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
|
||||||
l = next;
|
l = next;
|
||||||
}
|
}
|
||||||
|
|
||||||
mips_hi16_list = NULL;
|
me->arch.r_mips_hi16_list = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -201,6 +209,9 @@ static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
out_danger:
|
out_danger:
|
||||||
|
free_relocation_chain(l);
|
||||||
|
me->arch.r_mips_hi16_list = NULL;
|
||||||
|
|
||||||
pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name);
|
pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name);
|
||||||
|
|
||||||
return -ENOEXEC;
|
return -ENOEXEC;
|
||||||
|
@ -273,6 +284,7 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
|
||||||
pr_debug("Applying relocate section %u to %u\n", relsec,
|
pr_debug("Applying relocate section %u to %u\n", relsec,
|
||||||
sechdrs[relsec].sh_info);
|
sechdrs[relsec].sh_info);
|
||||||
|
|
||||||
|
me->arch.r_mips_hi16_list = NULL;
|
||||||
for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
|
for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
|
||||||
/* This is where to make the change */
|
/* This is where to make the change */
|
||||||
location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
|
location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
|
||||||
|
@ -296,6 +308,19 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Normally the hi16 list should be deallocated at this point. A
|
||||||
|
* malformed binary however could contain a series of R_MIPS_HI16
|
||||||
|
* relocations not followed by a R_MIPS_LO16 relocation. In that
|
||||||
|
* case, free up the list and return an error.
|
||||||
|
*/
|
||||||
|
if (me->arch.r_mips_hi16_list) {
|
||||||
|
free_relocation_chain(me->arch.r_mips_hi16_list);
|
||||||
|
me->arch.r_mips_hi16_list = NULL;
|
||||||
|
|
||||||
|
return -ENOEXEC;
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -130,7 +130,7 @@ asmlinkage __cpuinit void start_secondary(void)
|
||||||
|
|
||||||
cpu_set(cpu, cpu_callin_map);
|
cpu_set(cpu, cpu_callin_map);
|
||||||
|
|
||||||
synchronise_count_slave();
|
synchronise_count_slave(cpu);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* irq will be enabled in ->smp_finish(), enabling it too early
|
* irq will be enabled in ->smp_finish(), enabling it too early
|
||||||
|
@ -173,7 +173,6 @@ void smp_send_stop(void)
|
||||||
void __init smp_cpus_done(unsigned int max_cpus)
|
void __init smp_cpus_done(unsigned int max_cpus)
|
||||||
{
|
{
|
||||||
mp_ops->cpus_done();
|
mp_ops->cpus_done();
|
||||||
synchronise_count_master();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* called from main before smp_init() */
|
/* called from main before smp_init() */
|
||||||
|
@ -206,6 +205,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
||||||
while (!cpu_isset(cpu, cpu_callin_map))
|
while (!cpu_isset(cpu, cpu_callin_map))
|
||||||
udelay(100);
|
udelay(100);
|
||||||
|
|
||||||
|
synchronise_count_master(cpu);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -28,12 +28,11 @@ static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0);
|
||||||
#define COUNTON 100
|
#define COUNTON 100
|
||||||
#define NR_LOOPS 5
|
#define NR_LOOPS 5
|
||||||
|
|
||||||
void __cpuinit synchronise_count_master(void)
|
void __cpuinit synchronise_count_master(int cpu)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
unsigned int initcount;
|
unsigned int initcount;
|
||||||
int nslaves;
|
|
||||||
|
|
||||||
#ifdef CONFIG_MIPS_MT_SMTC
|
#ifdef CONFIG_MIPS_MT_SMTC
|
||||||
/*
|
/*
|
||||||
|
@ -43,8 +42,7 @@ void __cpuinit synchronise_count_master(void)
|
||||||
return;
|
return;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
printk(KERN_INFO "Synchronize counters across %u CPUs: ",
|
printk(KERN_INFO "Synchronize counters for CPU %u: ", cpu);
|
||||||
num_online_cpus());
|
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
|
|
||||||
|
@ -52,7 +50,7 @@ void __cpuinit synchronise_count_master(void)
|
||||||
* Notify the slaves that it's time to start
|
* Notify the slaves that it's time to start
|
||||||
*/
|
*/
|
||||||
atomic_set(&count_reference, read_c0_count());
|
atomic_set(&count_reference, read_c0_count());
|
||||||
atomic_set(&count_start_flag, 1);
|
atomic_set(&count_start_flag, cpu);
|
||||||
smp_wmb();
|
smp_wmb();
|
||||||
|
|
||||||
/* Count will be initialised to current timer for all CPU's */
|
/* Count will be initialised to current timer for all CPU's */
|
||||||
|
@ -69,10 +67,9 @@ void __cpuinit synchronise_count_master(void)
|
||||||
* two CPUs.
|
* two CPUs.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
nslaves = num_online_cpus()-1;
|
|
||||||
for (i = 0; i < NR_LOOPS; i++) {
|
for (i = 0; i < NR_LOOPS; i++) {
|
||||||
/* slaves loop on '!= ncpus' */
|
/* slaves loop on '!= 2' */
|
||||||
while (atomic_read(&count_count_start) != nslaves)
|
while (atomic_read(&count_count_start) != 1)
|
||||||
mb();
|
mb();
|
||||||
atomic_set(&count_count_stop, 0);
|
atomic_set(&count_count_stop, 0);
|
||||||
smp_wmb();
|
smp_wmb();
|
||||||
|
@ -89,7 +86,7 @@ void __cpuinit synchronise_count_master(void)
|
||||||
/*
|
/*
|
||||||
* Wait for all slaves to leave the synchronization point:
|
* Wait for all slaves to leave the synchronization point:
|
||||||
*/
|
*/
|
||||||
while (atomic_read(&count_count_stop) != nslaves)
|
while (atomic_read(&count_count_stop) != 1)
|
||||||
mb();
|
mb();
|
||||||
atomic_set(&count_count_start, 0);
|
atomic_set(&count_count_start, 0);
|
||||||
smp_wmb();
|
smp_wmb();
|
||||||
|
@ -97,6 +94,7 @@ void __cpuinit synchronise_count_master(void)
|
||||||
}
|
}
|
||||||
/* Arrange for an interrupt in a short while */
|
/* Arrange for an interrupt in a short while */
|
||||||
write_c0_compare(read_c0_count() + COUNTON);
|
write_c0_compare(read_c0_count() + COUNTON);
|
||||||
|
atomic_set(&count_start_flag, 0);
|
||||||
|
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
|
@ -108,11 +106,10 @@ void __cpuinit synchronise_count_master(void)
|
||||||
printk("done.\n");
|
printk("done.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
void __cpuinit synchronise_count_slave(void)
|
void __cpuinit synchronise_count_slave(int cpu)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
unsigned int initcount;
|
unsigned int initcount;
|
||||||
int ncpus;
|
|
||||||
|
|
||||||
#ifdef CONFIG_MIPS_MT_SMTC
|
#ifdef CONFIG_MIPS_MT_SMTC
|
||||||
/*
|
/*
|
||||||
|
@ -127,16 +124,15 @@ void __cpuinit synchronise_count_slave(void)
|
||||||
* so we first wait for the master to say everyone is ready
|
* so we first wait for the master to say everyone is ready
|
||||||
*/
|
*/
|
||||||
|
|
||||||
while (!atomic_read(&count_start_flag))
|
while (atomic_read(&count_start_flag) != cpu)
|
||||||
mb();
|
mb();
|
||||||
|
|
||||||
/* Count will be initialised to next expire for all CPU's */
|
/* Count will be initialised to next expire for all CPU's */
|
||||||
initcount = atomic_read(&count_reference);
|
initcount = atomic_read(&count_reference);
|
||||||
|
|
||||||
ncpus = num_online_cpus();
|
|
||||||
for (i = 0; i < NR_LOOPS; i++) {
|
for (i = 0; i < NR_LOOPS; i++) {
|
||||||
atomic_inc(&count_count_start);
|
atomic_inc(&count_count_start);
|
||||||
while (atomic_read(&count_count_start) != ncpus)
|
while (atomic_read(&count_count_start) != 2)
|
||||||
mb();
|
mb();
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -146,7 +142,7 @@ void __cpuinit synchronise_count_slave(void)
|
||||||
write_c0_count(initcount);
|
write_c0_count(initcount);
|
||||||
|
|
||||||
atomic_inc(&count_count_stop);
|
atomic_inc(&count_count_stop);
|
||||||
while (atomic_read(&count_count_stop) != ncpus)
|
while (atomic_read(&count_count_stop) != 2)
|
||||||
mb();
|
mb();
|
||||||
}
|
}
|
||||||
/* Arrange for an interrupt in a short while */
|
/* Arrange for an interrupt in a short while */
|
||||||
|
|
|
@ -252,16 +252,3 @@ void __init mips_pcibios_init(void)
|
||||||
|
|
||||||
register_pci_controller(controller);
|
register_pci_controller(controller);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Enable PCI 2.1 compatibility in PIIX4 */
|
|
||||||
static void __devinit quirk_dlcsetup(struct pci_dev *dev)
|
|
||||||
{
|
|
||||||
u8 odlc, ndlc;
|
|
||||||
(void) pci_read_config_byte(dev, 0x82, &odlc);
|
|
||||||
/* Enable passive releases and delayed transaction */
|
|
||||||
ndlc = odlc | 7;
|
|
||||||
(void) pci_write_config_byte(dev, 0x82, ndlc);
|
|
||||||
}
|
|
||||||
|
|
||||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
|
|
||||||
quirk_dlcsetup);
|
|
||||||
|
|
|
@ -23,9 +23,12 @@
|
||||||
#define AR724X_PCI_MEM_BASE 0x10000000
|
#define AR724X_PCI_MEM_BASE 0x10000000
|
||||||
#define AR724X_PCI_MEM_SIZE 0x08000000
|
#define AR724X_PCI_MEM_SIZE 0x08000000
|
||||||
|
|
||||||
|
#define AR724X_PCI_REG_RESET 0x18
|
||||||
#define AR724X_PCI_REG_INT_STATUS 0x4c
|
#define AR724X_PCI_REG_INT_STATUS 0x4c
|
||||||
#define AR724X_PCI_REG_INT_MASK 0x50
|
#define AR724X_PCI_REG_INT_MASK 0x50
|
||||||
|
|
||||||
|
#define AR724X_PCI_RESET_LINK_UP BIT(0)
|
||||||
|
|
||||||
#define AR724X_PCI_INT_DEV0 BIT(14)
|
#define AR724X_PCI_INT_DEV0 BIT(14)
|
||||||
|
|
||||||
#define AR724X_PCI_IRQ_COUNT 1
|
#define AR724X_PCI_IRQ_COUNT 1
|
||||||
|
@ -38,6 +41,15 @@ static void __iomem *ar724x_pci_ctrl_base;
|
||||||
|
|
||||||
static u32 ar724x_pci_bar0_value;
|
static u32 ar724x_pci_bar0_value;
|
||||||
static bool ar724x_pci_bar0_is_cached;
|
static bool ar724x_pci_bar0_is_cached;
|
||||||
|
static bool ar724x_pci_link_up;
|
||||||
|
|
||||||
|
static inline bool ar724x_pci_check_link(void)
|
||||||
|
{
|
||||||
|
u32 reset;
|
||||||
|
|
||||||
|
reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET);
|
||||||
|
return reset & AR724X_PCI_RESET_LINK_UP;
|
||||||
|
}
|
||||||
|
|
||||||
static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
|
static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
|
||||||
int size, uint32_t *value)
|
int size, uint32_t *value)
|
||||||
|
@ -46,6 +58,9 @@ static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
|
||||||
void __iomem *base;
|
void __iomem *base;
|
||||||
u32 data;
|
u32 data;
|
||||||
|
|
||||||
|
if (!ar724x_pci_link_up)
|
||||||
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
|
||||||
if (devfn)
|
if (devfn)
|
||||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
|
||||||
|
@ -96,6 +111,9 @@ static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
|
||||||
u32 data;
|
u32 data;
|
||||||
int s;
|
int s;
|
||||||
|
|
||||||
|
if (!ar724x_pci_link_up)
|
||||||
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
|
||||||
if (devfn)
|
if (devfn)
|
||||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
|
||||||
|
@ -280,6 +298,10 @@ int __init ar724x_pcibios_init(int irq)
|
||||||
if (ar724x_pci_ctrl_base == NULL)
|
if (ar724x_pci_ctrl_base == NULL)
|
||||||
goto err_unmap_devcfg;
|
goto err_unmap_devcfg;
|
||||||
|
|
||||||
|
ar724x_pci_link_up = ar724x_pci_check_link();
|
||||||
|
if (!ar724x_pci_link_up)
|
||||||
|
pr_warn("ar724x: PCIe link is down\n");
|
||||||
|
|
||||||
ar724x_pci_irq_init(irq);
|
ar724x_pci_irq_init(irq);
|
||||||
register_pci_controller(&ar724x_pci_controller);
|
register_pci_controller(&ar724x_pci_controller);
|
||||||
|
|
||||||
|
|
|
@ -141,7 +141,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
||||||
|
|
||||||
#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
|
#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
|
||||||
|
|
||||||
#define ATOMIC_INIT(i) ((atomic_t) { (i) })
|
#define ATOMIC_INIT(i) { (i) }
|
||||||
|
|
||||||
#define smp_mb__before_atomic_dec() smp_mb()
|
#define smp_mb__before_atomic_dec() smp_mb()
|
||||||
#define smp_mb__after_atomic_dec() smp_mb()
|
#define smp_mb__after_atomic_dec() smp_mb()
|
||||||
|
@ -150,7 +150,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
||||||
|
|
||||||
#ifdef CONFIG_64BIT
|
#ifdef CONFIG_64BIT
|
||||||
|
|
||||||
#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
|
#define ATOMIC64_INIT(i) { (i) }
|
||||||
|
|
||||||
static __inline__ s64
|
static __inline__ s64
|
||||||
__atomic64_add_return(s64 i, atomic64_t *v)
|
__atomic64_add_return(s64 i, atomic64_t *v)
|
||||||
|
|
|
@ -309,7 +309,7 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
|
||||||
cregs->ksp = (unsigned long)stack
|
cregs->ksp = (unsigned long)stack
|
||||||
+ (pregs->gr[21] & (THREAD_SIZE - 1));
|
+ (pregs->gr[21] & (THREAD_SIZE - 1));
|
||||||
cregs->gr[30] = usp;
|
cregs->gr[30] = usp;
|
||||||
if (p->personality == PER_HPUX) {
|
if (personality(p->personality) == PER_HPUX) {
|
||||||
#ifdef CONFIG_HPUX
|
#ifdef CONFIG_HPUX
|
||||||
cregs->kpc = (unsigned long) &hpux_child_return;
|
cregs->kpc = (unsigned long) &hpux_child_return;
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -225,12 +225,12 @@ long parisc_personality(unsigned long personality)
|
||||||
long err;
|
long err;
|
||||||
|
|
||||||
if (personality(current->personality) == PER_LINUX32
|
if (personality(current->personality) == PER_LINUX32
|
||||||
&& personality == PER_LINUX)
|
&& personality(personality) == PER_LINUX)
|
||||||
personality = PER_LINUX32;
|
personality = (personality & ~PER_MASK) | PER_LINUX32;
|
||||||
|
|
||||||
err = sys_personality(personality);
|
err = sys_personality(personality);
|
||||||
if (err == PER_LINUX32)
|
if (personality(err) == PER_LINUX32)
|
||||||
err = PER_LINUX;
|
err = (err & ~PER_MASK) | PER_LINUX;
|
||||||
|
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
|
@ -345,6 +345,13 @@
|
||||||
/include/ "qoriq-duart-1.dtsi"
|
/include/ "qoriq-duart-1.dtsi"
|
||||||
/include/ "qoriq-gpio-0.dtsi"
|
/include/ "qoriq-gpio-0.dtsi"
|
||||||
/include/ "qoriq-usb2-mph-0.dtsi"
|
/include/ "qoriq-usb2-mph-0.dtsi"
|
||||||
|
usb@210000 {
|
||||||
|
compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||||
|
port0;
|
||||||
|
};
|
||||||
/include/ "qoriq-usb2-dr-0.dtsi"
|
/include/ "qoriq-usb2-dr-0.dtsi"
|
||||||
|
usb@211000 {
|
||||||
|
compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||||
|
};
|
||||||
/include/ "qoriq-sec4.0-0.dtsi"
|
/include/ "qoriq-sec4.0-0.dtsi"
|
||||||
};
|
};
|
||||||
|
|
|
@ -6,28 +6,27 @@ CONFIG_SYSVIPC=y
|
||||||
CONFIG_POSIX_MQUEUE=y
|
CONFIG_POSIX_MQUEUE=y
|
||||||
CONFIG_BSD_PROCESS_ACCT=y
|
CONFIG_BSD_PROCESS_ACCT=y
|
||||||
CONFIG_AUDIT=y
|
CONFIG_AUDIT=y
|
||||||
CONFIG_SPARSE_IRQ=y
|
CONFIG_IRQ_DOMAIN_DEBUG=y
|
||||||
|
CONFIG_NO_HZ=y
|
||||||
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
CONFIG_BLK_DEV_INITRD=y
|
CONFIG_BLK_DEV_INITRD=y
|
||||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
|
||||||
CONFIG_KALLSYMS_ALL=y
|
CONFIG_KALLSYMS_ALL=y
|
||||||
CONFIG_KALLSYMS_EXTRA_PASS=y
|
|
||||||
CONFIG_EMBEDDED=y
|
CONFIG_EMBEDDED=y
|
||||||
CONFIG_MODULES=y
|
CONFIG_MODULES=y
|
||||||
CONFIG_MODULE_UNLOAD=y
|
CONFIG_MODULE_UNLOAD=y
|
||||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||||
CONFIG_MODVERSIONS=y
|
CONFIG_MODVERSIONS=y
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
|
CONFIG_MAC_PARTITION=y
|
||||||
CONFIG_P1023_RDS=y
|
CONFIG_P1023_RDS=y
|
||||||
CONFIG_QUICC_ENGINE=y
|
CONFIG_QUICC_ENGINE=y
|
||||||
CONFIG_QE_GPIO=y
|
CONFIG_QE_GPIO=y
|
||||||
CONFIG_CPM2=y
|
CONFIG_CPM2=y
|
||||||
CONFIG_GPIO_MPC8XXX=y
|
|
||||||
CONFIG_HIGHMEM=y
|
CONFIG_HIGHMEM=y
|
||||||
CONFIG_NO_HZ=y
|
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
|
||||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||||
CONFIG_BINFMT_MISC=m
|
CONFIG_BINFMT_MISC=m
|
||||||
CONFIG_MATH_EMULATION=y
|
CONFIG_MATH_EMULATION=y
|
||||||
|
@ -63,11 +62,11 @@ CONFIG_INET_ESP=y
|
||||||
CONFIG_IPV6=y
|
CONFIG_IPV6=y
|
||||||
CONFIG_IP_SCTP=m
|
CONFIG_IP_SCTP=m
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_PROC_DEVICETREE=y
|
CONFIG_PROC_DEVICETREE=y
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
CONFIG_BLK_DEV_LOOP=y
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=131072
|
CONFIG_BLK_DEV_RAM_SIZE=131072
|
||||||
CONFIG_MISC_DEVICES=y
|
|
||||||
CONFIG_EEPROM_LEGACY=y
|
CONFIG_EEPROM_LEGACY=y
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
CONFIG_CHR_DEV_ST=y
|
CONFIG_CHR_DEV_ST=y
|
||||||
|
@ -80,15 +79,14 @@ CONFIG_SATA_FSL=y
|
||||||
CONFIG_SATA_SIL24=y
|
CONFIG_SATA_SIL24=y
|
||||||
CONFIG_NETDEVICES=y
|
CONFIG_NETDEVICES=y
|
||||||
CONFIG_DUMMY=y
|
CONFIG_DUMMY=y
|
||||||
|
CONFIG_FS_ENET=y
|
||||||
|
CONFIG_FSL_PQ_MDIO=y
|
||||||
|
CONFIG_E1000E=y
|
||||||
CONFIG_MARVELL_PHY=y
|
CONFIG_MARVELL_PHY=y
|
||||||
CONFIG_DAVICOM_PHY=y
|
CONFIG_DAVICOM_PHY=y
|
||||||
CONFIG_CICADA_PHY=y
|
CONFIG_CICADA_PHY=y
|
||||||
CONFIG_VITESSE_PHY=y
|
CONFIG_VITESSE_PHY=y
|
||||||
CONFIG_FIXED_PHY=y
|
CONFIG_FIXED_PHY=y
|
||||||
CONFIG_NET_ETHERNET=y
|
|
||||||
CONFIG_FS_ENET=y
|
|
||||||
CONFIG_E1000E=y
|
|
||||||
CONFIG_FSL_PQ_MDIO=y
|
|
||||||
CONFIG_INPUT_FF_MEMLESS=m
|
CONFIG_INPUT_FF_MEMLESS=m
|
||||||
# CONFIG_INPUT_MOUSEDEV is not set
|
# CONFIG_INPUT_MOUSEDEV is not set
|
||||||
# CONFIG_INPUT_KEYBOARD is not set
|
# CONFIG_INPUT_KEYBOARD is not set
|
||||||
|
@ -98,16 +96,15 @@ CONFIG_SERIAL_8250=y
|
||||||
CONFIG_SERIAL_8250_CONSOLE=y
|
CONFIG_SERIAL_8250_CONSOLE=y
|
||||||
CONFIG_SERIAL_8250_NR_UARTS=2
|
CONFIG_SERIAL_8250_NR_UARTS=2
|
||||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
||||||
CONFIG_SERIAL_8250_EXTENDED=y
|
|
||||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||||
CONFIG_SERIAL_8250_RSA=y
|
CONFIG_SERIAL_8250_RSA=y
|
||||||
CONFIG_SERIAL_QE=m
|
CONFIG_SERIAL_QE=m
|
||||||
CONFIG_HW_RANDOM=y
|
|
||||||
CONFIG_NVRAM=y
|
CONFIG_NVRAM=y
|
||||||
CONFIG_I2C=y
|
CONFIG_I2C=y
|
||||||
CONFIG_I2C_CPM=m
|
CONFIG_I2C_CPM=m
|
||||||
CONFIG_I2C_MPC=y
|
CONFIG_I2C_MPC=y
|
||||||
|
CONFIG_GPIO_MPC8XXX=y
|
||||||
# CONFIG_HWMON is not set
|
# CONFIG_HWMON is not set
|
||||||
CONFIG_VIDEO_OUTPUT_CONTROL=y
|
CONFIG_VIDEO_OUTPUT_CONTROL=y
|
||||||
CONFIG_SOUND=y
|
CONFIG_SOUND=y
|
||||||
|
@ -123,7 +120,6 @@ CONFIG_DMADEVICES=y
|
||||||
CONFIG_FSL_DMA=y
|
CONFIG_FSL_DMA=y
|
||||||
# CONFIG_NET_DMA is not set
|
# CONFIG_NET_DMA is not set
|
||||||
CONFIG_STAGING=y
|
CONFIG_STAGING=y
|
||||||
# CONFIG_STAGING_EXCLUDE_BUILD is not set
|
|
||||||
CONFIG_EXT2_FS=y
|
CONFIG_EXT2_FS=y
|
||||||
CONFIG_EXT3_FS=y
|
CONFIG_EXT3_FS=y
|
||||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||||
|
@ -150,22 +146,15 @@ CONFIG_QNX4FS_FS=m
|
||||||
CONFIG_SYSV_FS=m
|
CONFIG_SYSV_FS=m
|
||||||
CONFIG_UFS_FS=m
|
CONFIG_UFS_FS=m
|
||||||
CONFIG_NFS_FS=y
|
CONFIG_NFS_FS=y
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_NFS_V4=y
|
CONFIG_NFS_V4=y
|
||||||
CONFIG_ROOT_NFS=y
|
CONFIG_ROOT_NFS=y
|
||||||
CONFIG_NFSD=y
|
CONFIG_NFSD=y
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
CONFIG_MAC_PARTITION=y
|
|
||||||
CONFIG_CRC_T10DIF=y
|
CONFIG_CRC_T10DIF=y
|
||||||
CONFIG_FRAME_WARN=8092
|
CONFIG_FRAME_WARN=8092
|
||||||
CONFIG_DEBUG_FS=y
|
CONFIG_DEBUG_FS=y
|
||||||
CONFIG_DEBUG_KERNEL=y
|
|
||||||
CONFIG_DETECT_HUNG_TASK=y
|
CONFIG_DETECT_HUNG_TASK=y
|
||||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
|
||||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
|
||||||
CONFIG_IRQ_DOMAIN_DEBUG=y
|
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_SHA256=y
|
CONFIG_CRYPTO_SHA256=y
|
||||||
CONFIG_CRYPTO_SHA512=y
|
CONFIG_CRYPTO_SHA512=y
|
||||||
|
|
|
@ -6,8 +6,8 @@ CONFIG_SYSVIPC=y
|
||||||
CONFIG_POSIX_MQUEUE=y
|
CONFIG_POSIX_MQUEUE=y
|
||||||
CONFIG_BSD_PROCESS_ACCT=y
|
CONFIG_BSD_PROCESS_ACCT=y
|
||||||
CONFIG_AUDIT=y
|
CONFIG_AUDIT=y
|
||||||
CONFIG_SPARSE_IRQ=y
|
CONFIG_NO_HZ=y
|
||||||
CONFIG_RCU_TRACE=y
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
|
@ -21,23 +21,22 @@ CONFIG_MODULE_UNLOAD=y
|
||||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||||
CONFIG_MODVERSIONS=y
|
CONFIG_MODVERSIONS=y
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
|
CONFIG_MAC_PARTITION=y
|
||||||
CONFIG_P2041_RDB=y
|
CONFIG_P2041_RDB=y
|
||||||
CONFIG_P3041_DS=y
|
CONFIG_P3041_DS=y
|
||||||
CONFIG_P4080_DS=y
|
CONFIG_P4080_DS=y
|
||||||
CONFIG_P5020_DS=y
|
CONFIG_P5020_DS=y
|
||||||
CONFIG_HIGHMEM=y
|
CONFIG_HIGHMEM=y
|
||||||
CONFIG_NO_HZ=y
|
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
|
||||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||||
CONFIG_BINFMT_MISC=m
|
CONFIG_BINFMT_MISC=m
|
||||||
CONFIG_KEXEC=y
|
CONFIG_KEXEC=y
|
||||||
CONFIG_IRQ_ALL_CPUS=y
|
CONFIG_IRQ_ALL_CPUS=y
|
||||||
CONFIG_FORCE_MAX_ZONEORDER=13
|
CONFIG_FORCE_MAX_ZONEORDER=13
|
||||||
CONFIG_FSL_LBC=y
|
|
||||||
CONFIG_PCI=y
|
CONFIG_PCI=y
|
||||||
CONFIG_PCIEPORTBUS=y
|
CONFIG_PCIEPORTBUS=y
|
||||||
CONFIG_PCI_MSI=y
|
|
||||||
# CONFIG_PCIEASPM is not set
|
# CONFIG_PCIEASPM is not set
|
||||||
|
CONFIG_PCI_MSI=y
|
||||||
CONFIG_RAPIDIO=y
|
CONFIG_RAPIDIO=y
|
||||||
CONFIG_FSL_RIO=y
|
CONFIG_FSL_RIO=y
|
||||||
CONFIG_NET=y
|
CONFIG_NET=y
|
||||||
|
@ -70,6 +69,7 @@ CONFIG_INET_IPCOMP=y
|
||||||
CONFIG_IPV6=y
|
CONFIG_IPV6=y
|
||||||
CONFIG_IP_SCTP=m
|
CONFIG_IP_SCTP=m
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
CONFIG_MTD_CHAR=y
|
CONFIG_MTD_CHAR=y
|
||||||
|
@ -77,17 +77,14 @@ CONFIG_MTD_BLOCK=y
|
||||||
CONFIG_MTD_CFI=y
|
CONFIG_MTD_CFI=y
|
||||||
CONFIG_MTD_CFI_AMDSTD=y
|
CONFIG_MTD_CFI_AMDSTD=y
|
||||||
CONFIG_MTD_PHYSMAP_OF=y
|
CONFIG_MTD_PHYSMAP_OF=y
|
||||||
CONFIG_MTD_NAND=y
|
|
||||||
CONFIG_MTD_NAND_ECC=y
|
|
||||||
CONFIG_MTD_NAND_IDS=y
|
|
||||||
CONFIG_MTD_NAND_FSL_IFC=y
|
|
||||||
CONFIG_MTD_NAND_FSL_ELBC=y
|
|
||||||
CONFIG_MTD_M25P80=y
|
CONFIG_MTD_M25P80=y
|
||||||
|
CONFIG_MTD_NAND=y
|
||||||
|
CONFIG_MTD_NAND_FSL_ELBC=y
|
||||||
|
CONFIG_MTD_NAND_FSL_IFC=y
|
||||||
CONFIG_PROC_DEVICETREE=y
|
CONFIG_PROC_DEVICETREE=y
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
CONFIG_BLK_DEV_LOOP=y
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=131072
|
CONFIG_BLK_DEV_RAM_SIZE=131072
|
||||||
CONFIG_MISC_DEVICES=y
|
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
CONFIG_CHR_DEV_ST=y
|
CONFIG_CHR_DEV_ST=y
|
||||||
CONFIG_BLK_DEV_SR=y
|
CONFIG_BLK_DEV_SR=y
|
||||||
|
@ -115,11 +112,9 @@ CONFIG_SERIO_LIBPS2=y
|
||||||
CONFIG_PPC_EPAPR_HV_BYTECHAN=y
|
CONFIG_PPC_EPAPR_HV_BYTECHAN=y
|
||||||
CONFIG_SERIAL_8250=y
|
CONFIG_SERIAL_8250=y
|
||||||
CONFIG_SERIAL_8250_CONSOLE=y
|
CONFIG_SERIAL_8250_CONSOLE=y
|
||||||
CONFIG_SERIAL_8250_EXTENDED=y
|
|
||||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||||
CONFIG_SERIAL_8250_RSA=y
|
CONFIG_SERIAL_8250_RSA=y
|
||||||
CONFIG_HW_RANDOM=y
|
|
||||||
CONFIG_NVRAM=y
|
CONFIG_NVRAM=y
|
||||||
CONFIG_I2C=y
|
CONFIG_I2C=y
|
||||||
CONFIG_I2C_CHARDEV=y
|
CONFIG_I2C_CHARDEV=y
|
||||||
|
@ -132,7 +127,6 @@ CONFIG_SPI_FSL_ESPI=y
|
||||||
CONFIG_VIDEO_OUTPUT_CONTROL=y
|
CONFIG_VIDEO_OUTPUT_CONTROL=y
|
||||||
CONFIG_USB_HID=m
|
CONFIG_USB_HID=m
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
CONFIG_USB_DEVICEFS=y
|
|
||||||
CONFIG_USB_MON=y
|
CONFIG_USB_MON=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_EHCI_HCD=y
|
||||||
CONFIG_USB_EHCI_FSL=y
|
CONFIG_USB_EHCI_FSL=y
|
||||||
|
@ -142,8 +136,6 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
|
||||||
CONFIG_USB_STORAGE=y
|
CONFIG_USB_STORAGE=y
|
||||||
CONFIG_MMC=y
|
CONFIG_MMC=y
|
||||||
CONFIG_MMC_SDHCI=y
|
CONFIG_MMC_SDHCI=y
|
||||||
CONFIG_MMC_SDHCI_OF=y
|
|
||||||
CONFIG_MMC_SDHCI_OF_ESDHC=y
|
|
||||||
CONFIG_EDAC=y
|
CONFIG_EDAC=y
|
||||||
CONFIG_EDAC_MM_EDAC=y
|
CONFIG_EDAC_MM_EDAC=y
|
||||||
CONFIG_EDAC_MPC85XX=y
|
CONFIG_EDAC_MPC85XX=y
|
||||||
|
@ -170,19 +162,16 @@ CONFIG_HUGETLBFS=y
|
||||||
CONFIG_JFFS2_FS=y
|
CONFIG_JFFS2_FS=y
|
||||||
CONFIG_CRAMFS=y
|
CONFIG_CRAMFS=y
|
||||||
CONFIG_NFS_FS=y
|
CONFIG_NFS_FS=y
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_NFS_V4=y
|
CONFIG_NFS_V4=y
|
||||||
CONFIG_ROOT_NFS=y
|
CONFIG_ROOT_NFS=y
|
||||||
CONFIG_NFSD=m
|
CONFIG_NFSD=m
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
CONFIG_MAC_PARTITION=y
|
|
||||||
CONFIG_NLS_ISO8859_1=y
|
CONFIG_NLS_ISO8859_1=y
|
||||||
CONFIG_NLS_UTF8=m
|
CONFIG_NLS_UTF8=m
|
||||||
CONFIG_MAGIC_SYSRQ=y
|
CONFIG_MAGIC_SYSRQ=y
|
||||||
CONFIG_DEBUG_SHIRQ=y
|
CONFIG_DEBUG_SHIRQ=y
|
||||||
CONFIG_DETECT_HUNG_TASK=y
|
CONFIG_DETECT_HUNG_TASK=y
|
||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
CONFIG_RCU_TRACE=y
|
||||||
CONFIG_CRYPTO_NULL=y
|
CONFIG_CRYPTO_NULL=y
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_MD4=y
|
CONFIG_CRYPTO_MD4=y
|
||||||
|
|
|
@ -56,6 +56,7 @@ CONFIG_INET_ESP=y
|
||||||
CONFIG_IPV6=y
|
CONFIG_IPV6=y
|
||||||
CONFIG_IP_SCTP=m
|
CONFIG_IP_SCTP=m
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
CONFIG_MTD_CHAR=y
|
CONFIG_MTD_CHAR=y
|
||||||
|
|
|
@ -1,8 +1,10 @@
|
||||||
|
CONFIG_PPC64=y
|
||||||
|
CONFIG_ALTIVEC=y
|
||||||
|
CONFIG_SMP=y
|
||||||
|
CONFIG_NR_CPUS=4
|
||||||
CONFIG_EXPERIMENTAL=y
|
CONFIG_EXPERIMENTAL=y
|
||||||
CONFIG_SYSVIPC=y
|
CONFIG_SYSVIPC=y
|
||||||
CONFIG_POSIX_MQUEUE=y
|
CONFIG_POSIX_MQUEUE=y
|
||||||
CONFIG_NO_HZ=y
|
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_BLK_DEV_INITRD=y
|
CONFIG_BLK_DEV_INITRD=y
|
||||||
|
@ -13,15 +15,16 @@ CONFIG_MODULES=y
|
||||||
CONFIG_MODULE_UNLOAD=y
|
CONFIG_MODULE_UNLOAD=y
|
||||||
CONFIG_MODVERSIONS=y
|
CONFIG_MODVERSIONS=y
|
||||||
CONFIG_MODULE_SRCVERSION_ALL=y
|
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
# CONFIG_PPC_PSERIES is not set
|
||||||
CONFIG_MAC_PARTITION=y
|
|
||||||
CONFIG_SMP=y
|
|
||||||
CONFIG_NR_CPUS=4
|
|
||||||
CONFIG_KEXEC=y
|
|
||||||
# CONFIG_RELOCATABLE is not set
|
|
||||||
CONFIG_CPU_FREQ=y
|
CONFIG_CPU_FREQ=y
|
||||||
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
|
||||||
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
CONFIG_CPU_FREQ_GOV_USERSPACE=y
|
||||||
|
CONFIG_CPU_FREQ_PMAC64=y
|
||||||
|
CONFIG_NO_HZ=y
|
||||||
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
|
CONFIG_KEXEC=y
|
||||||
|
CONFIG_IRQ_ALL_CPUS=y
|
||||||
|
# CONFIG_MIGRATION is not set
|
||||||
CONFIG_PCI_MSI=y
|
CONFIG_PCI_MSI=y
|
||||||
CONFIG_NET=y
|
CONFIG_NET=y
|
||||||
CONFIG_PACKET=y
|
CONFIG_PACKET=y
|
||||||
|
@ -49,6 +52,7 @@ CONFIG_NF_CT_NETLINK=m
|
||||||
CONFIG_NF_CONNTRACK_IPV4=m
|
CONFIG_NF_CONNTRACK_IPV4=m
|
||||||
CONFIG_IP_NF_QUEUE=m
|
CONFIG_IP_NF_QUEUE=m
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_PROC_DEVICETREE=y
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
CONFIG_BLK_DEV_LOOP=y
|
||||||
CONFIG_BLK_DEV_NBD=m
|
CONFIG_BLK_DEV_NBD=m
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
|
@ -56,6 +60,8 @@ CONFIG_BLK_DEV_RAM_SIZE=65536
|
||||||
CONFIG_CDROM_PKTCDVD=m
|
CONFIG_CDROM_PKTCDVD=m
|
||||||
CONFIG_IDE=y
|
CONFIG_IDE=y
|
||||||
CONFIG_BLK_DEV_IDECD=y
|
CONFIG_BLK_DEV_IDECD=y
|
||||||
|
CONFIG_BLK_DEV_IDE_PMAC=y
|
||||||
|
CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
CONFIG_CHR_DEV_ST=y
|
CONFIG_CHR_DEV_ST=y
|
||||||
CONFIG_BLK_DEV_SR=y
|
CONFIG_BLK_DEV_SR=y
|
||||||
|
@ -79,24 +85,33 @@ CONFIG_DM_CRYPT=m
|
||||||
CONFIG_DM_SNAPSHOT=m
|
CONFIG_DM_SNAPSHOT=m
|
||||||
CONFIG_DM_MIRROR=m
|
CONFIG_DM_MIRROR=m
|
||||||
CONFIG_DM_ZERO=m
|
CONFIG_DM_ZERO=m
|
||||||
CONFIG_MACINTOSH_DRIVERS=y
|
CONFIG_IEEE1394=y
|
||||||
|
CONFIG_IEEE1394_OHCI1394=y
|
||||||
|
CONFIG_IEEE1394_SBP2=m
|
||||||
|
CONFIG_IEEE1394_ETH1394=m
|
||||||
|
CONFIG_IEEE1394_RAWIO=y
|
||||||
|
CONFIG_IEEE1394_VIDEO1394=m
|
||||||
|
CONFIG_IEEE1394_DV1394=m
|
||||||
|
CONFIG_ADB_PMU=y
|
||||||
|
CONFIG_PMAC_SMU=y
|
||||||
CONFIG_MAC_EMUMOUSEBTN=y
|
CONFIG_MAC_EMUMOUSEBTN=y
|
||||||
|
CONFIG_THERM_PM72=y
|
||||||
|
CONFIG_WINDFARM=y
|
||||||
|
CONFIG_WINDFARM_PM81=y
|
||||||
|
CONFIG_WINDFARM_PM91=y
|
||||||
|
CONFIG_WINDFARM_PM112=y
|
||||||
|
CONFIG_WINDFARM_PM121=y
|
||||||
CONFIG_NETDEVICES=y
|
CONFIG_NETDEVICES=y
|
||||||
CONFIG_BONDING=m
|
|
||||||
CONFIG_DUMMY=m
|
CONFIG_DUMMY=m
|
||||||
CONFIG_MII=y
|
CONFIG_BONDING=m
|
||||||
CONFIG_TUN=m
|
CONFIG_TUN=m
|
||||||
|
CONFIG_NET_ETHERNET=y
|
||||||
|
CONFIG_MII=y
|
||||||
|
CONFIG_SUNGEM=y
|
||||||
CONFIG_ACENIC=m
|
CONFIG_ACENIC=m
|
||||||
CONFIG_ACENIC_OMIT_TIGON_I=y
|
CONFIG_ACENIC_OMIT_TIGON_I=y
|
||||||
CONFIG_TIGON3=y
|
|
||||||
CONFIG_E1000=y
|
CONFIG_E1000=y
|
||||||
CONFIG_SUNGEM=y
|
CONFIG_TIGON3=y
|
||||||
CONFIG_PPP=m
|
|
||||||
CONFIG_PPP_BSDCOMP=m
|
|
||||||
CONFIG_PPP_DEFLATE=m
|
|
||||||
CONFIG_PPPOE=m
|
|
||||||
CONFIG_PPP_ASYNC=m
|
|
||||||
CONFIG_PPP_SYNC_TTY=m
|
|
||||||
CONFIG_USB_CATC=m
|
CONFIG_USB_CATC=m
|
||||||
CONFIG_USB_KAWETH=m
|
CONFIG_USB_KAWETH=m
|
||||||
CONFIG_USB_PEGASUS=m
|
CONFIG_USB_PEGASUS=m
|
||||||
|
@ -106,24 +121,36 @@ CONFIG_USB_USBNET=m
|
||||||
# CONFIG_USB_NET_NET1080 is not set
|
# CONFIG_USB_NET_NET1080 is not set
|
||||||
# CONFIG_USB_NET_CDC_SUBSET is not set
|
# CONFIG_USB_NET_CDC_SUBSET is not set
|
||||||
# CONFIG_USB_NET_ZAURUS is not set
|
# CONFIG_USB_NET_ZAURUS is not set
|
||||||
|
CONFIG_PPP=m
|
||||||
|
CONFIG_PPP_ASYNC=m
|
||||||
|
CONFIG_PPP_SYNC_TTY=m
|
||||||
|
CONFIG_PPP_DEFLATE=m
|
||||||
|
CONFIG_PPP_BSDCOMP=m
|
||||||
|
CONFIG_PPPOE=m
|
||||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||||
CONFIG_INPUT_JOYDEV=m
|
CONFIG_INPUT_JOYDEV=m
|
||||||
CONFIG_INPUT_EVDEV=y
|
CONFIG_INPUT_EVDEV=y
|
||||||
|
# CONFIG_KEYBOARD_ATKBD is not set
|
||||||
# CONFIG_MOUSE_PS2 is not set
|
# CONFIG_MOUSE_PS2 is not set
|
||||||
|
# CONFIG_SERIO_I8042 is not set
|
||||||
# CONFIG_SERIO_SERPORT is not set
|
# CONFIG_SERIO_SERPORT is not set
|
||||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
|
||||||
# CONFIG_HW_RANDOM is not set
|
# CONFIG_HW_RANDOM is not set
|
||||||
CONFIG_GEN_RTC=y
|
CONFIG_GEN_RTC=y
|
||||||
CONFIG_RAW_DRIVER=y
|
CONFIG_RAW_DRIVER=y
|
||||||
CONFIG_I2C_CHARDEV=y
|
CONFIG_I2C_CHARDEV=y
|
||||||
# CONFIG_HWMON is not set
|
# CONFIG_HWMON is not set
|
||||||
CONFIG_AGP=y
|
CONFIG_AGP=m
|
||||||
CONFIG_DRM=y
|
CONFIG_AGP_UNINORTH=m
|
||||||
CONFIG_DRM_NOUVEAU=y
|
|
||||||
CONFIG_VIDEO_OUTPUT_CONTROL=m
|
CONFIG_VIDEO_OUTPUT_CONTROL=m
|
||||||
|
CONFIG_FB=y
|
||||||
CONFIG_FIRMWARE_EDID=y
|
CONFIG_FIRMWARE_EDID=y
|
||||||
CONFIG_FB_TILEBLITTING=y
|
CONFIG_FB_TILEBLITTING=y
|
||||||
|
CONFIG_FB_OF=y
|
||||||
|
CONFIG_FB_NVIDIA=y
|
||||||
|
CONFIG_FB_NVIDIA_I2C=y
|
||||||
CONFIG_FB_RADEON=y
|
CONFIG_FB_RADEON=y
|
||||||
|
# CONFIG_VGA_CONSOLE is not set
|
||||||
|
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||||
CONFIG_LOGO=y
|
CONFIG_LOGO=y
|
||||||
CONFIG_SOUND=m
|
CONFIG_SOUND=m
|
||||||
CONFIG_SND=m
|
CONFIG_SND=m
|
||||||
|
@ -131,7 +158,15 @@ CONFIG_SND_SEQUENCER=m
|
||||||
CONFIG_SND_MIXER_OSS=m
|
CONFIG_SND_MIXER_OSS=m
|
||||||
CONFIG_SND_PCM_OSS=m
|
CONFIG_SND_PCM_OSS=m
|
||||||
CONFIG_SND_SEQUENCER_OSS=y
|
CONFIG_SND_SEQUENCER_OSS=y
|
||||||
|
CONFIG_SND_POWERMAC=m
|
||||||
|
CONFIG_SND_AOA=m
|
||||||
|
CONFIG_SND_AOA_FABRIC_LAYOUT=m
|
||||||
|
CONFIG_SND_AOA_ONYX=m
|
||||||
|
CONFIG_SND_AOA_TAS=m
|
||||||
|
CONFIG_SND_AOA_TOONIE=m
|
||||||
CONFIG_SND_USB_AUDIO=m
|
CONFIG_SND_USB_AUDIO=m
|
||||||
|
CONFIG_HID_PID=y
|
||||||
|
CONFIG_USB_HIDDEV=y
|
||||||
CONFIG_HID_GYRATION=y
|
CONFIG_HID_GYRATION=y
|
||||||
CONFIG_LOGITECH_FF=y
|
CONFIG_LOGITECH_FF=y
|
||||||
CONFIG_HID_PANTHERLORD=y
|
CONFIG_HID_PANTHERLORD=y
|
||||||
|
@ -139,12 +174,13 @@ CONFIG_HID_PETALYNX=y
|
||||||
CONFIG_HID_SAMSUNG=y
|
CONFIG_HID_SAMSUNG=y
|
||||||
CONFIG_HID_SONY=y
|
CONFIG_HID_SONY=y
|
||||||
CONFIG_HID_SUNPLUS=y
|
CONFIG_HID_SUNPLUS=y
|
||||||
CONFIG_HID_PID=y
|
|
||||||
CONFIG_USB_HIDDEV=y
|
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
|
CONFIG_USB_DEVICEFS=y
|
||||||
CONFIG_USB_MON=y
|
CONFIG_USB_MON=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
# CONFIG_USB_EHCI_HCD_PPC_OF is not set
|
||||||
CONFIG_USB_OHCI_HCD=y
|
CONFIG_USB_OHCI_HCD=y
|
||||||
|
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
|
||||||
CONFIG_USB_ACM=m
|
CONFIG_USB_ACM=m
|
||||||
CONFIG_USB_PRINTER=y
|
CONFIG_USB_PRINTER=y
|
||||||
CONFIG_USB_STORAGE=y
|
CONFIG_USB_STORAGE=y
|
||||||
|
@ -208,6 +244,8 @@ CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||||
CONFIG_REISERFS_FS_SECURITY=y
|
CONFIG_REISERFS_FS_SECURITY=y
|
||||||
CONFIG_XFS_FS=m
|
CONFIG_XFS_FS=m
|
||||||
CONFIG_XFS_POSIX_ACL=y
|
CONFIG_XFS_POSIX_ACL=y
|
||||||
|
CONFIG_INOTIFY=y
|
||||||
|
CONFIG_AUTOFS_FS=m
|
||||||
CONFIG_ISO9660_FS=y
|
CONFIG_ISO9660_FS=y
|
||||||
CONFIG_JOLIET=y
|
CONFIG_JOLIET=y
|
||||||
CONFIG_ZISOFS=y
|
CONFIG_ZISOFS=y
|
||||||
|
@ -221,12 +259,14 @@ CONFIG_HFS_FS=m
|
||||||
CONFIG_HFSPLUS_FS=m
|
CONFIG_HFSPLUS_FS=m
|
||||||
CONFIG_CRAMFS=y
|
CONFIG_CRAMFS=y
|
||||||
CONFIG_NFS_FS=y
|
CONFIG_NFS_FS=y
|
||||||
|
CONFIG_NFS_V3=y
|
||||||
CONFIG_NFS_V3_ACL=y
|
CONFIG_NFS_V3_ACL=y
|
||||||
CONFIG_NFS_V4=y
|
CONFIG_NFS_V4=y
|
||||||
CONFIG_NFSD=y
|
CONFIG_NFSD=y
|
||||||
CONFIG_NFSD_V3_ACL=y
|
CONFIG_NFSD_V3_ACL=y
|
||||||
CONFIG_NFSD_V4=y
|
CONFIG_NFSD_V4=y
|
||||||
CONFIG_CIFS=m
|
CONFIG_CIFS=m
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
CONFIG_NLS_CODEPAGE_437=y
|
CONFIG_NLS_CODEPAGE_437=y
|
||||||
CONFIG_NLS_CODEPAGE_1250=y
|
CONFIG_NLS_CODEPAGE_1250=y
|
||||||
CONFIG_NLS_CODEPAGE_1251=y
|
CONFIG_NLS_CODEPAGE_1251=y
|
||||||
|
@ -234,23 +274,29 @@ CONFIG_NLS_ASCII=y
|
||||||
CONFIG_NLS_ISO8859_1=y
|
CONFIG_NLS_ISO8859_1=y
|
||||||
CONFIG_NLS_ISO8859_15=y
|
CONFIG_NLS_ISO8859_15=y
|
||||||
CONFIG_NLS_UTF8=y
|
CONFIG_NLS_UTF8=y
|
||||||
|
CONFIG_CRC_T10DIF=y
|
||||||
|
CONFIG_LIBCRC32C=m
|
||||||
CONFIG_MAGIC_SYSRQ=y
|
CONFIG_MAGIC_SYSRQ=y
|
||||||
# CONFIG_UNUSED_SYMBOLS is not set
|
|
||||||
CONFIG_DEBUG_FS=y
|
CONFIG_DEBUG_FS=y
|
||||||
CONFIG_DEBUG_KERNEL=y
|
CONFIG_DEBUG_KERNEL=y
|
||||||
CONFIG_DEBUG_MUTEXES=y
|
CONFIG_DEBUG_MUTEXES=y
|
||||||
|
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||||
CONFIG_LATENCYTOP=y
|
CONFIG_LATENCYTOP=y
|
||||||
CONFIG_STRICT_DEVMEM=y
|
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||||
|
CONFIG_BOOTX_TEXT=y
|
||||||
CONFIG_CRYPTO_NULL=m
|
CONFIG_CRYPTO_NULL=m
|
||||||
CONFIG_CRYPTO_TEST=m
|
CONFIG_CRYPTO_TEST=m
|
||||||
|
CONFIG_CRYPTO_ECB=m
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_HMAC=y
|
CONFIG_CRYPTO_HMAC=y
|
||||||
|
CONFIG_CRYPTO_MD4=m
|
||||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||||
CONFIG_CRYPTO_SHA256=m
|
CONFIG_CRYPTO_SHA256=m
|
||||||
CONFIG_CRYPTO_SHA512=m
|
CONFIG_CRYPTO_SHA512=m
|
||||||
CONFIG_CRYPTO_WP512=m
|
CONFIG_CRYPTO_WP512=m
|
||||||
CONFIG_CRYPTO_AES=m
|
CONFIG_CRYPTO_AES=m
|
||||||
CONFIG_CRYPTO_ANUBIS=m
|
CONFIG_CRYPTO_ANUBIS=m
|
||||||
|
CONFIG_CRYPTO_ARC4=m
|
||||||
CONFIG_CRYPTO_BLOWFISH=m
|
CONFIG_CRYPTO_BLOWFISH=m
|
||||||
CONFIG_CRYPTO_CAST5=m
|
CONFIG_CRYPTO_CAST5=m
|
||||||
CONFIG_CRYPTO_CAST6=m
|
CONFIG_CRYPTO_CAST6=m
|
||||||
|
@ -260,6 +306,3 @@ CONFIG_CRYPTO_TEA=m
|
||||||
CONFIG_CRYPTO_TWOFISH=m
|
CONFIG_CRYPTO_TWOFISH=m
|
||||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||||
# CONFIG_CRYPTO_HW is not set
|
# CONFIG_CRYPTO_HW is not set
|
||||||
# CONFIG_VIRTUALIZATION is not set
|
|
||||||
CONFIG_CRC_T10DIF=y
|
|
||||||
CONFIG_LIBCRC32C=m
|
|
||||||
|
|
|
@ -2,12 +2,12 @@ CONFIG_EXPERIMENTAL=y
|
||||||
CONFIG_SYSVIPC=y
|
CONFIG_SYSVIPC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
CONFIG_BLK_DEV_INITRD=y
|
CONFIG_BLK_DEV_INITRD=y
|
||||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
|
||||||
CONFIG_EXPERT=y
|
CONFIG_EXPERT=y
|
||||||
CONFIG_SLAB=y
|
CONFIG_SLAB=y
|
||||||
CONFIG_MODULES=y
|
CONFIG_MODULES=y
|
||||||
CONFIG_MODULE_UNLOAD=y
|
CONFIG_MODULE_UNLOAD=y
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
# CONFIG_PPC_CHRP is not set
|
# CONFIG_PPC_CHRP is not set
|
||||||
# CONFIG_PPC_PMAC is not set
|
# CONFIG_PPC_PMAC is not set
|
||||||
CONFIG_PPC_83xx=y
|
CONFIG_PPC_83xx=y
|
||||||
|
@ -25,7 +25,6 @@ CONFIG_ASP834x=y
|
||||||
CONFIG_QUICC_ENGINE=y
|
CONFIG_QUICC_ENGINE=y
|
||||||
CONFIG_QE_GPIO=y
|
CONFIG_QE_GPIO=y
|
||||||
CONFIG_MATH_EMULATION=y
|
CONFIG_MATH_EMULATION=y
|
||||||
CONFIG_SPARSE_IRQ=y
|
|
||||||
CONFIG_PCI=y
|
CONFIG_PCI=y
|
||||||
CONFIG_NET=y
|
CONFIG_NET=y
|
||||||
CONFIG_PACKET=y
|
CONFIG_PACKET=y
|
||||||
|
@ -42,10 +41,9 @@ CONFIG_INET_ESP=y
|
||||||
# CONFIG_INET_LRO is not set
|
# CONFIG_INET_LRO is not set
|
||||||
# CONFIG_IPV6 is not set
|
# CONFIG_IPV6 is not set
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_DEVTMPFS=y
|
||||||
# CONFIG_FW_LOADER is not set
|
# CONFIG_FW_LOADER is not set
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_PARTITIONS=y
|
|
||||||
CONFIG_MTD_OF_PARTS=y
|
|
||||||
CONFIG_MTD_CHAR=y
|
CONFIG_MTD_CHAR=y
|
||||||
CONFIG_MTD_BLOCK=y
|
CONFIG_MTD_BLOCK=y
|
||||||
CONFIG_MTD_CFI=y
|
CONFIG_MTD_CFI=y
|
||||||
|
@ -64,15 +62,14 @@ CONFIG_ATA=y
|
||||||
CONFIG_SATA_FSL=y
|
CONFIG_SATA_FSL=y
|
||||||
CONFIG_SATA_SIL=y
|
CONFIG_SATA_SIL=y
|
||||||
CONFIG_NETDEVICES=y
|
CONFIG_NETDEVICES=y
|
||||||
|
CONFIG_MII=y
|
||||||
|
CONFIG_UCC_GETH=y
|
||||||
|
CONFIG_GIANFAR=y
|
||||||
CONFIG_MARVELL_PHY=y
|
CONFIG_MARVELL_PHY=y
|
||||||
CONFIG_DAVICOM_PHY=y
|
CONFIG_DAVICOM_PHY=y
|
||||||
CONFIG_VITESSE_PHY=y
|
CONFIG_VITESSE_PHY=y
|
||||||
CONFIG_ICPLUS_PHY=y
|
CONFIG_ICPLUS_PHY=y
|
||||||
CONFIG_FIXED_PHY=y
|
CONFIG_FIXED_PHY=y
|
||||||
CONFIG_NET_ETHERNET=y
|
|
||||||
CONFIG_MII=y
|
|
||||||
CONFIG_GIANFAR=y
|
|
||||||
CONFIG_UCC_GETH=y
|
|
||||||
CONFIG_INPUT_FF_MEMLESS=m
|
CONFIG_INPUT_FF_MEMLESS=m
|
||||||
# CONFIG_INPUT_MOUSEDEV is not set
|
# CONFIG_INPUT_MOUSEDEV is not set
|
||||||
# CONFIG_INPUT_KEYBOARD is not set
|
# CONFIG_INPUT_KEYBOARD is not set
|
||||||
|
@ -112,17 +109,12 @@ CONFIG_RTC_DRV_DS1374=y
|
||||||
CONFIG_EXT2_FS=y
|
CONFIG_EXT2_FS=y
|
||||||
CONFIG_EXT3_FS=y
|
CONFIG_EXT3_FS=y
|
||||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||||
CONFIG_INOTIFY=y
|
|
||||||
CONFIG_PROC_KCORE=y
|
CONFIG_PROC_KCORE=y
|
||||||
CONFIG_TMPFS=y
|
CONFIG_TMPFS=y
|
||||||
CONFIG_NFS_FS=y
|
CONFIG_NFS_FS=y
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_NFS_V4=y
|
CONFIG_NFS_V4=y
|
||||||
CONFIG_ROOT_NFS=y
|
CONFIG_ROOT_NFS=y
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
CONFIG_CRC_T10DIF=y
|
CONFIG_CRC_T10DIF=y
|
||||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
|
||||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
|
||||||
CONFIG_CRYPTO_ECB=m
|
CONFIG_CRYPTO_ECB=m
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_SHA256=y
|
CONFIG_CRYPTO_SHA256=y
|
||||||
|
|
|
@ -5,7 +5,9 @@ CONFIG_SYSVIPC=y
|
||||||
CONFIG_POSIX_MQUEUE=y
|
CONFIG_POSIX_MQUEUE=y
|
||||||
CONFIG_BSD_PROCESS_ACCT=y
|
CONFIG_BSD_PROCESS_ACCT=y
|
||||||
CONFIG_AUDIT=y
|
CONFIG_AUDIT=y
|
||||||
CONFIG_SPARSE_IRQ=y
|
CONFIG_IRQ_DOMAIN_DEBUG=y
|
||||||
|
CONFIG_NO_HZ=y
|
||||||
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
|
@ -17,6 +19,8 @@ CONFIG_MODULE_UNLOAD=y
|
||||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||||
CONFIG_MODVERSIONS=y
|
CONFIG_MODVERSIONS=y
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
|
CONFIG_MAC_PARTITION=y
|
||||||
CONFIG_MPC8540_ADS=y
|
CONFIG_MPC8540_ADS=y
|
||||||
CONFIG_MPC8560_ADS=y
|
CONFIG_MPC8560_ADS=y
|
||||||
CONFIG_MPC85xx_CDS=y
|
CONFIG_MPC85xx_CDS=y
|
||||||
|
@ -40,8 +44,6 @@ CONFIG_SBC8548=y
|
||||||
CONFIG_QUICC_ENGINE=y
|
CONFIG_QUICC_ENGINE=y
|
||||||
CONFIG_QE_GPIO=y
|
CONFIG_QE_GPIO=y
|
||||||
CONFIG_HIGHMEM=y
|
CONFIG_HIGHMEM=y
|
||||||
CONFIG_NO_HZ=y
|
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
|
||||||
CONFIG_BINFMT_MISC=m
|
CONFIG_BINFMT_MISC=m
|
||||||
CONFIG_MATH_EMULATION=y
|
CONFIG_MATH_EMULATION=y
|
||||||
CONFIG_FORCE_MAX_ZONEORDER=12
|
CONFIG_FORCE_MAX_ZONEORDER=12
|
||||||
|
@ -74,36 +76,25 @@ CONFIG_INET_ESP=y
|
||||||
CONFIG_IPV6=y
|
CONFIG_IPV6=y
|
||||||
CONFIG_IP_SCTP=m
|
CONFIG_IP_SCTP=m
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
CONFIG_MTD_CHAR=y
|
CONFIG_MTD_CHAR=y
|
||||||
CONFIG_MTD_BLOCK=y
|
CONFIG_MTD_BLOCK=y
|
||||||
CONFIG_MTD_CFI=y
|
|
||||||
CONFIG_FTL=y
|
CONFIG_FTL=y
|
||||||
CONFIG_MTD_GEN_PROBE=y
|
CONFIG_MTD_CFI=y
|
||||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
|
||||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
|
||||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
|
||||||
CONFIG_MTD_CFI_I1=y
|
|
||||||
CONFIG_MTD_CFI_I2=y
|
|
||||||
CONFIG_MTD_CFI_INTELEXT=y
|
CONFIG_MTD_CFI_INTELEXT=y
|
||||||
CONFIG_MTD_CFI_AMDSTD=y
|
CONFIG_MTD_CFI_AMDSTD=y
|
||||||
CONFIG_MTD_CFI_UTIL=y
|
|
||||||
CONFIG_MTD_PHYSMAP_OF=y
|
CONFIG_MTD_PHYSMAP_OF=y
|
||||||
CONFIG_MTD_PARTITIONS=y
|
CONFIG_MTD_M25P80=y
|
||||||
CONFIG_MTD_OF_PARTS=y
|
|
||||||
CONFIG_MTD_NAND=y
|
CONFIG_MTD_NAND=y
|
||||||
CONFIG_MTD_NAND_FSL_ELBC=y
|
CONFIG_MTD_NAND_FSL_ELBC=y
|
||||||
CONFIG_MTD_NAND_FSL_IFC=y
|
CONFIG_MTD_NAND_FSL_IFC=y
|
||||||
CONFIG_MTD_NAND_IDS=y
|
|
||||||
CONFIG_MTD_NAND_ECC=y
|
|
||||||
CONFIG_MTD_M25P80=y
|
|
||||||
CONFIG_PROC_DEVICETREE=y
|
CONFIG_PROC_DEVICETREE=y
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
CONFIG_BLK_DEV_LOOP=y
|
||||||
CONFIG_BLK_DEV_NBD=y
|
CONFIG_BLK_DEV_NBD=y
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=131072
|
CONFIG_BLK_DEV_RAM_SIZE=131072
|
||||||
CONFIG_MISC_DEVICES=y
|
|
||||||
CONFIG_EEPROM_LEGACY=y
|
CONFIG_EEPROM_LEGACY=y
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
CONFIG_CHR_DEV_ST=y
|
CONFIG_CHR_DEV_ST=y
|
||||||
|
@ -115,6 +106,7 @@ CONFIG_ATA=y
|
||||||
CONFIG_SATA_AHCI=y
|
CONFIG_SATA_AHCI=y
|
||||||
CONFIG_SATA_FSL=y
|
CONFIG_SATA_FSL=y
|
||||||
CONFIG_PATA_ALI=y
|
CONFIG_PATA_ALI=y
|
||||||
|
CONFIG_PATA_VIA=y
|
||||||
CONFIG_NETDEVICES=y
|
CONFIG_NETDEVICES=y
|
||||||
CONFIG_DUMMY=y
|
CONFIG_DUMMY=y
|
||||||
CONFIG_FS_ENET=y
|
CONFIG_FS_ENET=y
|
||||||
|
@ -134,7 +126,6 @@ CONFIG_SERIAL_8250=y
|
||||||
CONFIG_SERIAL_8250_CONSOLE=y
|
CONFIG_SERIAL_8250_CONSOLE=y
|
||||||
CONFIG_SERIAL_8250_NR_UARTS=2
|
CONFIG_SERIAL_8250_NR_UARTS=2
|
||||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
||||||
CONFIG_SERIAL_8250_EXTENDED=y
|
|
||||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||||
CONFIG_SERIAL_8250_RSA=y
|
CONFIG_SERIAL_8250_RSA=y
|
||||||
|
@ -183,7 +174,6 @@ CONFIG_HID_SAMSUNG=y
|
||||||
CONFIG_HID_SONY=y
|
CONFIG_HID_SONY=y
|
||||||
CONFIG_HID_SUNPLUS=y
|
CONFIG_HID_SUNPLUS=y
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
CONFIG_USB_DEVICEFS=y
|
|
||||||
CONFIG_USB_MON=y
|
CONFIG_USB_MON=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_EHCI_HCD=y
|
||||||
CONFIG_USB_EHCI_FSL=y
|
CONFIG_USB_EHCI_FSL=y
|
||||||
|
@ -229,18 +219,13 @@ CONFIG_QNX4FS_FS=m
|
||||||
CONFIG_SYSV_FS=m
|
CONFIG_SYSV_FS=m
|
||||||
CONFIG_UFS_FS=m
|
CONFIG_UFS_FS=m
|
||||||
CONFIG_NFS_FS=y
|
CONFIG_NFS_FS=y
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_NFS_V4=y
|
CONFIG_NFS_V4=y
|
||||||
CONFIG_ROOT_NFS=y
|
CONFIG_ROOT_NFS=y
|
||||||
CONFIG_NFSD=y
|
CONFIG_NFSD=y
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
CONFIG_MAC_PARTITION=y
|
|
||||||
CONFIG_CRC_T10DIF=y
|
CONFIG_CRC_T10DIF=y
|
||||||
CONFIG_DEBUG_FS=y
|
CONFIG_DEBUG_FS=y
|
||||||
CONFIG_DETECT_HUNG_TASK=y
|
CONFIG_DETECT_HUNG_TASK=y
|
||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
|
||||||
CONFIG_IRQ_DOMAIN_DEBUG=y
|
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_SHA256=y
|
CONFIG_CRYPTO_SHA256=y
|
||||||
CONFIG_CRYPTO_SHA512=y
|
CONFIG_CRYPTO_SHA512=y
|
||||||
|
|
|
@ -7,7 +7,9 @@ CONFIG_SYSVIPC=y
|
||||||
CONFIG_POSIX_MQUEUE=y
|
CONFIG_POSIX_MQUEUE=y
|
||||||
CONFIG_BSD_PROCESS_ACCT=y
|
CONFIG_BSD_PROCESS_ACCT=y
|
||||||
CONFIG_AUDIT=y
|
CONFIG_AUDIT=y
|
||||||
CONFIG_SPARSE_IRQ=y
|
CONFIG_IRQ_DOMAIN_DEBUG=y
|
||||||
|
CONFIG_NO_HZ=y
|
||||||
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
CONFIG_IKCONFIG=y
|
CONFIG_IKCONFIG=y
|
||||||
CONFIG_IKCONFIG_PROC=y
|
CONFIG_IKCONFIG_PROC=y
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
CONFIG_LOG_BUF_SHIFT=14
|
||||||
|
@ -19,6 +21,8 @@ CONFIG_MODULE_UNLOAD=y
|
||||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||||
CONFIG_MODVERSIONS=y
|
CONFIG_MODVERSIONS=y
|
||||||
# CONFIG_BLK_DEV_BSG is not set
|
# CONFIG_BLK_DEV_BSG is not set
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
|
CONFIG_MAC_PARTITION=y
|
||||||
CONFIG_MPC8540_ADS=y
|
CONFIG_MPC8540_ADS=y
|
||||||
CONFIG_MPC8560_ADS=y
|
CONFIG_MPC8560_ADS=y
|
||||||
CONFIG_MPC85xx_CDS=y
|
CONFIG_MPC85xx_CDS=y
|
||||||
|
@ -42,8 +46,6 @@ CONFIG_SBC8548=y
|
||||||
CONFIG_QUICC_ENGINE=y
|
CONFIG_QUICC_ENGINE=y
|
||||||
CONFIG_QE_GPIO=y
|
CONFIG_QE_GPIO=y
|
||||||
CONFIG_HIGHMEM=y
|
CONFIG_HIGHMEM=y
|
||||||
CONFIG_NO_HZ=y
|
|
||||||
CONFIG_HIGH_RES_TIMERS=y
|
|
||||||
CONFIG_BINFMT_MISC=m
|
CONFIG_BINFMT_MISC=m
|
||||||
CONFIG_MATH_EMULATION=y
|
CONFIG_MATH_EMULATION=y
|
||||||
CONFIG_IRQ_ALL_CPUS=y
|
CONFIG_IRQ_ALL_CPUS=y
|
||||||
|
@ -77,36 +79,25 @@ CONFIG_INET_ESP=y
|
||||||
CONFIG_IPV6=y
|
CONFIG_IPV6=y
|
||||||
CONFIG_IP_SCTP=m
|
CONFIG_IP_SCTP=m
|
||||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||||
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_CMDLINE_PARTS=y
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
CONFIG_MTD_CHAR=y
|
CONFIG_MTD_CHAR=y
|
||||||
CONFIG_MTD_BLOCK=y
|
CONFIG_MTD_BLOCK=y
|
||||||
CONFIG_MTD_CFI=y
|
|
||||||
CONFIG_FTL=y
|
CONFIG_FTL=y
|
||||||
CONFIG_MTD_GEN_PROBE=y
|
CONFIG_MTD_CFI=y
|
||||||
CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
|
||||||
CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
|
||||||
CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
|
||||||
CONFIG_MTD_CFI_I1=y
|
|
||||||
CONFIG_MTD_CFI_I2=y
|
|
||||||
CONFIG_MTD_CFI_INTELEXT=y
|
CONFIG_MTD_CFI_INTELEXT=y
|
||||||
CONFIG_MTD_CFI_AMDSTD=y
|
CONFIG_MTD_CFI_AMDSTD=y
|
||||||
CONFIG_MTD_CFI_UTIL=y
|
|
||||||
CONFIG_MTD_PHYSMAP_OF=y
|
CONFIG_MTD_PHYSMAP_OF=y
|
||||||
CONFIG_MTD_PARTITIONS=y
|
CONFIG_MTD_M25P80=y
|
||||||
CONFIG_MTD_OF_PARTS=y
|
|
||||||
CONFIG_MTD_NAND=y
|
CONFIG_MTD_NAND=y
|
||||||
CONFIG_MTD_NAND_FSL_ELBC=y
|
CONFIG_MTD_NAND_FSL_ELBC=y
|
||||||
CONFIG_MTD_NAND_FSL_IFC=y
|
CONFIG_MTD_NAND_FSL_IFC=y
|
||||||
CONFIG_MTD_NAND_IDS=y
|
|
||||||
CONFIG_MTD_NAND_ECC=y
|
|
||||||
CONFIG_MTD_M25P80=y
|
|
||||||
CONFIG_PROC_DEVICETREE=y
|
CONFIG_PROC_DEVICETREE=y
|
||||||
CONFIG_BLK_DEV_LOOP=y
|
CONFIG_BLK_DEV_LOOP=y
|
||||||
CONFIG_BLK_DEV_NBD=y
|
CONFIG_BLK_DEV_NBD=y
|
||||||
CONFIG_BLK_DEV_RAM=y
|
CONFIG_BLK_DEV_RAM=y
|
||||||
CONFIG_BLK_DEV_RAM_SIZE=131072
|
CONFIG_BLK_DEV_RAM_SIZE=131072
|
||||||
CONFIG_MISC_DEVICES=y
|
|
||||||
CONFIG_EEPROM_LEGACY=y
|
CONFIG_EEPROM_LEGACY=y
|
||||||
CONFIG_BLK_DEV_SD=y
|
CONFIG_BLK_DEV_SD=y
|
||||||
CONFIG_CHR_DEV_ST=y
|
CONFIG_CHR_DEV_ST=y
|
||||||
|
@ -137,7 +128,6 @@ CONFIG_SERIAL_8250=y
|
||||||
CONFIG_SERIAL_8250_CONSOLE=y
|
CONFIG_SERIAL_8250_CONSOLE=y
|
||||||
CONFIG_SERIAL_8250_NR_UARTS=2
|
CONFIG_SERIAL_8250_NR_UARTS=2
|
||||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
||||||
CONFIG_SERIAL_8250_EXTENDED=y
|
|
||||||
CONFIG_SERIAL_8250_MANY_PORTS=y
|
CONFIG_SERIAL_8250_MANY_PORTS=y
|
||||||
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
CONFIG_SERIAL_8250_DETECT_IRQ=y
|
||||||
CONFIG_SERIAL_8250_RSA=y
|
CONFIG_SERIAL_8250_RSA=y
|
||||||
|
@ -186,7 +176,6 @@ CONFIG_HID_SAMSUNG=y
|
||||||
CONFIG_HID_SONY=y
|
CONFIG_HID_SONY=y
|
||||||
CONFIG_HID_SUNPLUS=y
|
CONFIG_HID_SUNPLUS=y
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
CONFIG_USB_DEVICEFS=y
|
|
||||||
CONFIG_USB_MON=y
|
CONFIG_USB_MON=y
|
||||||
CONFIG_USB_EHCI_HCD=y
|
CONFIG_USB_EHCI_HCD=y
|
||||||
CONFIG_USB_EHCI_FSL=y
|
CONFIG_USB_EHCI_FSL=y
|
||||||
|
@ -232,18 +221,13 @@ CONFIG_QNX4FS_FS=m
|
||||||
CONFIG_SYSV_FS=m
|
CONFIG_SYSV_FS=m
|
||||||
CONFIG_UFS_FS=m
|
CONFIG_UFS_FS=m
|
||||||
CONFIG_NFS_FS=y
|
CONFIG_NFS_FS=y
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_NFS_V4=y
|
CONFIG_NFS_V4=y
|
||||||
CONFIG_ROOT_NFS=y
|
CONFIG_ROOT_NFS=y
|
||||||
CONFIG_NFSD=y
|
CONFIG_NFSD=y
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
CONFIG_MAC_PARTITION=y
|
|
||||||
CONFIG_CRC_T10DIF=y
|
CONFIG_CRC_T10DIF=y
|
||||||
CONFIG_DEBUG_FS=y
|
CONFIG_DEBUG_FS=y
|
||||||
CONFIG_DETECT_HUNG_TASK=y
|
CONFIG_DETECT_HUNG_TASK=y
|
||||||
CONFIG_DEBUG_INFO=y
|
CONFIG_DEBUG_INFO=y
|
||||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
|
||||||
CONFIG_IRQ_DOMAIN_DEBUG=y
|
|
||||||
CONFIG_CRYPTO_PCBC=m
|
CONFIG_CRYPTO_PCBC=m
|
||||||
CONFIG_CRYPTO_SHA256=y
|
CONFIG_CRYPTO_SHA256=y
|
||||||
CONFIG_CRYPTO_SHA512=y
|
CONFIG_CRYPTO_SHA512=y
|
||||||
|
|
|
@ -553,9 +553,7 @@ static inline int cpu_has_feature(unsigned long feature)
|
||||||
& feature);
|
& feature);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
|
||||||
#define HBP_NUM 1
|
#define HBP_NUM 1
|
||||||
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
|
|
||||||
|
|
||||||
#endif /* !__ASSEMBLY__ */
|
#endif /* !__ASSEMBLY__ */
|
||||||
|
|
||||||
|
|
|
@ -33,6 +33,7 @@
|
||||||
#include <asm/kvm_asm.h>
|
#include <asm/kvm_asm.h>
|
||||||
#include <asm/processor.h>
|
#include <asm/processor.h>
|
||||||
#include <asm/page.h>
|
#include <asm/page.h>
|
||||||
|
#include <asm/cacheflush.h>
|
||||||
|
|
||||||
#define KVM_MAX_VCPUS NR_CPUS
|
#define KVM_MAX_VCPUS NR_CPUS
|
||||||
#define KVM_MAX_VCORES NR_CPUS
|
#define KVM_MAX_VCORES NR_CPUS
|
||||||
|
|
|
@ -219,4 +219,16 @@ void kvmppc_claim_lpid(long lpid);
|
||||||
void kvmppc_free_lpid(long lpid);
|
void kvmppc_free_lpid(long lpid);
|
||||||
void kvmppc_init_lpid(unsigned long nr_lpids);
|
void kvmppc_init_lpid(unsigned long nr_lpids);
|
||||||
|
|
||||||
|
static inline void kvmppc_mmu_flush_icache(pfn_t pfn)
|
||||||
|
{
|
||||||
|
/* Clear i-cache for new pages */
|
||||||
|
struct page *page;
|
||||||
|
page = pfn_to_page(pfn);
|
||||||
|
if (!test_bit(PG_arch_1, &page->flags)) {
|
||||||
|
flush_dcache_icache_page(page);
|
||||||
|
set_bit(PG_arch_1, &page->flags);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
#endif /* __POWERPC_KVM_PPC_H__ */
|
#endif /* __POWERPC_KVM_PPC_H__ */
|
||||||
|
|
|
@ -14,6 +14,7 @@
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
#include <linux/spinlock.h>
|
#include <linux/spinlock.h>
|
||||||
#include <asm/smp.h>
|
#include <asm/smp.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
|
||||||
struct mpic_msgr {
|
struct mpic_msgr {
|
||||||
u32 __iomem *base;
|
u32 __iomem *base;
|
||||||
|
|
|
@ -83,11 +83,10 @@ static int dma_iommu_dma_supported(struct device *dev, u64 mask)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((tbl->it_offset + tbl->it_size) > (mask >> IOMMU_PAGE_SHIFT)) {
|
if (tbl->it_offset > (mask >> IOMMU_PAGE_SHIFT)) {
|
||||||
dev_info(dev, "Warning: IOMMU window too big for device mask\n");
|
dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
|
||||||
dev_info(dev, "mask: 0x%08llx, table end: 0x%08lx\n",
|
dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
|
||||||
mask, (tbl->it_offset + tbl->it_size) <<
|
mask, tbl->it_offset << IOMMU_PAGE_SHIFT);
|
||||||
IOMMU_PAGE_SHIFT);
|
|
||||||
return 0;
|
return 0;
|
||||||
} else
|
} else
|
||||||
return 1;
|
return 1;
|
||||||
|
|
|
@ -253,7 +253,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args)
|
||||||
|
|
||||||
/* Do not emulate user-space instructions, instead single-step them */
|
/* Do not emulate user-space instructions, instead single-step them */
|
||||||
if (user_mode(regs)) {
|
if (user_mode(regs)) {
|
||||||
bp->ctx->task->thread.last_hit_ubp = bp;
|
current->thread.last_hit_ubp = bp;
|
||||||
regs->msr |= MSR_SE;
|
regs->msr |= MSR_SE;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
|
@ -25,6 +25,7 @@
|
||||||
#include <asm/processor.h>
|
#include <asm/processor.h>
|
||||||
#include <asm/machdep.h>
|
#include <asm/machdep.h>
|
||||||
#include <asm/debug.h>
|
#include <asm/debug.h>
|
||||||
|
#include <linux/slab.h>
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This table contains the mapping between PowerPC hardware trap types, and
|
* This table contains the mapping between PowerPC hardware trap types, and
|
||||||
|
@ -101,6 +102,21 @@ static int computeSignal(unsigned int tt)
|
||||||
return SIGHUP; /* default for things we don't know about */
|
return SIGHUP; /* default for things we don't know about */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
*
|
||||||
|
* kgdb_skipexception - Bail out of KGDB when we've been triggered.
|
||||||
|
* @exception: Exception vector number
|
||||||
|
* @regs: Current &struct pt_regs.
|
||||||
|
*
|
||||||
|
* On some architectures we need to skip a breakpoint exception when
|
||||||
|
* it occurs after a breakpoint has been removed.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
int kgdb_skipexception(int exception, struct pt_regs *regs)
|
||||||
|
{
|
||||||
|
return kgdb_isremovedbreak(regs->nip);
|
||||||
|
}
|
||||||
|
|
||||||
static int kgdb_call_nmi_hook(struct pt_regs *regs)
|
static int kgdb_call_nmi_hook(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
kgdb_nmicallback(raw_smp_processor_id(), regs);
|
kgdb_nmicallback(raw_smp_processor_id(), regs);
|
||||||
|
@ -138,6 +154,8 @@ static int kgdb_handle_breakpoint(struct pt_regs *regs)
|
||||||
static int kgdb_singlestep(struct pt_regs *regs)
|
static int kgdb_singlestep(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
struct thread_info *thread_info, *exception_thread_info;
|
struct thread_info *thread_info, *exception_thread_info;
|
||||||
|
struct thread_info *backup_current_thread_info = \
|
||||||
|
(struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
|
||||||
|
|
||||||
if (user_mode(regs))
|
if (user_mode(regs))
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -155,13 +173,17 @@ static int kgdb_singlestep(struct pt_regs *regs)
|
||||||
thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1));
|
thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1));
|
||||||
exception_thread_info = current_thread_info();
|
exception_thread_info = current_thread_info();
|
||||||
|
|
||||||
if (thread_info != exception_thread_info)
|
if (thread_info != exception_thread_info) {
|
||||||
|
/* Save the original current_thread_info. */
|
||||||
|
memcpy(backup_current_thread_info, exception_thread_info, sizeof *thread_info);
|
||||||
memcpy(exception_thread_info, thread_info, sizeof *thread_info);
|
memcpy(exception_thread_info, thread_info, sizeof *thread_info);
|
||||||
|
}
|
||||||
|
|
||||||
kgdb_handle_exception(0, SIGTRAP, 0, regs);
|
kgdb_handle_exception(0, SIGTRAP, 0, regs);
|
||||||
|
|
||||||
if (thread_info != exception_thread_info)
|
if (thread_info != exception_thread_info)
|
||||||
memcpy(thread_info, exception_thread_info, sizeof *thread_info);
|
/* Restore current_thread_info lastly. */
|
||||||
|
memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
|
||||||
|
|
||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
@ -410,7 +432,6 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,
|
||||||
#else
|
#else
|
||||||
linux_regs->msr |= MSR_SE;
|
linux_regs->msr |= MSR_SE;
|
||||||
#endif
|
#endif
|
||||||
kgdb_single_step = 1;
|
|
||||||
atomic_set(&kgdb_cpu_doing_single_step,
|
atomic_set(&kgdb_cpu_doing_single_step,
|
||||||
raw_smp_processor_id());
|
raw_smp_processor_id());
|
||||||
}
|
}
|
||||||
|
|
|
@ -107,11 +107,11 @@ long ppc64_personality(unsigned long personality)
|
||||||
long ret;
|
long ret;
|
||||||
|
|
||||||
if (personality(current->personality) == PER_LINUX32
|
if (personality(current->personality) == PER_LINUX32
|
||||||
&& personality == PER_LINUX)
|
&& personality(personality) == PER_LINUX)
|
||||||
personality = PER_LINUX32;
|
personality = (personality & ~PER_MASK) | PER_LINUX32;
|
||||||
ret = sys_personality(personality);
|
ret = sys_personality(personality);
|
||||||
if (ret == PER_LINUX32)
|
if (personality(ret) == PER_LINUX32)
|
||||||
ret = PER_LINUX;
|
ret = (ret & ~PER_MASK) | PER_LINUX;
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -211,6 +211,9 @@ next_pteg:
|
||||||
pteg1 |= PP_RWRX;
|
pteg1 |= PP_RWRX;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (orig_pte->may_execute)
|
||||||
|
kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
|
||||||
|
|
||||||
local_irq_disable();
|
local_irq_disable();
|
||||||
|
|
||||||
if (pteg[rr]) {
|
if (pteg[rr]) {
|
||||||
|
|
|
@ -126,6 +126,8 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
|
||||||
|
|
||||||
if (!orig_pte->may_execute)
|
if (!orig_pte->may_execute)
|
||||||
rflags |= HPTE_R_N;
|
rflags |= HPTE_R_N;
|
||||||
|
else
|
||||||
|
kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
|
||||||
|
|
||||||
hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
|
hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
|
||||||
|
|
||||||
|
|
|
@ -1421,13 +1421,13 @@ _GLOBAL(kvmppc_h_cede)
|
||||||
sync /* order setting ceded vs. testing prodded */
|
sync /* order setting ceded vs. testing prodded */
|
||||||
lbz r5,VCPU_PRODDED(r3)
|
lbz r5,VCPU_PRODDED(r3)
|
||||||
cmpwi r5,0
|
cmpwi r5,0
|
||||||
bne 1f
|
bne kvm_cede_prodded
|
||||||
li r0,0 /* set trap to 0 to say hcall is handled */
|
li r0,0 /* set trap to 0 to say hcall is handled */
|
||||||
stw r0,VCPU_TRAP(r3)
|
stw r0,VCPU_TRAP(r3)
|
||||||
li r0,H_SUCCESS
|
li r0,H_SUCCESS
|
||||||
std r0,VCPU_GPR(R3)(r3)
|
std r0,VCPU_GPR(R3)(r3)
|
||||||
BEGIN_FTR_SECTION
|
BEGIN_FTR_SECTION
|
||||||
b 2f /* just send it up to host on 970 */
|
b kvm_cede_exit /* just send it up to host on 970 */
|
||||||
END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
|
END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -1446,7 +1446,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
|
||||||
or r4,r4,r0
|
or r4,r4,r0
|
||||||
PPC_POPCNTW(R7,R4)
|
PPC_POPCNTW(R7,R4)
|
||||||
cmpw r7,r8
|
cmpw r7,r8
|
||||||
bge 2f
|
bge kvm_cede_exit
|
||||||
stwcx. r4,0,r6
|
stwcx. r4,0,r6
|
||||||
bne 31b
|
bne 31b
|
||||||
li r0,1
|
li r0,1
|
||||||
|
@ -1555,7 +1555,8 @@ kvm_end_cede:
|
||||||
b hcall_real_fallback
|
b hcall_real_fallback
|
||||||
|
|
||||||
/* cede when already previously prodded case */
|
/* cede when already previously prodded case */
|
||||||
1: li r0,0
|
kvm_cede_prodded:
|
||||||
|
li r0,0
|
||||||
stb r0,VCPU_PRODDED(r3)
|
stb r0,VCPU_PRODDED(r3)
|
||||||
sync /* order testing prodded vs. clearing ceded */
|
sync /* order testing prodded vs. clearing ceded */
|
||||||
stb r0,VCPU_CEDED(r3)
|
stb r0,VCPU_CEDED(r3)
|
||||||
|
@ -1563,7 +1564,8 @@ kvm_end_cede:
|
||||||
blr
|
blr
|
||||||
|
|
||||||
/* we've ceded but we want to give control to the host */
|
/* we've ceded but we want to give control to the host */
|
||||||
2: li r3,H_TOO_HARD
|
kvm_cede_exit:
|
||||||
|
li r3,H_TOO_HARD
|
||||||
blr
|
blr
|
||||||
|
|
||||||
secondary_too_late:
|
secondary_too_late:
|
||||||
|
|
|
@ -322,11 +322,11 @@ static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
|
||||||
static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
|
static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
|
||||||
{
|
{
|
||||||
if (vcpu_e500->g2h_tlb1_map)
|
if (vcpu_e500->g2h_tlb1_map)
|
||||||
memset(vcpu_e500->g2h_tlb1_map,
|
memset(vcpu_e500->g2h_tlb1_map, 0,
|
||||||
sizeof(u64) * vcpu_e500->gtlb_params[1].entries, 0);
|
sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
|
||||||
if (vcpu_e500->h2g_tlb1_rmap)
|
if (vcpu_e500->h2g_tlb1_rmap)
|
||||||
memset(vcpu_e500->h2g_tlb1_rmap,
|
memset(vcpu_e500->h2g_tlb1_rmap, 0,
|
||||||
sizeof(unsigned int) * host_tlb_params[1].entries, 0);
|
sizeof(unsigned int) * host_tlb_params[1].entries);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
|
static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
|
||||||
|
@ -539,6 +539,9 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
||||||
|
|
||||||
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
|
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
|
||||||
ref, gvaddr, stlbe);
|
ref, gvaddr, stlbe);
|
||||||
|
|
||||||
|
/* Clear i-cache for new pages */
|
||||||
|
kvmppc_mmu_flush_icache(pfn);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* XXX only map the one-one case, for now use TLB0 */
|
/* XXX only map the one-one case, for now use TLB0 */
|
||||||
|
|
|
@ -288,7 +288,7 @@ err1; stb r0,0(r3)
|
||||||
std r0,16(r1)
|
std r0,16(r1)
|
||||||
stdu r1,-STACKFRAMESIZE(r1)
|
stdu r1,-STACKFRAMESIZE(r1)
|
||||||
bl .enter_vmx_usercopy
|
bl .enter_vmx_usercopy
|
||||||
cmpwi r3,0
|
cmpwi cr1,r3,0
|
||||||
ld r0,STACKFRAMESIZE+16(r1)
|
ld r0,STACKFRAMESIZE+16(r1)
|
||||||
ld r3,STACKFRAMESIZE+48(r1)
|
ld r3,STACKFRAMESIZE+48(r1)
|
||||||
ld r4,STACKFRAMESIZE+56(r1)
|
ld r4,STACKFRAMESIZE+56(r1)
|
||||||
|
@ -326,38 +326,7 @@ err1; stb r0,0(r3)
|
||||||
dcbt r0,r8,0b01010 /* GO */
|
dcbt r0,r8,0b01010 /* GO */
|
||||||
.machine pop
|
.machine pop
|
||||||
|
|
||||||
/*
|
beq cr1,.Lunwind_stack_nonvmx_copy
|
||||||
* We prefetch both the source and destination using enhanced touch
|
|
||||||
* instructions. We use a stream ID of 0 for the load side and
|
|
||||||
* 1 for the store side.
|
|
||||||
*/
|
|
||||||
clrrdi r6,r4,7
|
|
||||||
clrrdi r9,r3,7
|
|
||||||
ori r9,r9,1 /* stream=1 */
|
|
||||||
|
|
||||||
srdi r7,r5,7 /* length in cachelines, capped at 0x3FF */
|
|
||||||
cmpldi cr1,r7,0x3FF
|
|
||||||
ble cr1,1f
|
|
||||||
li r7,0x3FF
|
|
||||||
1: lis r0,0x0E00 /* depth=7 */
|
|
||||||
sldi r7,r7,7
|
|
||||||
or r7,r7,r0
|
|
||||||
ori r10,r7,1 /* stream=1 */
|
|
||||||
|
|
||||||
lis r8,0x8000 /* GO=1 */
|
|
||||||
clrldi r8,r8,32
|
|
||||||
|
|
||||||
.machine push
|
|
||||||
.machine "power4"
|
|
||||||
dcbt r0,r6,0b01000
|
|
||||||
dcbt r0,r7,0b01010
|
|
||||||
dcbtst r0,r9,0b01000
|
|
||||||
dcbtst r0,r10,0b01010
|
|
||||||
eieio
|
|
||||||
dcbt r0,r8,0b01010 /* GO */
|
|
||||||
.machine pop
|
|
||||||
|
|
||||||
beq .Lunwind_stack_nonvmx_copy
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If source and destination are not relatively aligned we use a
|
* If source and destination are not relatively aligned we use a
|
||||||
|
|
|
@ -222,7 +222,7 @@ _GLOBAL(memcpy_power7)
|
||||||
std r0,16(r1)
|
std r0,16(r1)
|
||||||
stdu r1,-STACKFRAMESIZE(r1)
|
stdu r1,-STACKFRAMESIZE(r1)
|
||||||
bl .enter_vmx_copy
|
bl .enter_vmx_copy
|
||||||
cmpwi r3,0
|
cmpwi cr1,r3,0
|
||||||
ld r0,STACKFRAMESIZE+16(r1)
|
ld r0,STACKFRAMESIZE+16(r1)
|
||||||
ld r3,STACKFRAMESIZE+48(r1)
|
ld r3,STACKFRAMESIZE+48(r1)
|
||||||
ld r4,STACKFRAMESIZE+56(r1)
|
ld r4,STACKFRAMESIZE+56(r1)
|
||||||
|
@ -260,7 +260,7 @@ _GLOBAL(memcpy_power7)
|
||||||
dcbt r0,r8,0b01010 /* GO */
|
dcbt r0,r8,0b01010 /* GO */
|
||||||
.machine pop
|
.machine pop
|
||||||
|
|
||||||
beq .Lunwind_stack_nonvmx_copy
|
beq cr1,.Lunwind_stack_nonvmx_copy
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If source and destination are not relatively aligned we use a
|
* If source and destination are not relatively aligned we use a
|
||||||
|
|
|
@ -469,6 +469,7 @@ void flush_dcache_icache_page(struct page *page)
|
||||||
__flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
|
__flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL(flush_dcache_icache_page);
|
||||||
|
|
||||||
void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
|
void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
|
||||||
{
|
{
|
||||||
|
|
|
@ -1431,7 +1431,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
|
||||||
if (!event->hw.idx || is_limited_pmc(event->hw.idx))
|
if (!event->hw.idx || is_limited_pmc(event->hw.idx))
|
||||||
continue;
|
continue;
|
||||||
val = read_pmc(event->hw.idx);
|
val = read_pmc(event->hw.idx);
|
||||||
if ((int)val < 0) {
|
if (pmc_overflow(val)) {
|
||||||
/* event has overflowed */
|
/* event has overflowed */
|
||||||
found = 1;
|
found = 1;
|
||||||
record_and_restart(event, val, regs);
|
record_and_restart(event, val, regs);
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue