spi: rspi: Fix register initialization while runtime-suspended
The Renesas RSPI/QSPI driver performs SPI controller register initialization in its spi_operations.setup() callback, without calling pm_runtime_get_sync() first, which may cause spurious failures. So far this went unnoticed, as this SPI controller is typically used with a single SPI NOR FLASH containing the boot loader: 1. If the device's module clock is still enabled (left enabled by the bootloader, and not yet disabled by the clk_disable_unused() late initcall), register initialization succeeds, 2. If the device's module clock is disabled, register writes don't seem to cause lock-ups or crashes. Data received in the first SPI message may be corrupted, though. Subsequent SPI messages seem to be OK. E.g. on r8a7791/koelsch, one bit is lost while receiving the 6th byte of the JEDEC ID for the s25fl512s FLASH, corrupting that byte and all later bytes. But until commita2126b0a01
("mtd: spi-nor: refine Spansion S25FL512S ID"), the 6th byte was not considered for FLASH identification. Fix this by moving all initialization from the .setup() to the .prepare_message() callback. The latter is always called after the device has been runtime-resumed by the SPI core. This also makes the driver follow the rule that .setup() must not change global driver state or register values, as that might break a transfer in progress. Fixes:490c97747d
("spi: rspi: Add runtime PM support, using spi core auto_runtime_pm") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -868,28 +868,6 @@ static int qspi_transfer_one(struct spi_controller *ctlr,
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}
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}
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}
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}
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static int rspi_setup(struct spi_device *spi)
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{
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struct rspi_data *rspi = spi_controller_get_devdata(spi->controller);
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rspi->max_speed_hz = spi->max_speed_hz;
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rspi->spcmd = SPCMD_SSLKP;
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if (spi->mode & SPI_CPOL)
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rspi->spcmd |= SPCMD_CPOL;
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if (spi->mode & SPI_CPHA)
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rspi->spcmd |= SPCMD_CPHA;
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/* CMOS output mode and MOSI signal from previous transfer */
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rspi->sppcr = 0;
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if (spi->mode & SPI_LOOP)
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rspi->sppcr |= SPPCR_SPLP;
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set_config_register(rspi, 8);
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return 0;
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}
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static u16 qspi_transfer_mode(const struct spi_transfer *xfer)
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static u16 qspi_transfer_mode(const struct spi_transfer *xfer)
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{
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{
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if (xfer->tx_buf)
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if (xfer->tx_buf)
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@ -959,8 +937,24 @@ static int rspi_prepare_message(struct spi_controller *ctlr,
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struct spi_message *msg)
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struct spi_message *msg)
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{
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{
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struct rspi_data *rspi = spi_controller_get_devdata(ctlr);
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struct rspi_data *rspi = spi_controller_get_devdata(ctlr);
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struct spi_device *spi = msg->spi;
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int ret;
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int ret;
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rspi->max_speed_hz = spi->max_speed_hz;
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rspi->spcmd = SPCMD_SSLKP;
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if (spi->mode & SPI_CPOL)
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rspi->spcmd |= SPCMD_CPOL;
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if (spi->mode & SPI_CPHA)
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rspi->spcmd |= SPCMD_CPHA;
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/* CMOS output mode and MOSI signal from previous transfer */
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rspi->sppcr = 0;
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if (spi->mode & SPI_LOOP)
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rspi->sppcr |= SPPCR_SPLP;
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set_config_register(rspi, 8);
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if (msg->spi->mode &
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if (msg->spi->mode &
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(SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD)) {
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(SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD)) {
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/* Setup sequencer for messages with multiple transfer modes */
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/* Setup sequencer for messages with multiple transfer modes */
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@ -1267,7 +1261,6 @@ static int rspi_probe(struct platform_device *pdev)
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init_waitqueue_head(&rspi->wait);
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init_waitqueue_head(&rspi->wait);
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ctlr->bus_num = pdev->id;
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ctlr->bus_num = pdev->id;
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ctlr->setup = rspi_setup;
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ctlr->auto_runtime_pm = true;
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ctlr->auto_runtime_pm = true;
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ctlr->transfer_one = ops->transfer_one;
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ctlr->transfer_one = ops->transfer_one;
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ctlr->prepare_message = rspi_prepare_message;
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ctlr->prepare_message = rspi_prepare_message;
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