m68k/coldfire: flush cache when creating the signal stack frame

When the signal stack frame is created, it must be flushed in order to
make sure the cache fetches the correct data.
Without cache flush the icache might pick up old cached data from an older
signal stack frame if the signal is raised again very fast.
In case of copyback the data cache muist be pushed first, but is untested.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Alexander Stein 2013-06-05 13:42:39 +02:00 committed by Greg Ungerer
parent df592eb5dc
commit 42cb38bcb7
1 changed files with 8 additions and 0 deletions

View File

@ -50,6 +50,7 @@
#include <asm/pgtable.h>
#include <asm/traps.h>
#include <asm/ucontext.h>
#include <asm/cacheflush.h>
#ifdef CONFIG_MMU
@ -181,6 +182,13 @@ static inline void push_cache (unsigned long vaddr)
asm volatile ("movec %0,%%caar\n\t"
"movec %1,%%cacr"
: : "r" (vaddr + 4), "r" (temp));
} else {
/* CPU_IS_COLDFIRE */
#if defined(CONFIG_CACHE_COPYBACK)
flush_cf_dcache(0, DCACHE_MAX_ADDR);
#endif
/* Invalidate instruction cache for the pushed bytes */
clear_cf_icache(vaddr, vaddr + 8);
}
}