rt2x00: cleanup indentation in rt2800.h
Adjust whitespaces to move badly aligned constants to the right column. The patch contains no functional changes. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gabor Juhos
John W. Linville
parent
e25aa82a89
commit
42f920c90d
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@ -124,7 +124,7 @@
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/*
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* MAC_CSR0_3290: MAC_CSR0 for RT3290 to identity MAC version number.
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*/
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#define MAC_CSR0_3290 0x0000
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#define MAC_CSR0_3290 0x0000
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/*
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* E2PROM_CSR: PCI EEPROM control register.
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@ -213,17 +213,17 @@
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/*
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* COEX_CFG_0
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*/
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#define COEX_CFG0 0x0040
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#define COEX_CFG0 0x0040
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#define COEX_CFG_ANT FIELD32(0xff000000)
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/*
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* COEX_CFG_1
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*/
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#define COEX_CFG1 0x0044
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#define COEX_CFG1 0x0044
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/*
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* COEX_CFG_2
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*/
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#define COEX_CFG2 0x0048
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#define COEX_CFG2 0x0048
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#define BT_COEX_CFG1 FIELD32(0xff000000)
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#define BT_COEX_CFG0 FIELD32(0x00ff0000)
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#define WL_COEX_CFG1 FIELD32(0x0000ff00)
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@ -237,8 +237,8 @@
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#define PLL_RESERVED_INPUT2 FIELD32(0x0000ff00)
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#define PLL_CONTROL FIELD32(0x00070000)
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#define PLL_LPF_R1 FIELD32(0x00080000)
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#define PLL_LPF_C1_CTRL FIELD32(0x00300000)
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#define PLL_LPF_C2_CTRL FIELD32(0x00c00000)
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#define PLL_LPF_C1_CTRL FIELD32(0x00300000)
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#define PLL_LPF_C2_CTRL FIELD32(0x00c00000)
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#define PLL_CP_CURRENT_CTRL FIELD32(0x03000000)
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#define PLL_PFD_DELAY_CTRL FIELD32(0x0c000000)
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#define PLL_LOCK_CTRL FIELD32(0x70000000)
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@ -2166,7 +2166,7 @@ struct mac_iveiv_entry {
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*/
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#define RFCSR6_R1 FIELD8(0x03)
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#define RFCSR6_R2 FIELD8(0x40)
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#define RFCSR6_TXDIV FIELD8(0x0c)
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#define RFCSR6_TXDIV FIELD8(0x0c)
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/* bits for RF3053 */
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#define RFCSR6_VCO_IC FIELD8(0xc0)
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@ -2204,13 +2204,13 @@ struct mac_iveiv_entry {
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* RFCSR 12:
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*/
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#define RFCSR12_TX_POWER FIELD8(0x1f)
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#define RFCSR12_DR0 FIELD8(0xe0)
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#define RFCSR12_DR0 FIELD8(0xe0)
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/*
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* RFCSR 13:
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*/
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#define RFCSR13_TX_POWER FIELD8(0x1f)
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#define RFCSR13_DR0 FIELD8(0xe0)
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#define RFCSR13_DR0 FIELD8(0xe0)
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/*
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* RFCSR 15:
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@ -2228,7 +2228,7 @@ struct mac_iveiv_entry {
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#define RFCSR17_TXMIXER_GAIN FIELD8(0x07)
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#define RFCSR17_TX_LO1_EN FIELD8(0x08)
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#define RFCSR17_R FIELD8(0x20)
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#define RFCSR17_CODE FIELD8(0x7f)
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#define RFCSR17_CODE FIELD8(0x7f)
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/* RFCSR 18 */
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#define RFCSR18_XO_TUNE_BYPASS FIELD8(0x40)
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@ -2451,7 +2451,7 @@ enum rt2800_eeprom_word {
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*/
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#define EEPROM_NIC_CONF0_RXPATH FIELD16(0x000f)
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#define EEPROM_NIC_CONF0_TXPATH FIELD16(0x00f0)
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#define EEPROM_NIC_CONF0_RF_TYPE FIELD16(0x0f00)
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#define EEPROM_NIC_CONF0_RF_TYPE FIELD16(0x0f00)
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/*
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* EEPROM NIC Configuration 1
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@ -2473,18 +2473,18 @@ enum rt2800_eeprom_word {
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* DAC_TEST: 0: disable, 1: enable
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*/
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#define EEPROM_NIC_CONF1_HW_RADIO FIELD16(0x0001)
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#define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC FIELD16(0x0002)
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#define EEPROM_NIC_CONF1_EXTERNAL_LNA_2G FIELD16(0x0004)
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#define EEPROM_NIC_CONF1_EXTERNAL_LNA_5G FIELD16(0x0008)
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#define EEPROM_NIC_CONF1_EXTERNAL_TX_ALC FIELD16(0x0002)
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#define EEPROM_NIC_CONF1_EXTERNAL_LNA_2G FIELD16(0x0004)
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#define EEPROM_NIC_CONF1_EXTERNAL_LNA_5G FIELD16(0x0008)
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#define EEPROM_NIC_CONF1_CARDBUS_ACCEL FIELD16(0x0010)
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#define EEPROM_NIC_CONF1_BW40M_SB_2G FIELD16(0x0020)
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#define EEPROM_NIC_CONF1_BW40M_SB_5G FIELD16(0x0040)
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#define EEPROM_NIC_CONF1_WPS_PBC FIELD16(0x0080)
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#define EEPROM_NIC_CONF1_BW40M_2G FIELD16(0x0100)
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#define EEPROM_NIC_CONF1_BW40M_5G FIELD16(0x0200)
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#define EEPROM_NIC_CONF1_BROADBAND_EXT_LNA FIELD16(0x400)
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#define EEPROM_NIC_CONF1_BROADBAND_EXT_LNA FIELD16(0x400)
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#define EEPROM_NIC_CONF1_ANT_DIVERSITY FIELD16(0x1800)
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#define EEPROM_NIC_CONF1_INTERNAL_TX_ALC FIELD16(0x2000)
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#define EEPROM_NIC_CONF1_INTERNAL_TX_ALC FIELD16(0x2000)
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#define EEPROM_NIC_CONF1_BT_COEXIST FIELD16(0x4000)
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#define EEPROM_NIC_CONF1_DAC_TEST FIELD16(0x8000)
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@ -2523,9 +2523,9 @@ enum rt2800_eeprom_word {
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* TX_STREAM: 0: Reserved, 1: 1 Stream, 2: 2 Stream
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* CRYSTAL: 00: Reserved, 01: One crystal, 10: Two crystal, 11: Reserved
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*/
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#define EEPROM_NIC_CONF2_RX_STREAM FIELD16(0x000f)
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#define EEPROM_NIC_CONF2_TX_STREAM FIELD16(0x00f0)
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#define EEPROM_NIC_CONF2_CRYSTAL FIELD16(0x0600)
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#define EEPROM_NIC_CONF2_RX_STREAM FIELD16(0x000f)
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#define EEPROM_NIC_CONF2_TX_STREAM FIELD16(0x00f0)
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#define EEPROM_NIC_CONF2_CRYSTAL FIELD16(0x0600)
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/*
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* EEPROM LNA
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@ -2792,7 +2792,7 @@ enum rt2800_eeprom_word {
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#define MCU_CURRENT 0x36
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#define MCU_LED 0x50
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#define MCU_LED_STRENGTH 0x51
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#define MCU_LED_AG_CONF 0x52
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#define MCU_LED_AG_CONF 0x52
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#define MCU_LED_ACT_CONF 0x53
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#define MCU_LED_LED_POLARITY 0x54
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#define MCU_RADAR 0x60
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@ -2801,7 +2801,7 @@ enum rt2800_eeprom_word {
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#define MCU_FREQ_OFFSET 0x74
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#define MCU_BBP_SIGNAL 0x80
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#define MCU_POWER_SAVE 0x83
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#define MCU_BAND_SELECT 0x91
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#define MCU_BAND_SELECT 0x91
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/*
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* MCU mailbox tokens
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