OMAPDSS: DSS: add new clock calculation code
Add new way to iterate over DSS clock divisors. dss_div_calc() provides a generic way to go over all the divisors, within given clock range. dss_div_calc() will call a callback function for each divider set, making the function reusable for all use cases. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -473,6 +473,45 @@ int dss_calc_clock_rates(struct dss_clock_info *cinfo)
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return 0;
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}
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bool dss_div_calc(unsigned long fck_min, dss_div_calc_func func, void *data)
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{
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int fckd, fckd_start, fckd_stop;
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unsigned long fck;
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unsigned long fck_hw_max;
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unsigned long fckd_hw_max;
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unsigned long prate;
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if (dss.dpll4_m4_ck == NULL) {
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/*
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* TODO: dss1_fclk can be changed on OMAP2, but the available
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* dividers are not continuous. We just use the pre-set rate for
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* now.
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*/
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fck = clk_get_rate(dss.dss_clk);
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fckd = 1;
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return func(fckd, fck, data);
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}
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fck_hw_max = dss_feat_get_param_max(FEAT_PARAM_DSS_FCK);
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fckd_hw_max = dss.feat->fck_div_max;
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prate = dss_get_dpll4_rate() * dss.feat->dss_fck_multiplier;
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fck_min = fck_min ? fck_min : 1;
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fckd_start = min(prate / fck_min, fckd_hw_max);
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fckd_stop = max(DIV_ROUND_UP(prate, fck_hw_max), 1ul);
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for (fckd = fckd_start; fckd >= fckd_stop; --fckd) {
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fck = prate / fckd;
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if (func(fckd, fck, data))
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return true;
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}
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return false;
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}
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int dss_set_clock_div(struct dss_clock_info *cinfo)
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{
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if (dss.dpll4_m4_ck) {
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@ -271,6 +271,9 @@ int dss_set_clock_div(struct dss_clock_info *cinfo);
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int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
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struct dispc_clock_info *dispc_cinfo);
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typedef bool (*dss_div_calc_func)(int fckd, unsigned long fck, void *data);
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bool dss_div_calc(unsigned long fck_min, dss_div_calc_func func, void *data);
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/* SDI */
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int sdi_init_platform_driver(void) __init;
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void sdi_uninit_platform_driver(void) __exit;
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