Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin

Pull blackfin update from Bob Liu.

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lliubbo/blackfin:
  blackfin: SEC: clean up SEC interrupt initialization
  blackfin: kgdb: call generic_exec_single() directly
  blackfin: anomaly: add anomaly 16000030 for bf5xx
  Blackfin: dpmc: use module_platform_driver macro
  Blackfin: remove unused is_in_rom()
  Blackfin: remove unnecessary prototype for kobjsize()
  Blackfin: twi: Add missing __iomem annotation
  Blackfin: Annotate strnlen_user and strlen_user 'src' parameter with __user
  Blackfin: Annotate clear_user 'to' parameter with __user
  Blackfin: Add missing __user annotations to put_user
  Blackfin: Annotate strncpy_from_user src parameter with __user
  blackfin: Use Kbuild infrastructure for kvm_para.h
  UAPI: (Scripted) Disintegrate arch/blackfin/include/asm
This commit is contained in:
Linus Torvalds 2012-12-18 10:54:27 -08:00
commit 4351654e3d
38 changed files with 973 additions and 949 deletions

View File

@ -1,4 +1,3 @@
include include/asm-generic/Kbuild.asm
generic-y += auxvec.h
generic-y += bitsperlong.h
@ -17,6 +16,7 @@ generic-y += ipcbuf.h
generic-y += irq_regs.h
generic-y += kdebug.h
generic-y += kmap_types.h
generic-y += kvm_para.h
generic-y += local64.h
generic-y += local.h
generic-y += mman.h
@ -44,7 +44,3 @@ generic-y += ucontext.h
generic-y += unaligned.h
generic-y += user.h
generic-y += xor.h
header-y += bfin_sport.h
header-y += cachectl.h
header-y += fixed_code.h

View File

@ -5,65 +5,12 @@
*
* Licensed under the GPL-2 or later.
*/
#ifndef __BFIN_SPORT_H__
#define __BFIN_SPORT_H__
/* Sport mode: it can be set to TDM, i2s or others */
#define NORM_MODE 0x0
#define TDM_MODE 0x1
#define I2S_MODE 0x2
#define NDSO_MODE 0x3
/* Data format, normal, a-law or u-law */
#define NORM_FORMAT 0x0
#define ALAW_FORMAT 0x2
#define ULAW_FORMAT 0x3
/* Function driver which use sport must initialize the structure */
struct sport_config {
/* TDM (multichannels), I2S or other mode */
unsigned int mode:3;
unsigned int polled; /* use poll instead of irq when set */
/* if TDM mode is selected, channels must be set */
int channels; /* Must be in 8 units */
unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */
/* I2S mode */
unsigned int right_first:1; /* Right stereo channel first */
/* In mormal mode, the following item need to be set */
unsigned int lsb_first:1; /* order of transmit or receive data */
unsigned int fsync:1; /* Frame sync required */
unsigned int data_indep:1; /* data independent frame sync generated */
unsigned int act_low:1; /* Active low TFS */
unsigned int late_fsync:1; /* Late frame sync */
unsigned int tckfe:1;
unsigned int sec_en:1; /* Secondary side enabled */
/* Choose clock source */
unsigned int int_clk:1; /* Internal or external clock */
/* If external clock is used, the following fields are ignored */
int serial_clk;
int fsync_clk;
unsigned int data_format:2; /* Normal, u-law or a-law */
int word_len; /* How length of the word in bits, 3-32 bits */
int dma_enabled;
};
/* Userspace interface */
#define SPORT_IOC_MAGIC 'P'
#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
#define SPORT_IOC_GET_SYSTEMCLOCK _IOR('P', 0x02, unsigned long)
#define SPORT_IOC_SET_BAUDRATE _IOW('P', 0x03, unsigned long)
#ifdef __KERNEL__
#include <linux/types.h>
#include <uapi/asm/bfin_sport.h>
/*
* All Blackfin system MMRs are padded to 32bits even if the register
@ -122,76 +69,3 @@ struct bfin_snd_platform_data {
})
#endif
/* SPORT_TCR1 Masks */
#define TSPEN 0x0001 /* TX enable */
#define ITCLK 0x0002 /* Internal TX Clock Select */
#define TDTYPE 0x000C /* TX Data Formatting Select */
#define DTYPE_NORM 0x0000 /* Data Format Normal */
#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
#define TLSBIT 0x0010 /* TX Bit Order */
#define ITFS 0x0200 /* Internal TX Frame Sync Select */
#define TFSR 0x0400 /* TX Frame Sync Required Select */
#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
#define LTFS 0x1000 /* Low TX Frame Sync Select */
#define LATFS 0x2000 /* Late TX Frame Sync Select */
#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
/* SPORT_TCR2 Masks */
#define SLEN 0x001F /* SPORT TX Word Length (2 - 31) */
#define DP_SLEN(x) BFIN_DEPOSIT(SLEN, x)
#define EX_SLEN(x) BFIN_EXTRACT(SLEN, x)
#define TXSE 0x0100 /* TX Secondary Enable */
#define TSFSE 0x0200 /* TX Stereo Frame Sync Enable */
#define TRFST 0x0400 /* TX Right-First Data Order */
/* SPORT_RCR1 Masks */
#define RSPEN 0x0001 /* RX enable */
#define IRCLK 0x0002 /* Internal RX Clock Select */
#define RDTYPE 0x000C /* RX Data Formatting Select */
/* DTYPE_* defined above */
#define RLSBIT 0x0010 /* RX Bit Order */
#define IRFS 0x0200 /* Internal RX Frame Sync Select */
#define RFSR 0x0400 /* RX Frame Sync Required Select */
#define LRFS 0x1000 /* Low RX Frame Sync Select */
#define LARFS 0x2000 /* Late RX Frame Sync Select */
#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
/* SPORT_RCR2 Masks */
/* SLEN defined above */
#define RXSE 0x0100 /* RX Secondary Enable */
#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
#define RRFST 0x0400 /* Right-First Data Order */
/* SPORT_STAT Masks */
#define RXNE 0x0001 /* RX FIFO Not Empty Status */
#define RUVF 0x0002 /* RX Underflow Status */
#define ROVF 0x0004 /* RX Overflow Status */
#define TXF 0x0008 /* TX FIFO Full Status */
#define TUVF 0x0010 /* TX Underflow Status */
#define TOVF 0x0020 /* TX Overflow Status */
#define TXHRE 0x0040 /* TX Hold Register Empty */
/* SPORT_MCMC1 Masks */
#define SP_WOFF 0x03FF /* Multichannel Window Offset Field */
#define DP_SP_WOFF(x) BFIN_DEPOSIT(SP_WOFF, x)
#define EX_SP_WOFF(x) BFIN_EXTRACT(SP_WOFF, x)
#define SP_WSIZE 0xF000 /* Multichannel Window Size Field */
#define DP_SP_WSIZE(x) BFIN_DEPOSIT(SP_WSIZE, x)
#define EX_SP_WSIZE(x) BFIN_EXTRACT(SP_WSIZE, x)
/* SPORT_MCMC2 Masks */
#define MCCRM 0x0003 /* Multichannel Clock Recovery Mode */
#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
#define MFD 0xF000 /* Multichannel Frame Delay */
#define DP_MFD(x) BFIN_DEPOSIT(MFD, x)
#define EX_MFD(x) BFIN_EXTRACT(MFD, x)
#endif

View File

@ -61,7 +61,7 @@ struct bfin_twi_iface {
int cur_msg;
u16 saved_clkdiv;
u16 saved_control;
struct bfin_twi_regs *regs_base;
struct bfin_twi_regs __iomem *regs_base;
};
#define DEFINE_TWI_REG(reg_name, reg) \

View File

@ -6,11 +6,11 @@
*
* Licensed under the GPL-2 or later.
*/
#ifndef __BFIN_ASM_FIXED_CODE_H__
#define __BFIN_ASM_FIXED_CODE_H__
#ifdef __KERNEL__
#include <uapi/asm/fixed_code.h>
#ifndef __ASSEMBLY__
#include <linux/linkage.h>
#include <linux/ptrace.h>
@ -28,29 +28,3 @@ extern void safe_user_instruction(void);
extern void sigreturn_stub(void);
#endif
#endif
#ifndef CONFIG_PHY_RAM_BASE_ADDRESS
#define CONFIG_PHY_RAM_BASE_ADDRESS 0x0
#endif
#define FIXED_CODE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
#define SIGRETURN_STUB (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
#define ATOMIC_SEQS_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
#define ATOMIC_XCHG32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
#define ATOMIC_CAS32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)
#define ATOMIC_ADD32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)
#define ATOMIC_SUB32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)
#define ATOMIC_IOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)
#define ATOMIC_AND32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)
#define ATOMIC_XOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)
#define ATOMIC_SEQS_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
#define SAFE_USER_INSTRUCTION (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
#define FIXED_CODE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)
#endif

View File

@ -1 +0,0 @@
#include <asm-generic/kvm_para.h>

View File

@ -83,8 +83,6 @@ PTE_BIT_FUNC(mkyoung, |= _PAGE_ACCESSED);
#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
extern char empty_zero_page[];
extern unsigned int kobjsize(const void *objp);
#define swapper_pg_dir ((pgd_t *) 0)
/*
* No page table caches to initialise.

View File

@ -3,102 +3,13 @@
*
* Licensed under the GPL-2 or later.
*/
#ifndef _BFIN_PTRACE_H
#define _BFIN_PTRACE_H
/*
* GCC defines register number like this:
* -----------------------------
* 0 - 7 are data registers R0-R7
* 8 - 15 are address registers P0-P7
* 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
* 32 - 33 A registers A0 & A1
* 34 - status register
* -----------------------------
*
* We follows above, except:
* 32-33 --- Low 32-bit of A0&1
* 34-35 --- High 8-bit of A0&1
*/
#include <uapi/asm/ptrace.h>
#ifndef __ASSEMBLY__
struct task_struct;
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long orig_pc;
long ipend;
long seqstat;
long rete;
long retn;
long retx;
long pc; /* PC == RETI */
long rets;
long reserved; /* Used as scratch during system calls */
long astat;
long lb1;
long lb0;
long lt1;
long lt0;
long lc1;
long lc0;
long a1w;
long a1x;
long a0w;
long a0x;
long b3;
long b2;
long b1;
long b0;
long l3;
long l2;
long l1;
long l0;
long m3;
long m2;
long m1;
long m0;
long i3;
long i2;
long i1;
long i0;
long usp;
long fp;
long p5;
long p4;
long p3;
long p2;
long p1;
long p0;
long r7;
long r6;
long r5;
long r4;
long r3;
long r2;
long r1;
long r0;
long orig_r0;
long orig_p0;
long syscfg;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13 /* ptrace signal */
#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
#define PS_S (0x0002)
#ifdef __KERNEL__
/* user_mode returns true if only one bit is set in IPEND, other than the
master interrupt enable. */
#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1)))
@ -126,75 +37,5 @@ extern int is_user_addr_valid(struct task_struct *child,
#include <asm-generic/ptrace.h>
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
/*
* Offsets used by 'ptrace' system call interface.
*/
#define PT_R0 204
#define PT_R1 200
#define PT_R2 196
#define PT_R3 192
#define PT_R4 188
#define PT_R5 184
#define PT_R6 180
#define PT_R7 176
#define PT_P0 172
#define PT_P1 168
#define PT_P2 164
#define PT_P3 160
#define PT_P4 156
#define PT_P5 152
#define PT_FP 148
#define PT_USP 144
#define PT_I0 140
#define PT_I1 136
#define PT_I2 132
#define PT_I3 128
#define PT_M0 124
#define PT_M1 120
#define PT_M2 116
#define PT_M3 112
#define PT_L0 108
#define PT_L1 104
#define PT_L2 100
#define PT_L3 96
#define PT_B0 92
#define PT_B1 88
#define PT_B2 84
#define PT_B3 80
#define PT_A0X 76
#define PT_A0W 72
#define PT_A1X 68
#define PT_A1W 64
#define PT_LC0 60
#define PT_LC1 56
#define PT_LT0 52
#define PT_LT1 48
#define PT_LB0 44
#define PT_LB1 40
#define PT_ASTAT 36
#define PT_RESERVED 32
#define PT_RETS 28
#define PT_PC 24
#define PT_RETX 20
#define PT_RETN 16
#define PT_RETE 12
#define PT_SEQSTAT 8
#define PT_IPEND 4
#define PT_ORIG_R0 208
#define PT_ORIG_P0 212
#define PT_SYSCFG 216
#define PT_TEXT_ADDR 220
#define PT_TEXT_END_ADDR 224
#define PT_DATA_ADDR 228
#define PT_FDPIC_EXEC 232
#define PT_FDPIC_INTERP 236
#define PT_LAST_PSEUDO PT_FDPIC_INTERP
#endif /* _BFIN_PTRACE_H */

View File

@ -34,23 +34,6 @@ static inline void set_fs(mm_segment_t fs)
#define access_ok(type, addr, size) _access_ok((unsigned long)(addr), (size))
static inline int is_in_rom(unsigned long addr)
{
/*
* What we are really trying to do is determine if addr is
* in an allocated kernel memory region. If not then assume
* we cannot free it or otherwise de-allocate it. Ideally
* we could restrict this to really being in a ROM or flash,
* but that would need to be done on a board by board basis,
* not globally.
*/
if ((addr < _ramstart) || (addr >= _ramend))
return (1);
/* Default case, not in ROM */
return (0);
}
/*
* The fs value determines whether argument validity checking should be
* performed or not. If get_fs() == USER_DS, checking is performed, with
@ -89,7 +72,7 @@ struct exception_table_entry {
({ \
int _err = 0; \
typeof(*(p)) _x = (x); \
typeof(*(p)) *_p = (p); \
typeof(*(p)) __user *_p = (p); \
if (!access_ok(VERIFY_WRITE, _p, sizeof(*(_p)))) {\
_err = -EFAULT; \
} \
@ -108,8 +91,8 @@ struct exception_table_entry {
long _xl, _xh; \
_xl = ((long *)&_x)[0]; \
_xh = ((long *)&_x)[1]; \
__put_user_asm(_xl, ((long *)_p)+0, ); \
__put_user_asm(_xh, ((long *)_p)+1, ); \
__put_user_asm(_xl, ((long __user *)_p)+0, ); \
__put_user_asm(_xh, ((long __user *)_p)+1, ); \
} break; \
default: \
_err = __put_user_bad(); \
@ -136,7 +119,7 @@ static inline int bad_user_access_length(void)
* aliasing issues.
*/
#define __ptr(x) ((unsigned long *)(x))
#define __ptr(x) ((unsigned long __force *)(x))
#define __put_user_asm(x,p,bhw) \
__asm__ (#bhw"[%1] = %0;\n\t" \
@ -216,12 +199,12 @@ copy_to_user(void __user *to, const void *from, unsigned long n)
*/
static inline long __must_check
strncpy_from_user(char *dst, const char *src, long count)
strncpy_from_user(char *dst, const char __user *src, long count)
{
char *tmp;
if (!access_ok(VERIFY_READ, src, 1))
return -EFAULT;
strncpy(dst, src, count);
strncpy(dst, (const char __force *)src, count);
for (tmp = dst; *tmp && count > 0; tmp++, count--) ;
return (tmp - dst);
}
@ -237,18 +220,18 @@ strncpy_from_user(char *dst, const char *src, long count)
* On exception, returns 0.
* If the string is too long, returns a value greater than n.
*/
static inline long __must_check strnlen_user(const char *src, long n)
static inline long __must_check strnlen_user(const char __user *src, long n)
{
if (!access_ok(VERIFY_READ, src, 1))
return 0;
return strnlen(src, n) + 1;
return strnlen((const char __force *)src, n) + 1;
}
static inline long __must_check strlen_user(const char *src)
static inline long __must_check strlen_user(const char __user *src)
{
if (!access_ok(VERIFY_READ, src, 1))
return 0;
return strlen(src) + 1;
return strlen((const char __force *)src) + 1;
}
/*
@ -256,11 +239,11 @@ static inline long __must_check strlen_user(const char *src)
*/
static inline unsigned long __must_check
__clear_user(void *to, unsigned long n)
__clear_user(void __user *to, unsigned long n)
{
if (!access_ok(VERIFY_WRITE, to, n))
return n;
memset(to, 0, n);
memset((void __force *)to, 0, n);
return 0;
}

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@ -3,437 +3,11 @@
*
* Licensed under the GPL-2 or later.
*/
#ifndef __ASM_BFIN_UNISTD_H
#define __ASM_BFIN_UNISTD_H
/*
* This file contains the system call numbers.
*/
#define __NR_restart_syscall 0
#define __NR_exit 1
/* 2 __NR_fork not supported on nommu */
#define __NR_read 3
#define __NR_write 4
#define __NR_open 5
#define __NR_close 6
/* 7 __NR_waitpid obsolete */
#define __NR_creat 8
#define __NR_link 9
#define __NR_unlink 10
#define __NR_execve 11
#define __NR_chdir 12
#define __NR_time 13
#define __NR_mknod 14
#define __NR_chmod 15
#define __NR_chown 16
/* 17 __NR_break obsolete */
/* 18 __NR_oldstat obsolete */
#define __NR_lseek 19
#define __NR_getpid 20
#define __NR_mount 21
/* 22 __NR_umount obsolete */
#define __NR_setuid 23
#define __NR_getuid 24
#define __NR_stime 25
#define __NR_ptrace 26
#define __NR_alarm 27
/* 28 __NR_oldfstat obsolete */
#define __NR_pause 29
/* 30 __NR_utime obsolete */
/* 31 __NR_stty obsolete */
/* 32 __NR_gtty obsolete */
#define __NR_access 33
#define __NR_nice 34
/* 35 __NR_ftime obsolete */
#define __NR_sync 36
#define __NR_kill 37
#define __NR_rename 38
#define __NR_mkdir 39
#define __NR_rmdir 40
#define __NR_dup 41
#define __NR_pipe 42
#define __NR_times 43
/* 44 __NR_prof obsolete */
#define __NR_brk 45
#define __NR_setgid 46
#define __NR_getgid 47
/* 48 __NR_signal obsolete */
#define __NR_geteuid 49
#define __NR_getegid 50
#define __NR_acct 51
#define __NR_umount2 52
/* 53 __NR_lock obsolete */
#define __NR_ioctl 54
#define __NR_fcntl 55
/* 56 __NR_mpx obsolete */
#define __NR_setpgid 57
/* 58 __NR_ulimit obsolete */
/* 59 __NR_oldolduname obsolete */
#define __NR_umask 60
#define __NR_chroot 61
#define __NR_ustat 62
#define __NR_dup2 63
#define __NR_getppid 64
#define __NR_getpgrp 65
#define __NR_setsid 66
/* 67 __NR_sigaction obsolete */
#define __NR_sgetmask 68
#define __NR_ssetmask 69
#define __NR_setreuid 70
#define __NR_setregid 71
/* 72 __NR_sigsuspend obsolete */
/* 73 __NR_sigpending obsolete */
#define __NR_sethostname 74
#define __NR_setrlimit 75
/* 76 __NR_old_getrlimit obsolete */
#define __NR_getrusage 77
#define __NR_gettimeofday 78
#define __NR_settimeofday 79
#define __NR_getgroups 80
#define __NR_setgroups 81
/* 82 __NR_select obsolete */
#define __NR_symlink 83
/* 84 __NR_oldlstat obsolete */
#define __NR_readlink 85
/* 86 __NR_uselib obsolete */
/* 87 __NR_swapon obsolete */
#define __NR_reboot 88
/* 89 __NR_readdir obsolete */
/* 90 __NR_mmap obsolete */
#define __NR_munmap 91
#define __NR_truncate 92
#define __NR_ftruncate 93
#define __NR_fchmod 94
#define __NR_fchown 95
#define __NR_getpriority 96
#define __NR_setpriority 97
/* 98 __NR_profil obsolete */
#define __NR_statfs 99
#define __NR_fstatfs 100
/* 101 __NR_ioperm */
/* 102 __NR_socketcall obsolete */
#define __NR_syslog 103
#define __NR_setitimer 104
#define __NR_getitimer 105
#define __NR_stat 106
#define __NR_lstat 107
#define __NR_fstat 108
/* 109 __NR_olduname obsolete */
/* 110 __NR_iopl obsolete */
#define __NR_vhangup 111
/* 112 __NR_idle obsolete */
/* 113 __NR_vm86old */
#define __NR_wait4 114
/* 115 __NR_swapoff obsolete */
#define __NR_sysinfo 116
/* 117 __NR_ipc oboslete */
#define __NR_fsync 118
/* 119 __NR_sigreturn obsolete */
#define __NR_clone 120
#define __NR_setdomainname 121
#define __NR_uname 122
/* 123 __NR_modify_ldt obsolete */
#define __NR_adjtimex 124
#define __NR_mprotect 125
/* 126 __NR_sigprocmask obsolete */
/* 127 __NR_create_module obsolete */
#define __NR_init_module 128
#define __NR_delete_module 129
/* 130 __NR_get_kernel_syms obsolete */
#define __NR_quotactl 131
#define __NR_getpgid 132
#define __NR_fchdir 133
#define __NR_bdflush 134
/* 135 was sysfs */
#define __NR_personality 136
/* 137 __NR_afs_syscall */
#define __NR_setfsuid 138
#define __NR_setfsgid 139
#define __NR__llseek 140
#define __NR_getdents 141
/* 142 __NR__newselect obsolete */
#define __NR_flock 143
/* 144 __NR_msync obsolete */
#define __NR_readv 145
#define __NR_writev 146
#define __NR_getsid 147
#define __NR_fdatasync 148
#define __NR__sysctl 149
/* 150 __NR_mlock */
/* 151 __NR_munlock */
/* 152 __NR_mlockall */
/* 153 __NR_munlockall */
#define __NR_sched_setparam 154
#define __NR_sched_getparam 155
#define __NR_sched_setscheduler 156
#define __NR_sched_getscheduler 157
#define __NR_sched_yield 158
#define __NR_sched_get_priority_max 159
#define __NR_sched_get_priority_min 160
#define __NR_sched_rr_get_interval 161
#define __NR_nanosleep 162
#define __NR_mremap 163
#define __NR_setresuid 164
#define __NR_getresuid 165
/* 166 __NR_vm86 */
/* 167 __NR_query_module */
/* 168 __NR_poll */
#define __NR_nfsservctl 169
#define __NR_setresgid 170
#define __NR_getresgid 171
#define __NR_prctl 172
#define __NR_rt_sigreturn 173
#define __NR_rt_sigaction 174
#define __NR_rt_sigprocmask 175
#define __NR_rt_sigpending 176
#define __NR_rt_sigtimedwait 177
#define __NR_rt_sigqueueinfo 178
#define __NR_rt_sigsuspend 179
#define __NR_pread 180
#define __NR_pwrite 181
#define __NR_lchown 182
#define __NR_getcwd 183
#define __NR_capget 184
#define __NR_capset 185
#define __NR_sigaltstack 186
#define __NR_sendfile 187
/* 188 __NR_getpmsg */
/* 189 __NR_putpmsg */
#define __NR_vfork 190
#define __NR_getrlimit 191
#define __NR_mmap2 192
#define __NR_truncate64 193
#define __NR_ftruncate64 194
#define __NR_stat64 195
#define __NR_lstat64 196
#define __NR_fstat64 197
#define __NR_chown32 198
#define __NR_getuid32 199
#define __NR_getgid32 200
#define __NR_geteuid32 201
#define __NR_getegid32 202
#define __NR_setreuid32 203
#define __NR_setregid32 204
#define __NR_getgroups32 205
#define __NR_setgroups32 206
#define __NR_fchown32 207
#define __NR_setresuid32 208
#define __NR_getresuid32 209
#define __NR_setresgid32 210
#define __NR_getresgid32 211
#define __NR_lchown32 212
#define __NR_setuid32 213
#define __NR_setgid32 214
#define __NR_setfsuid32 215
#define __NR_setfsgid32 216
#define __NR_pivot_root 217
/* 218 __NR_mincore */
/* 219 __NR_madvise */
#define __NR_getdents64 220
#define __NR_fcntl64 221
/* 222 reserved for TUX */
/* 223 reserved for TUX */
#define __NR_gettid 224
#define __NR_readahead 225
#define __NR_setxattr 226
#define __NR_lsetxattr 227
#define __NR_fsetxattr 228
#define __NR_getxattr 229
#define __NR_lgetxattr 230
#define __NR_fgetxattr 231
#define __NR_listxattr 232
#define __NR_llistxattr 233
#define __NR_flistxattr 234
#define __NR_removexattr 235
#define __NR_lremovexattr 236
#define __NR_fremovexattr 237
#define __NR_tkill 238
#define __NR_sendfile64 239
#define __NR_futex 240
#define __NR_sched_setaffinity 241
#define __NR_sched_getaffinity 242
/* 243 __NR_set_thread_area */
/* 244 __NR_get_thread_area */
#define __NR_io_setup 245
#define __NR_io_destroy 246
#define __NR_io_getevents 247
#define __NR_io_submit 248
#define __NR_io_cancel 249
/* 250 __NR_alloc_hugepages */
/* 251 __NR_free_hugepages */
#define __NR_exit_group 252
#define __NR_lookup_dcookie 253
#define __NR_bfin_spinlock 254
#define __NR_epoll_create 255
#define __NR_epoll_ctl 256
#define __NR_epoll_wait 257
/* 258 __NR_remap_file_pages */
#define __NR_set_tid_address 259
#define __NR_timer_create 260
#define __NR_timer_settime 261
#define __NR_timer_gettime 262
#define __NR_timer_getoverrun 263
#define __NR_timer_delete 264
#define __NR_clock_settime 265
#define __NR_clock_gettime 266
#define __NR_clock_getres 267
#define __NR_clock_nanosleep 268
#define __NR_statfs64 269
#define __NR_fstatfs64 270
#define __NR_tgkill 271
#define __NR_utimes 272
#define __NR_fadvise64_64 273
/* 274 __NR_vserver */
/* 275 __NR_mbind */
/* 276 __NR_get_mempolicy */
/* 277 __NR_set_mempolicy */
#define __NR_mq_open 278
#define __NR_mq_unlink 279
#define __NR_mq_timedsend 280
#define __NR_mq_timedreceive 281
#define __NR_mq_notify 282
#define __NR_mq_getsetattr 283
#define __NR_kexec_load 284
#define __NR_waitid 285
#define __NR_add_key 286
#define __NR_request_key 287
#define __NR_keyctl 288
#define __NR_ioprio_set 289
#define __NR_ioprio_get 290
#define __NR_inotify_init 291
#define __NR_inotify_add_watch 292
#define __NR_inotify_rm_watch 293
/* 294 __NR_migrate_pages */
#define __NR_openat 295
#define __NR_mkdirat 296
#define __NR_mknodat 297
#define __NR_fchownat 298
#define __NR_futimesat 299
#define __NR_fstatat64 300
#define __NR_unlinkat 301
#define __NR_renameat 302
#define __NR_linkat 303
#define __NR_symlinkat 304
#define __NR_readlinkat 305
#define __NR_fchmodat 306
#define __NR_faccessat 307
#define __NR_pselect6 308
#define __NR_ppoll 309
#define __NR_unshare 310
#include <uapi/asm/unistd.h>
/* Blackfin private syscalls */
#define __NR_sram_alloc 311
#define __NR_sram_free 312
#define __NR_dma_memcpy 313
/* socket syscalls */
#define __NR_accept 314
#define __NR_bind 315
#define __NR_connect 316
#define __NR_getpeername 317
#define __NR_getsockname 318
#define __NR_getsockopt 319
#define __NR_listen 320
#define __NR_recv 321
#define __NR_recvfrom 322
#define __NR_recvmsg 323
#define __NR_send 324
#define __NR_sendmsg 325
#define __NR_sendto 326
#define __NR_setsockopt 327
#define __NR_shutdown 328
#define __NR_socket 329
#define __NR_socketpair 330
/* sysv ipc syscalls */
#define __NR_semctl 331
#define __NR_semget 332
#define __NR_semop 333
#define __NR_msgctl 334
#define __NR_msgget 335
#define __NR_msgrcv 336
#define __NR_msgsnd 337
#define __NR_shmat 338
#define __NR_shmctl 339
#define __NR_shmdt 340
#define __NR_shmget 341
#define __NR_splice 342
#define __NR_sync_file_range 343
#define __NR_tee 344
#define __NR_vmsplice 345
#define __NR_epoll_pwait 346
#define __NR_utimensat 347
#define __NR_signalfd 348
#define __NR_timerfd_create 349
#define __NR_eventfd 350
#define __NR_pread64 351
#define __NR_pwrite64 352
#define __NR_fadvise64 353
#define __NR_set_robust_list 354
#define __NR_get_robust_list 355
#define __NR_fallocate 356
#define __NR_semtimedop 357
#define __NR_timerfd_settime 358
#define __NR_timerfd_gettime 359
#define __NR_signalfd4 360
#define __NR_eventfd2 361
#define __NR_epoll_create1 362
#define __NR_dup3 363
#define __NR_pipe2 364
#define __NR_inotify_init1 365
#define __NR_preadv 366
#define __NR_pwritev 367
#define __NR_rt_tgsigqueueinfo 368
#define __NR_perf_event_open 369
#define __NR_recvmmsg 370
#define __NR_fanotify_init 371
#define __NR_fanotify_mark 372
#define __NR_prlimit64 373
#define __NR_cacheflush 374
#define __NR_name_to_handle_at 375
#define __NR_open_by_handle_at 376
#define __NR_clock_adjtime 377
#define __NR_syncfs 378
#define __NR_setns 379
#define __NR_sendmmsg 380
#define __NR_process_vm_readv 381
#define __NR_process_vm_writev 382
#define __NR_syscall 383
#define NR_syscalls __NR_syscall
/* Old optional stuff no one actually uses */
#define __IGNORE_sysfs
#define __IGNORE_uselib
/* Implement the newer interfaces */
#define __IGNORE_mmap
#define __IGNORE_poll
#define __IGNORE_select
#define __IGNORE_utime
/* Not relevant on no-mmu */
#define __IGNORE_swapon
#define __IGNORE_swapoff
#define __IGNORE_msync
#define __IGNORE_mlock
#define __IGNORE_munlock
#define __IGNORE_mlockall
#define __IGNORE_munlockall
#define __IGNORE_mincore
#define __IGNORE_madvise
#define __IGNORE_remap_file_pages
#define __IGNORE_mbind
#define __IGNORE_get_mempolicy
#define __IGNORE_set_mempolicy
#define __IGNORE_migrate_pages
#define __IGNORE_move_pages
#define __IGNORE_getcpu
#ifdef __KERNEL__
#define __ARCH_WANT_STAT64
#define __ARCH_WANT_SYS_ALARM
#define __ARCH_WANT_SYS_GETHOSTNAME
@ -457,6 +31,4 @@
*/
#define cond_syscall(x) asm(".weak\t_" #x "\n\t.set\t_" #x ",_sys_ni_syscall");
#endif /* __KERNEL__ */
#endif /* __ASM_BFIN_UNISTD_H */

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@ -40,8 +40,6 @@
#define IRQ_HWERR 5 /* Hardware Error */
#define IRQ_CORETMR 6 /* Core timer */
#define BFIN_IRQ(x) ((x) + 7)
#define IVG7 7
#define IVG8 8
#define IVG9 9
@ -52,6 +50,9 @@
#define IVG14 14
#define IVG15 15
#define BFIN_IRQ(x) ((x) + IVG7)
#define BFIN_SYSIRQ(x) ((x) - IVG7)
#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS)
#endif

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@ -1,3 +1,19 @@
# UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm
header-y += bfin_sport.h
header-y += byteorder.h
header-y += cachectl.h
header-y += fcntl.h
header-y += fixed_code.h
header-y += ioctls.h
header-y += kvm_para.h
header-y += poll.h
header-y += posix_types.h
header-y += ptrace.h
header-y += sigcontext.h
header-y += siginfo.h
header-y += signal.h
header-y += stat.h
header-y += swab.h
header-y += unistd.h

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@ -0,0 +1,136 @@
/*
* bfin_sport.h - interface to Blackfin SPORTs
*
* Copyright 2004-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef _UAPI__BFIN_SPORT_H__
#define _UAPI__BFIN_SPORT_H__
/* Sport mode: it can be set to TDM, i2s or others */
#define NORM_MODE 0x0
#define TDM_MODE 0x1
#define I2S_MODE 0x2
#define NDSO_MODE 0x3
/* Data format, normal, a-law or u-law */
#define NORM_FORMAT 0x0
#define ALAW_FORMAT 0x2
#define ULAW_FORMAT 0x3
/* Function driver which use sport must initialize the structure */
struct sport_config {
/* TDM (multichannels), I2S or other mode */
unsigned int mode:3;
unsigned int polled; /* use poll instead of irq when set */
/* if TDM mode is selected, channels must be set */
int channels; /* Must be in 8 units */
unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */
/* I2S mode */
unsigned int right_first:1; /* Right stereo channel first */
/* In mormal mode, the following item need to be set */
unsigned int lsb_first:1; /* order of transmit or receive data */
unsigned int fsync:1; /* Frame sync required */
unsigned int data_indep:1; /* data independent frame sync generated */
unsigned int act_low:1; /* Active low TFS */
unsigned int late_fsync:1; /* Late frame sync */
unsigned int tckfe:1;
unsigned int sec_en:1; /* Secondary side enabled */
/* Choose clock source */
unsigned int int_clk:1; /* Internal or external clock */
/* If external clock is used, the following fields are ignored */
int serial_clk;
int fsync_clk;
unsigned int data_format:2; /* Normal, u-law or a-law */
int word_len; /* How length of the word in bits, 3-32 bits */
int dma_enabled;
};
/* Userspace interface */
#define SPORT_IOC_MAGIC 'P'
#define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
#define SPORT_IOC_GET_SYSTEMCLOCK _IOR('P', 0x02, unsigned long)
#define SPORT_IOC_SET_BAUDRATE _IOW('P', 0x03, unsigned long)
/* SPORT_TCR1 Masks */
#define TSPEN 0x0001 /* TX enable */
#define ITCLK 0x0002 /* Internal TX Clock Select */
#define TDTYPE 0x000C /* TX Data Formatting Select */
#define DTYPE_NORM 0x0000 /* Data Format Normal */
#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
#define TLSBIT 0x0010 /* TX Bit Order */
#define ITFS 0x0200 /* Internal TX Frame Sync Select */
#define TFSR 0x0400 /* TX Frame Sync Required Select */
#define DITFS 0x0800 /* Data Independent TX Frame Sync Select */
#define LTFS 0x1000 /* Low TX Frame Sync Select */
#define LATFS 0x2000 /* Late TX Frame Sync Select */
#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
/* SPORT_TCR2 Masks */
#define SLEN 0x001F /* SPORT TX Word Length (2 - 31) */
#define DP_SLEN(x) BFIN_DEPOSIT(SLEN, x)
#define EX_SLEN(x) BFIN_EXTRACT(SLEN, x)
#define TXSE 0x0100 /* TX Secondary Enable */
#define TSFSE 0x0200 /* TX Stereo Frame Sync Enable */
#define TRFST 0x0400 /* TX Right-First Data Order */
/* SPORT_RCR1 Masks */
#define RSPEN 0x0001 /* RX enable */
#define IRCLK 0x0002 /* Internal RX Clock Select */
#define RDTYPE 0x000C /* RX Data Formatting Select */
/* DTYPE_* defined above */
#define RLSBIT 0x0010 /* RX Bit Order */
#define IRFS 0x0200 /* Internal RX Frame Sync Select */
#define RFSR 0x0400 /* RX Frame Sync Required Select */
#define LRFS 0x1000 /* Low RX Frame Sync Select */
#define LARFS 0x2000 /* Late RX Frame Sync Select */
#define RCKFE 0x4000 /* RX Clock Falling Edge Select */
/* SPORT_RCR2 Masks */
/* SLEN defined above */
#define RXSE 0x0100 /* RX Secondary Enable */
#define RSFSE 0x0200 /* RX Stereo Frame Sync Enable */
#define RRFST 0x0400 /* Right-First Data Order */
/* SPORT_STAT Masks */
#define RXNE 0x0001 /* RX FIFO Not Empty Status */
#define RUVF 0x0002 /* RX Underflow Status */
#define ROVF 0x0004 /* RX Overflow Status */
#define TXF 0x0008 /* TX FIFO Full Status */
#define TUVF 0x0010 /* TX Underflow Status */
#define TOVF 0x0020 /* TX Overflow Status */
#define TXHRE 0x0040 /* TX Hold Register Empty */
/* SPORT_MCMC1 Masks */
#define SP_WOFF 0x03FF /* Multichannel Window Offset Field */
#define DP_SP_WOFF(x) BFIN_DEPOSIT(SP_WOFF, x)
#define EX_SP_WOFF(x) BFIN_EXTRACT(SP_WOFF, x)
#define SP_WSIZE 0xF000 /* Multichannel Window Size Field */
#define DP_SP_WSIZE(x) BFIN_DEPOSIT(SP_WSIZE, x)
#define EX_SP_WSIZE(x) BFIN_EXTRACT(SP_WSIZE, x)
/* SPORT_MCMC2 Masks */
#define MCCRM 0x0003 /* Multichannel Clock Recovery Mode */
#define REC_BYPASS 0x0000 /* Bypass Mode (No Clock Recovery) */
#define REC_2FROM4 0x0002 /* Recover 2 MHz Clock from 4 MHz Clock */
#define REC_8FROM16 0x0003 /* Recover 8 MHz Clock from 16 MHz Clock */
#define MCDTXPE 0x0004 /* Multichannel DMA Transmit Packing */
#define MCDRXPE 0x0008 /* Multichannel DMA Receive Packing */
#define MCMEN 0x0010 /* Multichannel Frame Mode Enable */
#define FSDR 0x0080 /* Multichannel Frame Sync to Data Relationship */
#define MFD 0xF000 /* Multichannel Frame Delay */
#define DP_MFD(x) BFIN_DEPOSIT(MFD, x)
#define EX_MFD(x) BFIN_EXTRACT(MFD, x)
#endif /* _UAPI__BFIN_SPORT_H__ */

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@ -0,0 +1,38 @@
/*
* This file defines the fixed addresses where userspace programs
* can find atomic code sequences.
*
* Copyright 2007-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef _UAPI__BFIN_ASM_FIXED_CODE_H__
#define _UAPI__BFIN_ASM_FIXED_CODE_H__
#ifndef CONFIG_PHY_RAM_BASE_ADDRESS
#define CONFIG_PHY_RAM_BASE_ADDRESS 0x0
#endif
#define FIXED_CODE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
#define SIGRETURN_STUB (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
#define ATOMIC_SEQS_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
#define ATOMIC_XCHG32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
#define ATOMIC_CAS32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)
#define ATOMIC_ADD32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)
#define ATOMIC_SUB32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)
#define ATOMIC_IOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)
#define ATOMIC_AND32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)
#define ATOMIC_XOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)
#define ATOMIC_SEQS_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
#define SAFE_USER_INSTRUCTION (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
#define FIXED_CODE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)
#endif /* _UAPI__BFIN_ASM_FIXED_CODE_H__ */

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@ -0,0 +1,170 @@
/*
* Copyright 2004-2008 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef _UAPI_BFIN_PTRACE_H
#define _UAPI_BFIN_PTRACE_H
/*
* GCC defines register number like this:
* -----------------------------
* 0 - 7 are data registers R0-R7
* 8 - 15 are address registers P0-P7
* 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
* 32 - 33 A registers A0 & A1
* 34 - status register
* -----------------------------
*
* We follows above, except:
* 32-33 --- Low 32-bit of A0&1
* 34-35 --- High 8-bit of A0&1
*/
#ifndef __ASSEMBLY__
struct task_struct;
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long orig_pc;
long ipend;
long seqstat;
long rete;
long retn;
long retx;
long pc; /* PC == RETI */
long rets;
long reserved; /* Used as scratch during system calls */
long astat;
long lb1;
long lb0;
long lt1;
long lt0;
long lc1;
long lc0;
long a1w;
long a1x;
long a0w;
long a0x;
long b3;
long b2;
long b1;
long b0;
long l3;
long l2;
long l1;
long l0;
long m3;
long m2;
long m1;
long m0;
long i3;
long i2;
long i1;
long i0;
long usp;
long fp;
long p5;
long p4;
long p3;
long p2;
long p1;
long p0;
long r7;
long r6;
long r5;
long r4;
long r3;
long r2;
long r1;
long r0;
long orig_r0;
long orig_p0;
long syscfg;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13 /* ptrace signal */
#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
#define PS_S (0x0002)
#endif /* __ASSEMBLY__ */
/*
* Offsets used by 'ptrace' system call interface.
*/
#define PT_R0 204
#define PT_R1 200
#define PT_R2 196
#define PT_R3 192
#define PT_R4 188
#define PT_R5 184
#define PT_R6 180
#define PT_R7 176
#define PT_P0 172
#define PT_P1 168
#define PT_P2 164
#define PT_P3 160
#define PT_P4 156
#define PT_P5 152
#define PT_FP 148
#define PT_USP 144
#define PT_I0 140
#define PT_I1 136
#define PT_I2 132
#define PT_I3 128
#define PT_M0 124
#define PT_M1 120
#define PT_M2 116
#define PT_M3 112
#define PT_L0 108
#define PT_L1 104
#define PT_L2 100
#define PT_L3 96
#define PT_B0 92
#define PT_B1 88
#define PT_B2 84
#define PT_B3 80
#define PT_A0X 76
#define PT_A0W 72
#define PT_A1X 68
#define PT_A1W 64
#define PT_LC0 60
#define PT_LC1 56
#define PT_LT0 52
#define PT_LT1 48
#define PT_LB0 44
#define PT_LB1 40
#define PT_ASTAT 36
#define PT_RESERVED 32
#define PT_RETS 28
#define PT_PC 24
#define PT_RETX 20
#define PT_RETN 16
#define PT_RETE 12
#define PT_SEQSTAT 8
#define PT_IPEND 4
#define PT_ORIG_R0 208
#define PT_ORIG_P0 212
#define PT_SYSCFG 216
#define PT_TEXT_ADDR 220
#define PT_TEXT_END_ADDR 224
#define PT_DATA_ADDR 228
#define PT_FDPIC_EXEC 232
#define PT_FDPIC_INTERP 236
#define PT_LAST_PSEUDO PT_FDPIC_INTERP
#endif /* _UAPI_BFIN_PTRACE_H */

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@ -0,0 +1,437 @@
/*
* Copyright 2004-2009 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
#ifndef _UAPI__ASM_BFIN_UNISTD_H
#define _UAPI__ASM_BFIN_UNISTD_H
/*
* This file contains the system call numbers.
*/
#define __NR_restart_syscall 0
#define __NR_exit 1
/* 2 __NR_fork not supported on nommu */
#define __NR_read 3
#define __NR_write 4
#define __NR_open 5
#define __NR_close 6
/* 7 __NR_waitpid obsolete */
#define __NR_creat 8
#define __NR_link 9
#define __NR_unlink 10
#define __NR_execve 11
#define __NR_chdir 12
#define __NR_time 13
#define __NR_mknod 14
#define __NR_chmod 15
#define __NR_chown 16
/* 17 __NR_break obsolete */
/* 18 __NR_oldstat obsolete */
#define __NR_lseek 19
#define __NR_getpid 20
#define __NR_mount 21
/* 22 __NR_umount obsolete */
#define __NR_setuid 23
#define __NR_getuid 24
#define __NR_stime 25
#define __NR_ptrace 26
#define __NR_alarm 27
/* 28 __NR_oldfstat obsolete */
#define __NR_pause 29
/* 30 __NR_utime obsolete */
/* 31 __NR_stty obsolete */
/* 32 __NR_gtty obsolete */
#define __NR_access 33
#define __NR_nice 34
/* 35 __NR_ftime obsolete */
#define __NR_sync 36
#define __NR_kill 37
#define __NR_rename 38
#define __NR_mkdir 39
#define __NR_rmdir 40
#define __NR_dup 41
#define __NR_pipe 42
#define __NR_times 43
/* 44 __NR_prof obsolete */
#define __NR_brk 45
#define __NR_setgid 46
#define __NR_getgid 47
/* 48 __NR_signal obsolete */
#define __NR_geteuid 49
#define __NR_getegid 50
#define __NR_acct 51
#define __NR_umount2 52
/* 53 __NR_lock obsolete */
#define __NR_ioctl 54
#define __NR_fcntl 55
/* 56 __NR_mpx obsolete */
#define __NR_setpgid 57
/* 58 __NR_ulimit obsolete */
/* 59 __NR_oldolduname obsolete */
#define __NR_umask 60
#define __NR_chroot 61
#define __NR_ustat 62
#define __NR_dup2 63
#define __NR_getppid 64
#define __NR_getpgrp 65
#define __NR_setsid 66
/* 67 __NR_sigaction obsolete */
#define __NR_sgetmask 68
#define __NR_ssetmask 69
#define __NR_setreuid 70
#define __NR_setregid 71
/* 72 __NR_sigsuspend obsolete */
/* 73 __NR_sigpending obsolete */
#define __NR_sethostname 74
#define __NR_setrlimit 75
/* 76 __NR_old_getrlimit obsolete */
#define __NR_getrusage 77
#define __NR_gettimeofday 78
#define __NR_settimeofday 79
#define __NR_getgroups 80
#define __NR_setgroups 81
/* 82 __NR_select obsolete */
#define __NR_symlink 83
/* 84 __NR_oldlstat obsolete */
#define __NR_readlink 85
/* 86 __NR_uselib obsolete */
/* 87 __NR_swapon obsolete */
#define __NR_reboot 88
/* 89 __NR_readdir obsolete */
/* 90 __NR_mmap obsolete */
#define __NR_munmap 91
#define __NR_truncate 92
#define __NR_ftruncate 93
#define __NR_fchmod 94
#define __NR_fchown 95
#define __NR_getpriority 96
#define __NR_setpriority 97
/* 98 __NR_profil obsolete */
#define __NR_statfs 99
#define __NR_fstatfs 100
/* 101 __NR_ioperm */
/* 102 __NR_socketcall obsolete */
#define __NR_syslog 103
#define __NR_setitimer 104
#define __NR_getitimer 105
#define __NR_stat 106
#define __NR_lstat 107
#define __NR_fstat 108
/* 109 __NR_olduname obsolete */
/* 110 __NR_iopl obsolete */
#define __NR_vhangup 111
/* 112 __NR_idle obsolete */
/* 113 __NR_vm86old */
#define __NR_wait4 114
/* 115 __NR_swapoff obsolete */
#define __NR_sysinfo 116
/* 117 __NR_ipc oboslete */
#define __NR_fsync 118
/* 119 __NR_sigreturn obsolete */
#define __NR_clone 120
#define __NR_setdomainname 121
#define __NR_uname 122
/* 123 __NR_modify_ldt obsolete */
#define __NR_adjtimex 124
#define __NR_mprotect 125
/* 126 __NR_sigprocmask obsolete */
/* 127 __NR_create_module obsolete */
#define __NR_init_module 128
#define __NR_delete_module 129
/* 130 __NR_get_kernel_syms obsolete */
#define __NR_quotactl 131
#define __NR_getpgid 132
#define __NR_fchdir 133
#define __NR_bdflush 134
/* 135 was sysfs */
#define __NR_personality 136
/* 137 __NR_afs_syscall */
#define __NR_setfsuid 138
#define __NR_setfsgid 139
#define __NR__llseek 140
#define __NR_getdents 141
/* 142 __NR__newselect obsolete */
#define __NR_flock 143
/* 144 __NR_msync obsolete */
#define __NR_readv 145
#define __NR_writev 146
#define __NR_getsid 147
#define __NR_fdatasync 148
#define __NR__sysctl 149
/* 150 __NR_mlock */
/* 151 __NR_munlock */
/* 152 __NR_mlockall */
/* 153 __NR_munlockall */
#define __NR_sched_setparam 154
#define __NR_sched_getparam 155
#define __NR_sched_setscheduler 156
#define __NR_sched_getscheduler 157
#define __NR_sched_yield 158
#define __NR_sched_get_priority_max 159
#define __NR_sched_get_priority_min 160
#define __NR_sched_rr_get_interval 161
#define __NR_nanosleep 162
#define __NR_mremap 163
#define __NR_setresuid 164
#define __NR_getresuid 165
/* 166 __NR_vm86 */
/* 167 __NR_query_module */
/* 168 __NR_poll */
#define __NR_nfsservctl 169
#define __NR_setresgid 170
#define __NR_getresgid 171
#define __NR_prctl 172
#define __NR_rt_sigreturn 173
#define __NR_rt_sigaction 174
#define __NR_rt_sigprocmask 175
#define __NR_rt_sigpending 176
#define __NR_rt_sigtimedwait 177
#define __NR_rt_sigqueueinfo 178
#define __NR_rt_sigsuspend 179
#define __NR_pread 180
#define __NR_pwrite 181
#define __NR_lchown 182
#define __NR_getcwd 183
#define __NR_capget 184
#define __NR_capset 185
#define __NR_sigaltstack 186
#define __NR_sendfile 187
/* 188 __NR_getpmsg */
/* 189 __NR_putpmsg */
#define __NR_vfork 190
#define __NR_getrlimit 191
#define __NR_mmap2 192
#define __NR_truncate64 193
#define __NR_ftruncate64 194
#define __NR_stat64 195
#define __NR_lstat64 196
#define __NR_fstat64 197
#define __NR_chown32 198
#define __NR_getuid32 199
#define __NR_getgid32 200
#define __NR_geteuid32 201
#define __NR_getegid32 202
#define __NR_setreuid32 203
#define __NR_setregid32 204
#define __NR_getgroups32 205
#define __NR_setgroups32 206
#define __NR_fchown32 207
#define __NR_setresuid32 208
#define __NR_getresuid32 209
#define __NR_setresgid32 210
#define __NR_getresgid32 211
#define __NR_lchown32 212
#define __NR_setuid32 213
#define __NR_setgid32 214
#define __NR_setfsuid32 215
#define __NR_setfsgid32 216
#define __NR_pivot_root 217
/* 218 __NR_mincore */
/* 219 __NR_madvise */
#define __NR_getdents64 220
#define __NR_fcntl64 221
/* 222 reserved for TUX */
/* 223 reserved for TUX */
#define __NR_gettid 224
#define __NR_readahead 225
#define __NR_setxattr 226
#define __NR_lsetxattr 227
#define __NR_fsetxattr 228
#define __NR_getxattr 229
#define __NR_lgetxattr 230
#define __NR_fgetxattr 231
#define __NR_listxattr 232
#define __NR_llistxattr 233
#define __NR_flistxattr 234
#define __NR_removexattr 235
#define __NR_lremovexattr 236
#define __NR_fremovexattr 237
#define __NR_tkill 238
#define __NR_sendfile64 239
#define __NR_futex 240
#define __NR_sched_setaffinity 241
#define __NR_sched_getaffinity 242
/* 243 __NR_set_thread_area */
/* 244 __NR_get_thread_area */
#define __NR_io_setup 245
#define __NR_io_destroy 246
#define __NR_io_getevents 247
#define __NR_io_submit 248
#define __NR_io_cancel 249
/* 250 __NR_alloc_hugepages */
/* 251 __NR_free_hugepages */
#define __NR_exit_group 252
#define __NR_lookup_dcookie 253
#define __NR_bfin_spinlock 254
#define __NR_epoll_create 255
#define __NR_epoll_ctl 256
#define __NR_epoll_wait 257
/* 258 __NR_remap_file_pages */
#define __NR_set_tid_address 259
#define __NR_timer_create 260
#define __NR_timer_settime 261
#define __NR_timer_gettime 262
#define __NR_timer_getoverrun 263
#define __NR_timer_delete 264
#define __NR_clock_settime 265
#define __NR_clock_gettime 266
#define __NR_clock_getres 267
#define __NR_clock_nanosleep 268
#define __NR_statfs64 269
#define __NR_fstatfs64 270
#define __NR_tgkill 271
#define __NR_utimes 272
#define __NR_fadvise64_64 273
/* 274 __NR_vserver */
/* 275 __NR_mbind */
/* 276 __NR_get_mempolicy */
/* 277 __NR_set_mempolicy */
#define __NR_mq_open 278
#define __NR_mq_unlink 279
#define __NR_mq_timedsend 280
#define __NR_mq_timedreceive 281
#define __NR_mq_notify 282
#define __NR_mq_getsetattr 283
#define __NR_kexec_load 284
#define __NR_waitid 285
#define __NR_add_key 286
#define __NR_request_key 287
#define __NR_keyctl 288
#define __NR_ioprio_set 289
#define __NR_ioprio_get 290
#define __NR_inotify_init 291
#define __NR_inotify_add_watch 292
#define __NR_inotify_rm_watch 293
/* 294 __NR_migrate_pages */
#define __NR_openat 295
#define __NR_mkdirat 296
#define __NR_mknodat 297
#define __NR_fchownat 298
#define __NR_futimesat 299
#define __NR_fstatat64 300
#define __NR_unlinkat 301
#define __NR_renameat 302
#define __NR_linkat 303
#define __NR_symlinkat 304
#define __NR_readlinkat 305
#define __NR_fchmodat 306
#define __NR_faccessat 307
#define __NR_pselect6 308
#define __NR_ppoll 309
#define __NR_unshare 310
/* Blackfin private syscalls */
#define __NR_sram_alloc 311
#define __NR_sram_free 312
#define __NR_dma_memcpy 313
/* socket syscalls */
#define __NR_accept 314
#define __NR_bind 315
#define __NR_connect 316
#define __NR_getpeername 317
#define __NR_getsockname 318
#define __NR_getsockopt 319
#define __NR_listen 320
#define __NR_recv 321
#define __NR_recvfrom 322
#define __NR_recvmsg 323
#define __NR_send 324
#define __NR_sendmsg 325
#define __NR_sendto 326
#define __NR_setsockopt 327
#define __NR_shutdown 328
#define __NR_socket 329
#define __NR_socketpair 330
/* sysv ipc syscalls */
#define __NR_semctl 331
#define __NR_semget 332
#define __NR_semop 333
#define __NR_msgctl 334
#define __NR_msgget 335
#define __NR_msgrcv 336
#define __NR_msgsnd 337
#define __NR_shmat 338
#define __NR_shmctl 339
#define __NR_shmdt 340
#define __NR_shmget 341
#define __NR_splice 342
#define __NR_sync_file_range 343
#define __NR_tee 344
#define __NR_vmsplice 345
#define __NR_epoll_pwait 346
#define __NR_utimensat 347
#define __NR_signalfd 348
#define __NR_timerfd_create 349
#define __NR_eventfd 350
#define __NR_pread64 351
#define __NR_pwrite64 352
#define __NR_fadvise64 353
#define __NR_set_robust_list 354
#define __NR_get_robust_list 355
#define __NR_fallocate 356
#define __NR_semtimedop 357
#define __NR_timerfd_settime 358
#define __NR_timerfd_gettime 359
#define __NR_signalfd4 360
#define __NR_eventfd2 361
#define __NR_epoll_create1 362
#define __NR_dup3 363
#define __NR_pipe2 364
#define __NR_inotify_init1 365
#define __NR_preadv 366
#define __NR_pwritev 367
#define __NR_rt_tgsigqueueinfo 368
#define __NR_perf_event_open 369
#define __NR_recvmmsg 370
#define __NR_fanotify_init 371
#define __NR_fanotify_mark 372
#define __NR_prlimit64 373
#define __NR_cacheflush 374
#define __NR_name_to_handle_at 375
#define __NR_open_by_handle_at 376
#define __NR_clock_adjtime 377
#define __NR_syncfs 378
#define __NR_setns 379
#define __NR_sendmmsg 380
#define __NR_process_vm_readv 381
#define __NR_process_vm_writev 382
#define __NR_syscall 383
#define NR_syscalls __NR_syscall
/* Old optional stuff no one actually uses */
#define __IGNORE_sysfs
#define __IGNORE_uselib
/* Implement the newer interfaces */
#define __IGNORE_mmap
#define __IGNORE_poll
#define __IGNORE_select
#define __IGNORE_utime
/* Not relevant on no-mmu */
#define __IGNORE_swapon
#define __IGNORE_swapoff
#define __IGNORE_msync
#define __IGNORE_mlock
#define __IGNORE_munlock
#define __IGNORE_mlockall
#define __IGNORE_munlockall
#define __IGNORE_mincore
#define __IGNORE_madvise
#define __IGNORE_remap_file_pages
#define __IGNORE_mbind
#define __IGNORE_get_mempolicy
#define __IGNORE_set_mempolicy
#define __IGNORE_migrate_pages
#define __IGNORE_move_pages
#define __IGNORE_getcpu
#endif /* _UAPI__ASM_BFIN_UNISTD_H */

View File

@ -329,6 +329,9 @@ static void bfin_disable_hw_debug(struct pt_regs *regs)
}
#ifdef CONFIG_SMP
extern void generic_exec_single(int cpu, struct call_single_data *data, int wait);
static struct call_single_data kgdb_smp_ipi_data[NR_CPUS];
void kgdb_passive_cpu_callback(void *info)
{
kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs());
@ -336,12 +339,18 @@ void kgdb_passive_cpu_callback(void *info)
void kgdb_roundup_cpus(unsigned long flags)
{
smp_call_function(kgdb_passive_cpu_callback, NULL, 0);
unsigned int cpu;
for (cpu = cpumask_first(cpu_online_mask); cpu < nr_cpu_ids;
cpu = cpumask_next(cpu, cpu_online_mask)) {
kgdb_smp_ipi_data[cpu].func = kgdb_passive_cpu_callback;
generic_exec_single(cpu, &kgdb_smp_ipi_data[cpu], 0);
}
}
void kgdb_roundup_cpu(int cpu, unsigned long flags)
{
smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0);
generic_exec_single(cpu, &kgdb_smp_ipi_data[cpu], 0);
}
#endif

View File

@ -165,5 +165,6 @@
#define ANOMALY_05000474 (0)
#define ANOMALY_05000475 (0)
#define ANOMALY_05000480 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -285,5 +285,6 @@
#define ANOMALY_05000448 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000480 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -378,5 +378,6 @@
#define ANOMALY_05000474 (0)
#define ANOMALY_05000480 (0)
#define ANOMALY_05000485 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -236,5 +236,6 @@
#define ANOMALY_05000467 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000485 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -210,5 +210,6 @@
#define ANOMALY_05000474 (0)
#define ANOMALY_05000480 (0)
#define ANOMALY_05000485 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -296,5 +296,6 @@
#define ANOMALY_05000440 (0)
#define ANOMALY_05000475 (0)
#define ANOMALY_05000480 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -348,5 +348,6 @@
#define ANOMALY_05000474 (0)
#define ANOMALY_05000480 (0)
#define ANOMALY_05000485 (0)
#define ANOMALY_16000030 (0)
#endif

View File

@ -9,9 +9,6 @@
#include <mach-common/irq.h>
#undef BFIN_IRQ
#define BFIN_IRQ(x) ((x) + IVG15)
#define NR_PERI_INTS (5 * 32)
#define IRQ_SEC_ERR BFIN_IRQ(0) /* SEC Error */

View File

@ -174,7 +174,6 @@ void bfin_hibernate_syscontrol(void)
bfin_write32(DPM0_RESTORE5, bfin_read32(DPM0_RESTORE5) | 4);
}
#define IRQ_SID(irq) ((irq) - IVG15)
asmlinkage void enter_deepsleep(void);
__attribute__((l1_text))
@ -311,7 +310,7 @@ static irqreturn_t test_isr(int irq, void *dev_id)
{
printk(KERN_DEBUG "gpio irq %d\n", irq);
if (irq == 231)
bfin_sec_raise_irq(IRQ_SID(IRQ_SOFT1));
bfin_sec_raise_irq(BFIN_SYSIRQ(IRQ_SOFT1));
return IRQ_HANDLED;
}

View File

@ -157,24 +157,7 @@ struct platform_driver bfin_dpmc_device_driver = {
.name = DRIVER_NAME,
}
};
/**
* bfin_dpmc_init - Init driver
*/
static int __init bfin_dpmc_init(void)
{
return platform_driver_register(&bfin_dpmc_device_driver);
}
module_init(bfin_dpmc_init);
/**
* bfin_dpmc_exit - break down driver
*/
static void __exit bfin_dpmc_exit(void)
{
platform_driver_unregister(&bfin_dpmc_device_driver);
}
module_exit(bfin_dpmc_exit);
module_platform_driver(bfin_dpmc_device_driver);
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
MODULE_DESCRIPTION("cpu power management driver for Blackfin");

View File

@ -28,12 +28,6 @@
#include <asm/dpmc.h>
#include <asm/traps.h>
#ifndef SEC_GCTL
# define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))
#else
# define SIC_SYSIRQ(irq) ((irq) - IVG15)
#endif
/*
* NOTES:
* - we have separated the physical Hardware interrupt from the
@ -141,13 +135,13 @@ static void bfin_core_unmask_irq(struct irq_data *d)
return;
}
#ifndef SEC_GCTL
void bfin_internal_mask_irq(unsigned int irq)
{
unsigned long flags = hard_local_irq_save();
#ifndef SEC_GCTL
#ifdef SIC_IMASK0
unsigned mask_bank = SIC_SYSIRQ(irq) / 32;
unsigned mask_bit = SIC_SYSIRQ(irq) % 32;
unsigned mask_bank = BFIN_SYSIRQ(irq) / 32;
unsigned mask_bit = BFIN_SYSIRQ(irq) % 32;
bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
~(1 << mask_bit));
# if defined(CONFIG_SMP) || defined(CONFIG_ICC)
@ -156,9 +150,8 @@ void bfin_internal_mask_irq(unsigned int irq)
# endif
#else
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &
~(1 << SIC_SYSIRQ(irq)));
~(1 << BFIN_SYSIRQ(irq)));
#endif /* end of SIC_IMASK0 */
#endif
hard_local_irq_restore(flags);
}
@ -176,10 +169,9 @@ void bfin_internal_unmask_irq(unsigned int irq)
{
unsigned long flags = hard_local_irq_save();
#ifndef SEC_GCTL
#ifdef SIC_IMASK0
unsigned mask_bank = SIC_SYSIRQ(irq) / 32;
unsigned mask_bit = SIC_SYSIRQ(irq) % 32;
unsigned mask_bank = BFIN_SYSIRQ(irq) / 32;
unsigned mask_bit = BFIN_SYSIRQ(irq) % 32;
# ifdef CONFIG_SMP
if (cpumask_test_cpu(0, affinity))
# endif
@ -194,17 +186,103 @@ void bfin_internal_unmask_irq(unsigned int irq)
# endif
#else
bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |
(1 << SIC_SYSIRQ(irq)));
#endif
(1 << BFIN_SYSIRQ(irq)));
#endif
hard_local_irq_restore(flags);
}
#ifdef SEC_GCTL
#ifdef CONFIG_SMP
static void bfin_internal_unmask_irq_chip(struct irq_data *d)
{
bfin_internal_unmask_irq_affinity(d->irq, d->affinity);
}
static int bfin_internal_set_affinity(struct irq_data *d,
const struct cpumask *mask, bool force)
{
bfin_internal_mask_irq(d->irq);
bfin_internal_unmask_irq_affinity(d->irq, mask);
return 0;
}
#else
static void bfin_internal_unmask_irq_chip(struct irq_data *d)
{
bfin_internal_unmask_irq(d->irq);
}
#endif
#if defined(CONFIG_PM)
int bfin_internal_set_wake(unsigned int irq, unsigned int state)
{
u32 bank, bit, wakeup = 0;
unsigned long flags;
bank = BFIN_SYSIRQ(irq) / 32;
bit = BFIN_SYSIRQ(irq) % 32;
switch (irq) {
#ifdef IRQ_RTC
case IRQ_RTC:
wakeup |= WAKE;
break;
#endif
#ifdef IRQ_CAN0_RX
case IRQ_CAN0_RX:
wakeup |= CANWE;
break;
#endif
#ifdef IRQ_CAN1_RX
case IRQ_CAN1_RX:
wakeup |= CANWE;
break;
#endif
#ifdef IRQ_USB_INT0
case IRQ_USB_INT0:
wakeup |= USBWE;
break;
#endif
#ifdef CONFIG_BF54x
case IRQ_CNT:
wakeup |= ROTWE;
break;
#endif
default:
break;
}
flags = hard_local_irq_save();
if (state) {
bfin_sic_iwr[bank] |= (1 << bit);
vr_wakeup |= wakeup;
} else {
bfin_sic_iwr[bank] &= ~(1 << bit);
vr_wakeup &= ~wakeup;
}
hard_local_irq_restore(flags);
return 0;
}
static int bfin_internal_set_wake_chip(struct irq_data *d, unsigned int state)
{
return bfin_internal_set_wake(d->irq, state);
}
#else
inline int bfin_internal_set_wake(unsigned int irq, unsigned int state)
{
return 0;
}
# define bfin_internal_set_wake_chip NULL
#endif
#else /* SEC_GCTL */
static void bfin_sec_preflow_handler(struct irq_data *d)
{
unsigned long flags = hard_local_irq_save();
unsigned int sid = SIC_SYSIRQ(d->irq);
unsigned int sid = BFIN_SYSIRQ(d->irq);
bfin_write_SEC_SCI(0, SEC_CSID, sid);
@ -214,7 +292,7 @@ static void bfin_sec_preflow_handler(struct irq_data *d)
static void bfin_sec_mask_ack_irq(struct irq_data *d)
{
unsigned long flags = hard_local_irq_save();
unsigned int sid = SIC_SYSIRQ(d->irq);
unsigned int sid = BFIN_SYSIRQ(d->irq);
bfin_write_SEC_SCI(0, SEC_CSID, sid);
@ -224,7 +302,7 @@ static void bfin_sec_mask_ack_irq(struct irq_data *d)
static void bfin_sec_unmask_irq(struct irq_data *d)
{
unsigned long flags = hard_local_irq_save();
unsigned int sid = SIC_SYSIRQ(d->irq);
unsigned int sid = BFIN_SYSIRQ(d->irq);
bfin_write32(SEC_END, sid);
@ -269,7 +347,7 @@ static void bfin_sec_enable_sci(unsigned int sid)
unsigned long flags = hard_local_irq_save();
uint32_t reg_sctl = bfin_read_SEC_SCTL(sid);
if (sid == SIC_SYSIRQ(IRQ_WATCH0))
if (sid == BFIN_SYSIRQ(IRQ_WATCH0))
reg_sctl |= SEC_SCTL_FAULT_EN;
else
reg_sctl |= SEC_SCTL_INT_EN;
@ -292,7 +370,7 @@ static void bfin_sec_disable_sci(unsigned int sid)
static void bfin_sec_enable(struct irq_data *d)
{
unsigned long flags = hard_local_irq_save();
unsigned int sid = SIC_SYSIRQ(d->irq);
unsigned int sid = BFIN_SYSIRQ(d->irq);
bfin_sec_enable_sci(sid);
bfin_sec_enable_ssi(sid);
@ -303,7 +381,7 @@ static void bfin_sec_enable(struct irq_data *d)
static void bfin_sec_disable(struct irq_data *d)
{
unsigned long flags = hard_local_irq_save();
unsigned int sid = SIC_SYSIRQ(d->irq);
unsigned int sid = BFIN_SYSIRQ(d->irq);
bfin_sec_disable_sci(sid);
bfin_sec_disable_ssi(sid);
@ -328,9 +406,10 @@ static void bfin_sec_set_priority(unsigned int sec_int_levels, u8 *sec_int_prior
hard_local_irq_restore(flags);
}
void bfin_sec_raise_irq(unsigned int sid)
void bfin_sec_raise_irq(unsigned int irq)
{
unsigned long flags = hard_local_irq_save();
unsigned int sid = BFIN_SYSIRQ(irq);
bfin_write32(SEC_RAISE, sid);
@ -341,8 +420,13 @@ static void init_software_driven_irq(void)
{
bfin_sec_set_ssi_coreid(34, 0);
bfin_sec_set_ssi_coreid(35, 1);
bfin_sec_enable_sci(35);
bfin_sec_enable_ssi(35);
bfin_sec_set_ssi_coreid(36, 0);
bfin_sec_set_ssi_coreid(37, 1);
bfin_sec_enable_sci(37);
bfin_sec_enable_ssi(37);
}
void bfin_sec_resume(void)
@ -412,6 +496,8 @@ void handle_sec_fault(unsigned int irq, struct irq_desc *desc)
}
raw_spin_unlock(&desc->lock);
handle_fasteoi_irq(irq, desc);
}
void handle_core_fault(unsigned int irq, struct irq_desc *desc)
@ -431,105 +517,18 @@ void handle_core_fault(unsigned int irq, struct irq_desc *desc)
printk(KERN_NOTICE "Kernel Stack\n");
show_stack(current, NULL);
print_modules();
panic("Kernel core hardware error");
panic("Core 0 hardware error");
break;
case IRQ_C0_NMI_L1_PARITY_ERR:
panic("NMI occurs unexpectedly");
panic("Core 0 NMI L1 parity error");
break;
default:
panic("Core 1 fault occurs unexpectedly");
panic("Core 1 fault %d occurs unexpectedly", irq);
}
raw_spin_unlock(&desc->lock);
}
#endif
#ifdef CONFIG_SMP
static void bfin_internal_unmask_irq_chip(struct irq_data *d)
{
bfin_internal_unmask_irq_affinity(d->irq, d->affinity);
}
static int bfin_internal_set_affinity(struct irq_data *d,
const struct cpumask *mask, bool force)
{
bfin_internal_mask_irq(d->irq);
bfin_internal_unmask_irq_affinity(d->irq, mask);
return 0;
}
#else
static void bfin_internal_unmask_irq_chip(struct irq_data *d)
{
bfin_internal_unmask_irq(d->irq);
}
#endif
#if defined(CONFIG_PM) && !defined(SEC_GCTL)
int bfin_internal_set_wake(unsigned int irq, unsigned int state)
{
u32 bank, bit, wakeup = 0;
unsigned long flags;
bank = SIC_SYSIRQ(irq) / 32;
bit = SIC_SYSIRQ(irq) % 32;
switch (irq) {
#ifdef IRQ_RTC
case IRQ_RTC:
wakeup |= WAKE;
break;
#endif
#ifdef IRQ_CAN0_RX
case IRQ_CAN0_RX:
wakeup |= CANWE;
break;
#endif
#ifdef IRQ_CAN1_RX
case IRQ_CAN1_RX:
wakeup |= CANWE;
break;
#endif
#ifdef IRQ_USB_INT0
case IRQ_USB_INT0:
wakeup |= USBWE;
break;
#endif
#ifdef CONFIG_BF54x
case IRQ_CNT:
wakeup |= ROTWE;
break;
#endif
default:
break;
}
flags = hard_local_irq_save();
if (state) {
bfin_sic_iwr[bank] |= (1 << bit);
vr_wakeup |= wakeup;
} else {
bfin_sic_iwr[bank] &= ~(1 << bit);
vr_wakeup &= ~wakeup;
}
hard_local_irq_restore(flags);
return 0;
}
static int bfin_internal_set_wake_chip(struct irq_data *d, unsigned int state)
{
return bfin_internal_set_wake(d->irq, state);
}
#else
inline int bfin_internal_set_wake(unsigned int irq, unsigned int state)
{
return 0;
}
# define bfin_internal_set_wake_chip NULL
#endif
#endif /* SEC_GCTL */
static struct irq_chip bfin_core_irqchip = {
.name = "CORE",
@ -537,6 +536,7 @@ static struct irq_chip bfin_core_irqchip = {
.irq_unmask = bfin_core_unmask_irq,
};
#ifndef SEC_GCTL
static struct irq_chip bfin_internal_irqchip = {
.name = "INTN",
.irq_mask = bfin_internal_mask_irq_chip,
@ -548,8 +548,7 @@ static struct irq_chip bfin_internal_irqchip = {
#endif
.irq_set_wake = bfin_internal_set_wake_chip,
};
#ifdef SEC_GCTL
#else
static struct irq_chip bfin_sec_irqchip = {
.name = "SEC",
.irq_mask_ack = bfin_sec_mask_ack_irq,
@ -1138,7 +1137,9 @@ static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)
return -EINVAL;
}
#ifndef SEC_GCTL
bfin_internal_set_wake(pint_irq, state);
#endif
return 0;
}
@ -1173,7 +1174,7 @@ static int sec_suspend(void)
u32 bank;
for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++)
save_pint_sec_ctl[bank] = bfin_read_SEC_SCTL(bank + SIC_SYSIRQ(IRQ_PINT0));
save_pint_sec_ctl[bank] = bfin_read_SEC_SCTL(bank + BFIN_SYSIRQ(IRQ_PINT0));
return 0;
}
@ -1187,7 +1188,7 @@ static void sec_resume(void)
bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_EN | SEC_CCTL_NMI_EN);
for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++)
bfin_write_SEC_SCTL(bank + SIC_SYSIRQ(IRQ_PINT0), save_pint_sec_ctl[bank]);
bfin_write_SEC_SCTL(bank + BFIN_SYSIRQ(IRQ_PINT0), save_pint_sec_ctl[bank]);
}
static struct syscore_ops sec_pm_syscore_ops = {
@ -1538,33 +1539,26 @@ int __init init_arch_irq(void)
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR) {
irq_set_chip(irq, &bfin_core_irqchip);
#ifdef CONFIG_TICKSOURCE_CORETMR
irq_set_chip_and_handler(irq, &bfin_core_irqchip,
handle_simple_irq);
#if defined(CONFIG_TICKSOURCE_CORETMR) && defined(CONFIG_SMP)
if (irq == IRQ_CORETMR)
# ifdef CONFIG_SMP
irq_set_handler(irq, handle_percpu_irq);
# else
irq_set_handler(irq, handle_simple_irq);
# endif
#endif
} else if (irq < BFIN_IRQ(0)) {
irq_set_chip_and_handler(irq, &bfin_internal_irqchip,
handle_simple_irq);
} else if (irq == IRQ_SEC_ERR) {
irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
handle_sec_fault);
} else if (irq < CORE_IRQS && irq >= IRQ_C0_DBL_FAULT) {
irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
handle_core_fault);
} else if (irq >= BFIN_IRQ(21) && irq <= BFIN_IRQ(26)) {
irq_set_chip(irq, &bfin_sec_irqchip);
irq_set_chained_handler(irq, bfin_demux_gpio_irq);
} else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) {
irq_set_chip(irq, &bfin_sec_irqchip);
irq_set_handler(irq, handle_percpu_irq);
} else {
irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
handle_fasteoi_irq);
handle_percpu_irq);
} else {
irq_set_chip(irq, &bfin_sec_irqchip);
if (irq == IRQ_SEC_ERR)
irq_set_handler(irq, handle_sec_fault);
else if (irq >= IRQ_C0_DBL_FAULT && irq < CORE_IRQS)
irq_set_handler(irq, handle_core_fault);
else
irq_set_handler(irq, handle_fasteoi_irq);
__irq_set_preflow_handler(irq, bfin_sec_preflow_handler);
}
}
@ -1593,8 +1587,8 @@ int __init init_arch_irq(void)
bfin_write_SEC_FCTL(SEC_FCTL_EN | SEC_FCTL_SYSRST_EN | SEC_FCTL_FLTIN_EN);
bfin_sec_enable_sci(SIC_SYSIRQ(IRQ_WATCH0));
bfin_sec_enable_ssi(SIC_SYSIRQ(IRQ_WATCH0));
bfin_sec_enable_sci(BFIN_SYSIRQ(IRQ_WATCH0));
bfin_sec_enable_ssi(BFIN_SYSIRQ(IRQ_WATCH0));
bfin_write_SEC_SCI(0, SEC_CCTL, SEC_CCTL_RESET);
udelay(100);
bfin_write_SEC_GCTL(SEC_GCTL_EN);