arm: mvebu: Add SMP support for Armada XP
This enables SMP support on the Armada XP processor. It adds the mandatory functions to support SMP such as: the SMP initialization functions in platsmp.c, the secondary CPU entry point in headsmp.S and the CPU hotplug initial support in hotplug.c. Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
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@ -12,6 +12,9 @@ CONFIG_ARCH_MVEBU=y
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CONFIG_MACH_ARMADA_370=y
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CONFIG_MACH_ARMADA_370=y
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CONFIG_MACH_ARMADA_XP=y
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CONFIG_MACH_ARMADA_XP=y
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# CONFIG_CACHE_L2X0 is not set
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# CONFIG_CACHE_L2X0 is not set
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# CONFIG_SWP_EMULATE is not set
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CONFIG_SMP=y
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# CONFIG_LOCAL_TIMERS is not set
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CONFIG_AEABI=y
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CONFIG_AEABI=y
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CONFIG_HIGHMEM=y
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CONFIG_HIGHMEM=y
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# CONFIG_COMPACTION is not set
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# CONFIG_COMPACTION is not set
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@ -21,6 +21,7 @@ menu "Marvell SOC with device tree"
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config MACH_ARMADA_370_XP
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config MACH_ARMADA_370_XP
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bool
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bool
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select ARMADA_370_XP_TIMER
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select ARMADA_370_XP_TIMER
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select HAVE_SMP
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select CPU_PJ4B
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select CPU_PJ4B
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config MACH_ARMADA_370
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config MACH_ARMADA_370
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@ -3,3 +3,5 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
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obj-y += system-controller.o
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obj-y += system-controller.o
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obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o
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obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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@ -23,6 +23,7 @@
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#include <asm/mach/time.h>
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#include <asm/mach/time.h>
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#include "armada-370-xp.h"
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#include "armada-370-xp.h"
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#include "common.h"
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#include "common.h"
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#include "coherency.h"
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static struct map_desc armada_370_xp_io_desc[] __initdata = {
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static struct map_desc armada_370_xp_io_desc[] __initdata = {
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{
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{
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@ -51,6 +52,7 @@ struct sys_timer armada_370_xp_timer = {
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static void __init armada_370_xp_dt_init(void)
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static void __init armada_370_xp_dt_init(void)
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{
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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coherency_init();
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}
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}
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static const char * const armada_370_xp_dt_board_dt_compat[] = {
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static const char * const armada_370_xp_dt_board_dt_compat[] = {
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@ -60,6 +62,7 @@ static const char * const armada_370_xp_dt_board_dt_compat[] = {
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};
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};
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DT_MACHINE_START(ARMADA_XP_DT, "Marvell Aramada 370/XP (Device Tree)")
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DT_MACHINE_START(ARMADA_XP_DT, "Marvell Aramada 370/XP (Device Tree)")
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.smp = smp_ops(armada_xp_smp_ops),
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.init_machine = armada_370_xp_dt_init,
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.init_machine = armada_370_xp_dt_init,
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.map_io = armada_370_xp_map_io,
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.map_io = armada_370_xp_map_io,
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.init_irq = armada_370_xp_init_irq,
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.init_irq = armada_370_xp_init_irq,
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@ -20,6 +20,9 @@ void mvebu_restart(char mode, const char *cmd);
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void armada_370_xp_init_irq(void);
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void armada_370_xp_init_irq(void);
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void armada_370_xp_handle_irq(struct pt_regs *regs);
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void armada_370_xp_handle_irq(struct pt_regs *regs);
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void armada_xp_cpu_die(unsigned int cpu);
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int armada_370_xp_coherency_init(void);
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int armada_370_xp_coherency_init(void);
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int armada_370_xp_pmsu_init(void);
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int armada_370_xp_pmsu_init(void);
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void armada_xp_secondary_startup(void);
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extern struct smp_operations armada_xp_smp_ops;
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#endif
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#endif
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@ -0,0 +1,49 @@
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/*
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* SMP support: Entry point for secondary CPUs
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*
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* Copyright (C) 2012 Marvell
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*
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* Yehuda Yitschak <yehuday@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* This file implements the assembly entry point for secondary CPUs in
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* an SMP kernel. The only thing we need to do is to add the CPU to
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* the coherency fabric by writing to 2 registers. Currently the base
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* register addresses are hard coded due to the early initialisation
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* problems.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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/*
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* At this stage the secondary CPUs don't have acces yet to the MMU, so
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* we have to provide physical addresses
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*/
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#define ARMADA_XP_CFB_BASE 0xD0020200
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__CPUINIT
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/*
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* Armada XP specific entry point for secondary CPUs.
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* We add the CPU to the coherency fabric and then jump to secondary
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* startup
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*/
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ENTRY(armada_xp_secondary_startup)
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/* Read CPU id */
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mrc p15, 0, r1, c0, c0, 5
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and r1, r1, #0xF
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/* Add CPU to coherency fabric */
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ldr r0, =ARMADA_XP_CFB_BASE
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bl ll_set_cpu_coherent
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b secondary_startup
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ENDPROC(armada_xp_secondary_startup)
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@ -0,0 +1,30 @@
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/*
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* Symmetric Multi Processing (SMP) support for Armada XP
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <asm/proc-fns.h>
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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void __ref armada_xp_cpu_die(unsigned int cpu)
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{
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cpu_do_idle();
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/* We should never return from idle */
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panic("mvebu: cpu %d unexpectedly exit from shutdown\n", cpu);
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}
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@ -0,0 +1,122 @@
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/*
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* Symmetric Multi Processing (SMP) support for Armada XP
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*
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* Copyright (C) 2012 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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* Yehuda Yitschak <yehuday@marvell.com>
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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* The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
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* This file implements the routines for preparing the SMP infrastructure
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* and waking up the secondary CPUs
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*/
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "armada-370-xp.h"
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#include "pmsu.h"
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#include "coherency.h"
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void __init set_secondary_cpus_clock(void)
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{
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int thiscpu;
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unsigned long rate;
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struct clk *cpu_clk = NULL;
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struct device_node *np = NULL;
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thiscpu = smp_processor_id();
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for_each_node_by_type(np, "cpu") {
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int err;
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int cpu;
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err = of_property_read_u32(np, "reg", &cpu);
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if (WARN_ON(err))
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return;
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if (cpu == thiscpu) {
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cpu_clk = of_clk_get(np, 0);
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break;
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}
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}
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if (WARN_ON(IS_ERR(cpu_clk)))
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return;
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clk_prepare_enable(cpu_clk);
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rate = clk_get_rate(cpu_clk);
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/* set all the other CPU clk to the same rate than the boot CPU */
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for_each_node_by_type(np, "cpu") {
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int err;
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int cpu;
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err = of_property_read_u32(np, "reg", &cpu);
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if (WARN_ON(err))
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return;
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if (cpu != thiscpu) {
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cpu_clk = of_clk_get(np, 0);
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clk_set_rate(cpu_clk, rate);
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}
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}
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}
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static void __cpuinit armada_xp_secondary_init(unsigned int cpu)
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{
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armada_xp_mpic_smp_cpu_init();
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}
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static int __cpuinit armada_xp_boot_secondary(unsigned int cpu,
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struct task_struct *idle)
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{
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pr_info("Booting CPU %d\n", cpu);
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armada_xp_boot_cpu(cpu, armada_xp_secondary_startup);
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return 0;
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}
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static void __init armada_xp_smp_init_cpus(void)
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{
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unsigned int i, ncores;
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ncores = coherency_get_cpu_count();
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/* Limit possible CPUs to defconfig */
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if (ncores > nr_cpu_ids) {
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pr_warn("SMP: %d CPUs physically present. Only %d configured.",
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ncores, nr_cpu_ids);
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pr_warn("Clipping CPU count to %d\n", nr_cpu_ids);
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ncores = nr_cpu_ids;
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}
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for (i = 0; i < ncores; i++)
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set_cpu_possible(i, true);
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set_smp_cross_call(armada_mpic_send_doorbell);
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}
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void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
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{
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set_secondary_cpus_clock();
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flush_cache_all();
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set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
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}
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struct smp_operations armada_xp_smp_ops __initdata = {
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.smp_init_cpus = armada_xp_smp_init_cpus,
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.smp_prepare_cpus = armada_xp_smp_prepare_cpus,
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.smp_secondary_init = armada_xp_secondary_init,
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.smp_boot_secondary = armada_xp_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = armada_xp_cpu_die,
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#endif
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};
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