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drm/i915/icl: Fix port disable sequence for mipi-dsi

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Re-enable clock gating of DDI clocks.

v2: Fix the default ddi clk state for mipi-dsi (Imre)

Fixes: 1026bea003 ("drm/i915/icl: Ungate DSI clocks")
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1553513202-13863-2-git-send-email-vandita.kulkarni@intel.com
(cherry picked from commit 942d1cf48e)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Vandita Kulkarni 2019-03-25 16:56:42 +05:30 committed by Rodrigo Vivi
parent 20eea462bf
commit 4690985e00
2 changed files with 4 additions and 4 deletions
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2
drivers/gpu/drm/i915/icl_dsi.c
View File

@ -1132,7 +1132,7 @@ static void gen11_dsi_disable_port(struct intel_encoder *encoder)
DRM_ERROR("DDI port:%c buffer not idle\n",
port_name(port));
}
gen11_dsi_ungate_clocks(encoder);
gen11_dsi_gate_clocks(encoder);
}
static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)

6
drivers/gpu/drm/i915/intel_ddi.c
View File

@ -2824,10 +2824,10 @@ void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
return;
}
/*
* DSI ports should have their DDI clock ungated when disabled
* and gated when enabled.
* For DSI we keep the ddi clocks gated
* except during enable/disable sequence.
*/
ddi_clk_needed = !encoder->base.crtc;
ddi_clk_needed = false;
}
val = I915_READ(DPCLKA_CFGCR0_ICL);