rtc: isl12026: new driver.
The ISL12026 is a combination RTC and EEPROM device with I2C interface. The standard RTC driver interface is provided. The EEPROM is accessed via the NVMEM interface. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
David Daney
Alexandre Belloni
parent
58d3d5e79e
commit
4731a43169
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@ -0,0 +1,28 @@
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ISL12026 I2C RTC/EEPROM
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ISL12026 is an I2C RTC/EEPROM combination device. The RTC and control
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registers respond at bus address 0x6f, and the EEPROM array responds
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at bus address 0x57. The canonical "reg" value will be for the RTC portion.
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Required properties supported by the device:
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- "compatible": must be "isil,isl12026"
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- "reg": I2C bus address of the device (always 0x6f)
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Optional properties:
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- "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
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value for proper operation.
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- "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
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value for proper operation.
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Example:
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rtc@6f {
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compatible = "isil,isl12026";
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reg = <0x6f>;
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isil,pwr-bsw = <0>;
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isil,pwr-sbib = <1>;
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}
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@ -407,6 +407,16 @@ config RTC_DRV_ISL12022
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This driver can also be built as a module. If so, the module
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will be called rtc-isl12022.
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config RTC_DRV_ISL12026
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tristate "Intersil ISL12026"
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depends on OF || COMPILE_TEST
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help
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If you say yes here you get support for the
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Intersil ISL12026 RTC chip.
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This driver can also be built as a module. If so, the module
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will be called rtc-isl12026.
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config RTC_DRV_X1205
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tristate "Xicor/Intersil X1205"
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help
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@ -76,6 +76,7 @@ obj-$(CONFIG_RTC_DRV_HID_SENSOR_TIME) += rtc-hid-sensor-time.o
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obj-$(CONFIG_RTC_DRV_HYM8563) += rtc-hym8563.o
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obj-$(CONFIG_RTC_DRV_IMXDI) += rtc-imxdi.o
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obj-$(CONFIG_RTC_DRV_ISL12022) += rtc-isl12022.o
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obj-$(CONFIG_RTC_DRV_ISL12026) += rtc-isl12026.o
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obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o
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obj-$(CONFIG_RTC_DRV_JZ4740) += rtc-jz4740.o
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obj-$(CONFIG_RTC_DRV_LP8788) += rtc-lp8788.o
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@ -0,0 +1,505 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* An I2C driver for the Intersil ISL 12026
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*
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* Copyright (c) 2018 Cavium, Inc.
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*/
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#include <linux/bcd.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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/* register offsets */
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#define ISL12026_REG_PWR 0x14
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# define ISL12026_REG_PWR_BSW BIT(6)
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# define ISL12026_REG_PWR_SBIB BIT(7)
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#define ISL12026_REG_SC 0x30
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#define ISL12026_REG_HR 0x32
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# define ISL12026_REG_HR_MIL BIT(7) /* military or 24 hour time */
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#define ISL12026_REG_SR 0x3f
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# define ISL12026_REG_SR_RTCF BIT(0)
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# define ISL12026_REG_SR_WEL BIT(1)
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# define ISL12026_REG_SR_RWEL BIT(2)
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# define ISL12026_REG_SR_MBZ BIT(3)
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# define ISL12026_REG_SR_OSCF BIT(4)
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/* The EEPROM array responds at i2c address 0x57 */
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#define ISL12026_EEPROM_ADDR 0x57
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#define ISL12026_PAGESIZE 16
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#define ISL12026_NVMEM_WRITE_TIME 20
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struct isl12026 {
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struct rtc_device *rtc;
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struct i2c_client *nvm_client;
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};
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static int isl12026_read_reg(struct i2c_client *client, int reg)
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{
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u8 addr[] = {0, reg};
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u8 val;
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int ret;
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struct i2c_msg msgs[] = {
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{
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.addr = client->addr,
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.flags = 0,
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.len = sizeof(addr),
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.buf = addr
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}, {
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.addr = client->addr,
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.flags = I2C_M_RD,
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.len = 1,
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.buf = &val
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}
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};
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs)) {
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dev_err(&client->dev, "read reg error, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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} else {
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ret = val;
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}
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return ret;
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}
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static int isl12026_arm_write(struct i2c_client *client)
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{
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int ret;
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u8 op[3];
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struct i2c_msg msg = {
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.addr = client->addr,
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.flags = 0,
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.len = 1,
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.buf = op
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};
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/* Set SR.WEL */
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op[0] = 0;
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op[1] = ISL12026_REG_SR;
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op[2] = ISL12026_REG_SR_WEL;
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msg.len = 3;
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret != 1) {
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dev_err(&client->dev, "write error SR.WEL, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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goto out;
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}
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/* Set SR.WEL and SR.RWEL */
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op[2] = ISL12026_REG_SR_WEL | ISL12026_REG_SR_RWEL;
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msg.len = 3;
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret != 1) {
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dev_err(&client->dev,
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"write error SR.WEL|SR.RWEL, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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goto out;
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} else {
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ret = 0;
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}
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out:
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return ret;
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}
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static int isl12026_disarm_write(struct i2c_client *client)
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{
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int ret;
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u8 op[3] = {0, ISL12026_REG_SR, 0};
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struct i2c_msg msg = {
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.addr = client->addr,
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.flags = 0,
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.len = sizeof(op),
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.buf = op
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};
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret != 1) {
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dev_err(&client->dev,
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"write error SR, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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} else {
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ret = 0;
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}
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return ret;
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}
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static int isl12026_write_reg(struct i2c_client *client, int reg, u8 val)
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{
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int ret;
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u8 op[3] = {0, reg, val};
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struct i2c_msg msg = {
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.addr = client->addr,
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.flags = 0,
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.len = sizeof(op),
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.buf = op
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};
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ret = isl12026_arm_write(client);
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if (ret)
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return ret;
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret != 1) {
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dev_err(&client->dev, "write error CCR, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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goto out;
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}
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msleep(ISL12026_NVMEM_WRITE_TIME);
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ret = isl12026_disarm_write(client);
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out:
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return ret;
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}
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static int isl12026_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct i2c_client *client = to_i2c_client(dev);
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int ret;
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u8 op[10];
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struct i2c_msg msg = {
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.addr = client->addr,
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.flags = 0,
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.len = sizeof(op),
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.buf = op
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};
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ret = isl12026_arm_write(client);
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if (ret)
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return ret;
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/* Set the CCR registers */
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op[0] = 0;
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op[1] = ISL12026_REG_SC;
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op[2] = bin2bcd(tm->tm_sec); /* SC */
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op[3] = bin2bcd(tm->tm_min); /* MN */
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op[4] = bin2bcd(tm->tm_hour) | ISL12026_REG_HR_MIL; /* HR */
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op[5] = bin2bcd(tm->tm_mday); /* DT */
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op[6] = bin2bcd(tm->tm_mon + 1); /* MO */
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op[7] = bin2bcd(tm->tm_year % 100); /* YR */
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op[8] = bin2bcd(tm->tm_wday & 7); /* DW */
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op[9] = bin2bcd(tm->tm_year >= 100 ? 20 : 19); /* Y2K */
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ret = i2c_transfer(client->adapter, &msg, 1);
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if (ret != 1) {
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dev_err(&client->dev, "write error CCR, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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goto out;
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}
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ret = isl12026_disarm_write(client);
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out:
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return ret;
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}
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static int isl12026_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct i2c_client *client = to_i2c_client(dev);
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u8 ccr[8];
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u8 addr[2];
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u8 sr;
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int ret;
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struct i2c_msg msgs[] = {
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{
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.addr = client->addr,
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.flags = 0,
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.len = sizeof(addr),
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.buf = addr
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}, {
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.addr = client->addr,
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.flags = I2C_M_RD,
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}
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};
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/* First, read SR */
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addr[0] = 0;
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addr[1] = ISL12026_REG_SR;
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msgs[1].len = 1;
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msgs[1].buf = &sr;
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs)) {
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dev_err(&client->dev, "read error, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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goto out;
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}
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if (sr & ISL12026_REG_SR_RTCF)
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dev_warn(&client->dev, "Real-Time Clock Failure on read\n");
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if (sr & ISL12026_REG_SR_OSCF)
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dev_warn(&client->dev, "Oscillator Failure on read\n");
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/* Second, CCR regs */
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addr[0] = 0;
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addr[1] = ISL12026_REG_SC;
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msgs[1].len = sizeof(ccr);
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msgs[1].buf = ccr;
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ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs)) {
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dev_err(&client->dev, "read error, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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goto out;
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}
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tm->tm_sec = bcd2bin(ccr[0] & 0x7F);
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tm->tm_min = bcd2bin(ccr[1] & 0x7F);
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if (ccr[2] & ISL12026_REG_HR_MIL)
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tm->tm_hour = bcd2bin(ccr[2] & 0x3F);
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else
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tm->tm_hour = bcd2bin(ccr[2] & 0x1F) +
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((ccr[2] & 0x20) ? 12 : 0);
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tm->tm_mday = bcd2bin(ccr[3] & 0x3F);
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tm->tm_mon = bcd2bin(ccr[4] & 0x1F) - 1;
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tm->tm_year = bcd2bin(ccr[5]);
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if (bcd2bin(ccr[7]) == 20)
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tm->tm_year += 100;
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tm->tm_wday = ccr[6] & 0x07;
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ret = 0;
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out:
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return ret;
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}
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static const struct rtc_class_ops isl12026_rtc_ops = {
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.read_time = isl12026_rtc_read_time,
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.set_time = isl12026_rtc_set_time,
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};
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static int isl12026_nvm_read(void *p, unsigned int offset,
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void *val, size_t bytes)
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{
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struct isl12026 *priv = p;
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int ret;
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u8 addr[2];
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struct i2c_msg msgs[] = {
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{
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.addr = priv->nvm_client->addr,
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.flags = 0,
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.len = sizeof(addr),
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.buf = addr
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}, {
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.addr = priv->nvm_client->addr,
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.flags = I2C_M_RD,
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.buf = val
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}
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};
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/*
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* offset and bytes checked and limited by nvmem core, so
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* proceed without further checks.
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*/
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ret = mutex_lock_interruptible(&priv->rtc->ops_lock);
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if (ret)
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return ret;
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/* 2 bytes of address, most significant first */
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addr[0] = offset >> 8;
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addr[1] = offset;
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msgs[1].len = bytes;
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ret = i2c_transfer(priv->nvm_client->adapter, msgs, ARRAY_SIZE(msgs));
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mutex_unlock(&priv->rtc->ops_lock);
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if (ret != ARRAY_SIZE(msgs)) {
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dev_err(&priv->nvm_client->dev,
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"nvmem read error, ret=%d\n", ret);
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return ret < 0 ? ret : -EIO;
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}
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return 0;
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}
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static int isl12026_nvm_write(void *p, unsigned int offset,
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void *val, size_t bytes)
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{
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struct isl12026 *priv = p;
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int ret;
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u8 *v = val;
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size_t chunk_size, num_written;
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u8 payload[ISL12026_PAGESIZE + 2]; /* page + 2 address bytes */
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struct i2c_msg msgs[] = {
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{
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.addr = priv->nvm_client->addr,
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.flags = 0,
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.buf = payload
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}
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};
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/*
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* offset and bytes checked and limited by nvmem core, so
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* proceed without further checks.
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*/
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ret = mutex_lock_interruptible(&priv->rtc->ops_lock);
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if (ret)
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return ret;
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num_written = 0;
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while (bytes) {
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chunk_size = round_down(offset, ISL12026_PAGESIZE) +
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ISL12026_PAGESIZE - offset;
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chunk_size = min(bytes, chunk_size);
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/*
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* 2 bytes of address, most significant first, followed
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* by page data bytes
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*/
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memcpy(payload + 2, v + num_written, chunk_size);
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payload[0] = offset >> 8;
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payload[1] = offset;
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msgs[0].len = chunk_size + 2;
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ret = i2c_transfer(priv->nvm_client->adapter,
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msgs, ARRAY_SIZE(msgs));
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if (ret != ARRAY_SIZE(msgs)) {
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dev_err(&priv->nvm_client->dev,
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"nvmem write error, ret=%d\n", ret);
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ret = ret < 0 ? ret : -EIO;
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break;
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}
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ret = 0;
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bytes -= chunk_size;
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offset += chunk_size;
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num_written += chunk_size;
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msleep(ISL12026_NVMEM_WRITE_TIME);
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}
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mutex_unlock(&priv->rtc->ops_lock);
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return ret;
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}
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static void isl12026_force_power_modes(struct i2c_client *client)
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{
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int ret;
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int pwr, requested_pwr;
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u32 bsw_val, sbib_val;
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bool set_bsw, set_sbib;
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/*
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* If we can read the of_property, set the specified value.
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* If there is an error reading the of_property (likely
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* because it does not exist), keep the current value.
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*/
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ret = of_property_read_u32(client->dev.of_node,
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"isil,pwr-bsw", &bsw_val);
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set_bsw = (ret == 0);
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ret = of_property_read_u32(client->dev.of_node,
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"isil,pwr-sbib", &sbib_val);
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set_sbib = (ret == 0);
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/* Check if PWR.BSW and/or PWR.SBIB need specified values */
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if (!set_bsw && !set_sbib)
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return;
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pwr = isl12026_read_reg(client, ISL12026_REG_PWR);
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if (pwr < 0) {
|
||||
dev_warn(&client->dev, "Error: Failed to read PWR %d\n", pwr);
|
||||
return;
|
||||
}
|
||||
|
||||
requested_pwr = pwr;
|
||||
|
||||
if (set_bsw) {
|
||||
if (bsw_val)
|
||||
requested_pwr |= ISL12026_REG_PWR_BSW;
|
||||
else
|
||||
requested_pwr &= ~ISL12026_REG_PWR_BSW;
|
||||
} /* else keep current BSW */
|
||||
|
||||
if (set_sbib) {
|
||||
if (sbib_val)
|
||||
requested_pwr |= ISL12026_REG_PWR_SBIB;
|
||||
else
|
||||
requested_pwr &= ~ISL12026_REG_PWR_SBIB;
|
||||
} /* else keep current SBIB */
|
||||
|
||||
if (pwr >= 0 && pwr != requested_pwr) {
|
||||
dev_dbg(&client->dev, "PWR: %02x\n", pwr);
|
||||
dev_dbg(&client->dev, "Updating PWR to: %02x\n", requested_pwr);
|
||||
isl12026_write_reg(client, ISL12026_REG_PWR, requested_pwr);
|
||||
}
|
||||
}
|
||||
|
||||
static int isl12026_probe_new(struct i2c_client *client)
|
||||
{
|
||||
struct isl12026 *priv;
|
||||
int ret;
|
||||
struct nvmem_config nvm_cfg;
|
||||
|
||||
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
|
||||
return -ENODEV;
|
||||
|
||||
priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
i2c_set_clientdata(client, priv);
|
||||
|
||||
isl12026_force_power_modes(client);
|
||||
|
||||
priv->nvm_client = i2c_new_dummy(client->adapter, ISL12026_EEPROM_ADDR);
|
||||
if (!priv->nvm_client)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->rtc = devm_rtc_allocate_device(&client->dev);
|
||||
ret = PTR_ERR_OR_ZERO(priv->rtc);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
priv->rtc->ops = &isl12026_rtc_ops;
|
||||
priv->rtc->nvram_old_abi = false;
|
||||
ret = rtc_register_device(priv->rtc);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
memset(&nvm_cfg, 0, sizeof(nvm_cfg));
|
||||
nvm_cfg.name = "eeprom";
|
||||
nvm_cfg.read_only = false;
|
||||
nvm_cfg.root_only = true;
|
||||
nvm_cfg.base_dev = &client->dev;
|
||||
nvm_cfg.priv = priv;
|
||||
nvm_cfg.stride = 1;
|
||||
nvm_cfg.word_size = 1;
|
||||
nvm_cfg.size = 512;
|
||||
nvm_cfg.reg_read = isl12026_nvm_read;
|
||||
nvm_cfg.reg_write = isl12026_nvm_write;
|
||||
|
||||
return rtc_nvmem_register(priv->rtc, &nvm_cfg);
|
||||
}
|
||||
|
||||
static int isl12026_remove(struct i2c_client *client)
|
||||
{
|
||||
struct isl12026 *priv = i2c_get_clientdata(client);
|
||||
|
||||
i2c_unregister_device(priv->nvm_client);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id isl12026_dt_match[] = {
|
||||
{ .compatible = "isil,isl12026" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, isl12026_dt_match);
|
||||
|
||||
static struct i2c_driver isl12026_driver = {
|
||||
.driver = {
|
||||
.name = "rtc-isl12026",
|
||||
.of_match_table = isl12026_dt_match,
|
||||
},
|
||||
.probe_new = isl12026_probe_new,
|
||||
.remove = isl12026_remove,
|
||||
};
|
||||
|
||||
module_i2c_driver(isl12026_driver);
|
||||
|
||||
MODULE_DESCRIPTION("ISL 12026 RTC driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue