Merge branch 'linus' into perf/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
commit
47cd95a632
4
.mailmap
4
.mailmap
|
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@ -137,6 +137,7 @@ Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
|
|||
Rudolf Marek <R.Marek@sh.cvut.cz>
|
||||
Rui Saraiva <rmps@joel.ist.utl.pt>
|
||||
Sachin P Sant <ssant@in.ibm.com>
|
||||
Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sam Ravnborg <sam@mars.ravnborg.org>
|
||||
Santosh Shilimkar <ssantosh@kernel.org>
|
||||
Santosh Shilimkar <santosh.shilimkar@oracle.org>
|
||||
|
|
@ -150,10 +151,13 @@ Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
|
|||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <shemminger@osdl.org>
|
||||
Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
|
||||
Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
|
||||
Sumit Semwal <sumit.semwal@ti.com>
|
||||
Tejun Heo <htejun@gmail.com>
|
||||
Thomas Graf <tgraf@suug.ch>
|
||||
Thomas Pedersen <twp@codeaurora.org>
|
||||
Tony Luck <tony.luck@intel.com>
|
||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
|
||||
|
|
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|
|
@ -1,12 +0,0 @@
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What: /sys/devices/.../deferred_probe
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Date: August 2016
|
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Contact: Ben Hutchings <ben.hutchings@codethink.co.uk>
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||||
Description:
|
||||
The /sys/devices/.../deferred_probe attribute is
|
||||
present for all devices. If a driver detects during
|
||||
probing a device that a related device is not yet
|
||||
ready, it may defer probing of the first device. The
|
||||
kernel will retry probing the first device after any
|
||||
other device is successfully probed. This attribute
|
||||
reads as 1 if probing of this device is currently
|
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deferred, or 0 otherwise.
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||||
|
|
@ -106,6 +106,16 @@
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use by PCI
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Format: <irq>,<irq>...
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acpi_mask_gpe= [HW,ACPI]
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||||
Due to the existence of _Lxx/_Exx, some GPEs triggered
|
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by unsupported hardware/firmware features can result in
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GPE floodings that cannot be automatically disabled by
|
||||
the GPE dispatcher.
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||||
This facility can be used to prevent such uncontrolled
|
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GPE floodings.
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Format: <int>
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Support masking of GPEs numbered from 0x00 to 0x7f.
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|
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acpi_no_auto_serialize [HW,ACPI]
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Disable auto-serialization of AML methods
|
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AML control methods that contain the opcodes to create
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|
|
@ -3811,10 +3821,11 @@
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|||
it if 0 is given (See Documentation/cgroup-v1/memory.txt)
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|
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swiotlb= [ARM,IA-64,PPC,MIPS,X86]
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Format: { <int> | force }
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Format: { <int> | force | noforce }
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<int> -- Number of I/O TLB slabs
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force -- force using of bounce buffers even if they
|
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wouldn't be automatically used by the kernel
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noforce -- Never use bounce buffers (for debugging)
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switches= [HW,M68k]
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|
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|
|
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|
|
@ -54,9 +54,9 @@ This is the hardware sector size of the device, in bytes.
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|||
|
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io_poll (RW)
|
||||
------------
|
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When read, this file shows the total number of block IO polls and how
|
||||
many returned success. Writing '0' to this file will disable polling
|
||||
for this device. Writing any non-zero value will enable this feature.
|
||||
When read, this file shows whether polling is enabled (1) or disabled
|
||||
(0). Writing '0' to this file will disable polling for this device.
|
||||
Writing any non-zero value will enable this feature.
|
||||
|
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io_poll_delay (RW)
|
||||
------------------
|
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|
|
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|
|
@ -62,6 +62,9 @@ wants to support one of the below features, it should adapt the bindings below.
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"irq" and "wakeup" names are recognized by I2C core, other names are
|
||||
left to individual drivers.
|
||||
|
||||
- host-notify
|
||||
device uses SMBus host notify protocol instead of interrupt line.
|
||||
|
||||
- multi-master
|
||||
states that there is another master active on this bus. The OS can use
|
||||
this information to adapt power management to keep the arbitration awake
|
||||
|
|
@ -81,6 +84,11 @@ Binding may contain optional "interrupts" property, describing interrupts
|
|||
used by the device. I2C core will assign "irq" interrupt (or the very first
|
||||
interrupt if not using interrupt names) as primary interrupt for the slave.
|
||||
|
||||
Alternatively, devices supporting SMbus Host Notify, and connected to
|
||||
adapters that support this feature, may use "host-notify" property. I2C
|
||||
core will create a virtual interrupt for Host Notify and assign it as
|
||||
primary interrupt for the slave.
|
||||
|
||||
Also, if device is marked as a wakeup source, I2C core will set up "wakeup"
|
||||
interrupt for the device. If "wakeup" interrupt name is not present in the
|
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binding, then primary interrupt will be used as wakeup interrupt.
|
||||
|
|
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|||
|
|
@ -8,8 +8,9 @@ This driver provides a simple power button event via an Interrupt.
|
|||
Required properties:
|
||||
- compatible: should be "ti,tps65217-pwrbutton" or "ti,tps65218-pwrbutton"
|
||||
|
||||
Required properties for TPS65218:
|
||||
Required properties:
|
||||
- interrupts: should be one of the following
|
||||
- <2>: For controllers compatible with tps65217
|
||||
- <3 IRQ_TYPE_EDGE_BOTH>: For controllers compatible with tps65218
|
||||
|
||||
Examples:
|
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|
|
@ -17,6 +18,7 @@ Examples:
|
|||
&tps {
|
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tps65217-pwrbutton {
|
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compatible = "ti,tps65217-pwrbutton";
|
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interrupts = <2>;
|
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};
|
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};
|
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|
||||
|
|
|
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|
|
@ -5,7 +5,7 @@ Required properties:
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|||
- compatible: "sigma,smp8758-nand"
|
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- reg: address/size of nfc_reg, nfc_mem, and pbus_reg
|
||||
- dmas: reference to the DMA channel used by the controller
|
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- dma-names: "nfc_sbox"
|
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- dma-names: "rxtx"
|
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- clocks: reference to the system clock
|
||||
- #address-cells: <1>
|
||||
- #size-cells: <0>
|
||||
|
|
@ -17,9 +17,9 @@ Example:
|
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|
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nandc: nand-controller@2c000 {
|
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compatible = "sigma,smp8758-nand";
|
||||
reg = <0x2c000 0x30 0x2d000 0x800 0x20000 0x1000>;
|
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reg = <0x2c000 0x30>, <0x2d000 0x800>, <0x20000 0x1000>;
|
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dmas = <&dma0 3>;
|
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dma-names = "nfc_sbox";
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dma-names = "rxtx";
|
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clocks = <&clkgen SYS_CLK>;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
|
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|
|
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|
|
@ -3,9 +3,11 @@
|
|||
Required properties:
|
||||
- reg - The ID number for the phy, usually a small integer
|
||||
- ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
|
||||
for applicable values
|
||||
for applicable values. Required only if interface type is
|
||||
PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_RXID
|
||||
- ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
|
||||
for applicable values
|
||||
for applicable values. Required only if interface type is
|
||||
PHY_INTERFACE_MODE_RGMII_ID or PHY_INTERFACE_MODE_RGMII_TXID
|
||||
- ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
|
||||
for applicable values
|
||||
|
||||
|
|
|
|||
|
|
@ -2,11 +2,16 @@ TPS65217 Charger
|
|||
|
||||
Required Properties:
|
||||
-compatible: "ti,tps65217-charger"
|
||||
-interrupts: TPS65217 interrupt numbers for the AC and USB charger input change.
|
||||
Should be <0> for the USB charger and <1> for the AC adapter.
|
||||
-interrupt-names: Should be "USB" and "AC"
|
||||
|
||||
This node is a subnode of the tps65217 PMIC.
|
||||
|
||||
Example:
|
||||
|
||||
tps65217-charger {
|
||||
compatible = "ti,tps65090-charger";
|
||||
compatible = "ti,tps65217-charger";
|
||||
interrupts = <0>, <1>;
|
||||
interrupt-names = "USB", "AC";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,17 +1,23 @@
|
|||
Renesas MSIOF spi controller
|
||||
|
||||
Required properties:
|
||||
- compatible : "renesas,msiof-<soctype>" for SoCs,
|
||||
"renesas,sh-msiof" for SuperH, or
|
||||
"renesas,sh-mobile-msiof" for SH Mobile series.
|
||||
Examples with soctypes are:
|
||||
"renesas,msiof-r8a7790" (R-Car H2)
|
||||
- compatible : "renesas,msiof-r8a7790" (R-Car H2)
|
||||
"renesas,msiof-r8a7791" (R-Car M2-W)
|
||||
"renesas,msiof-r8a7792" (R-Car V2H)
|
||||
"renesas,msiof-r8a7793" (R-Car M2-N)
|
||||
"renesas,msiof-r8a7794" (R-Car E2)
|
||||
"renesas,msiof-r8a7796" (R-Car M3-W)
|
||||
"renesas,msiof-sh73a0" (SH-Mobile AG5)
|
||||
"renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
|
||||
"renesas,rcar-gen2-msiof" (generic R-Car Gen2 compatible device)
|
||||
"renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)
|
||||
"renesas,sh-msiof" (deprecated)
|
||||
|
||||
When compatible with the generic version, nodes
|
||||
must list the SoC-specific version corresponding
|
||||
to the platform first followed by the generic
|
||||
version.
|
||||
|
||||
- reg : A list of offsets and lengths of the register sets for
|
||||
the device.
|
||||
If only one register set is present, it is to be used
|
||||
|
|
@ -61,7 +67,8 @@ Documentation/devicetree/bindings/pinctrl/renesas,*.
|
|||
Example:
|
||||
|
||||
msiof0: spi@e6e20000 {
|
||||
compatible = "renesas,msiof-r8a7791";
|
||||
compatible = "renesas,msiof-r8a7791",
|
||||
"renesas,rcar-gen2-msiof";
|
||||
reg = <0 0xe6e20000 0 0x0064>;
|
||||
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
|
||||
|
|
|
|||
|
|
@ -55,21 +55,6 @@ Device Drivers DMA Management
|
|||
.. kernel-doc:: drivers/base/dma-mapping.c
|
||||
:export:
|
||||
|
||||
Device Drivers Power Management
|
||||
-------------------------------
|
||||
|
||||
.. kernel-doc:: drivers/base/power/main.c
|
||||
:export:
|
||||
|
||||
Device Drivers ACPI Support
|
||||
---------------------------
|
||||
|
||||
.. kernel-doc:: drivers/acpi/scan.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/acpi/scan.c
|
||||
:internal:
|
||||
|
||||
Device drivers PnP support
|
||||
--------------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -212,10 +212,11 @@ asynchronous manner and the value may not be very precise. To see a precise
|
|||
snapshot of a moment, you can see /proc/<pid>/smaps file and scan page table.
|
||||
It's slow but very precise.
|
||||
|
||||
Table 1-2: Contents of the status files (as of 4.1)
|
||||
Table 1-2: Contents of the status files (as of 4.8)
|
||||
..............................................................................
|
||||
Field Content
|
||||
Name filename of the executable
|
||||
Umask file mode creation mask
|
||||
State state (R is running, S is sleeping, D is sleeping
|
||||
in an uninterruptible wait, Z is zombie,
|
||||
T is traced or stopped)
|
||||
|
|
@ -226,7 +227,6 @@ Table 1-2: Contents of the status files (as of 4.1)
|
|||
TracerPid PID of process tracing this process (0 if not)
|
||||
Uid Real, effective, saved set, and file system UIDs
|
||||
Gid Real, effective, saved set, and file system GIDs
|
||||
Umask file mode creation mask
|
||||
FDSize number of file descriptor slots currently allocated
|
||||
Groups supplementary group list
|
||||
NStgid descendant namespace thread group ID hierarchy
|
||||
|
|
@ -236,6 +236,7 @@ Table 1-2: Contents of the status files (as of 4.1)
|
|||
VmPeak peak virtual memory size
|
||||
VmSize total program size
|
||||
VmLck locked memory size
|
||||
VmPin pinned memory size
|
||||
VmHWM peak resident set size ("high water mark")
|
||||
VmRSS size of memory portions. It contains the three
|
||||
following parts (VmRSS = RssAnon + RssFile + RssShmem)
|
||||
|
|
|
|||
|
|
@ -5,8 +5,8 @@ platform_labels - INTEGER
|
|||
possible to configure forwarding for label values equal to or
|
||||
greater than the number of platform labels.
|
||||
|
||||
A dense utliziation of the entries in the platform label table
|
||||
is possible and expected aas the platform labels are locally
|
||||
A dense utilization of the entries in the platform label table
|
||||
is possible and expected as the platform labels are locally
|
||||
allocated.
|
||||
|
||||
If the number of platform label table entries is set to 0 no
|
||||
|
|
|
|||
|
|
@ -127,22 +127,22 @@ the VFIO when devices are unbound from the driver.
|
|||
Physical Device Driver Interface
|
||||
--------------------------------
|
||||
|
||||
The physical device driver interface provides the parent_ops[3] structure to
|
||||
define the APIs to manage work in the mediated core driver that is related to
|
||||
the physical device.
|
||||
The physical device driver interface provides the mdev_parent_ops[3] structure
|
||||
to define the APIs to manage work in the mediated core driver that is related
|
||||
to the physical device.
|
||||
|
||||
The structures in the parent_ops structure are as follows:
|
||||
The structures in the mdev_parent_ops structure are as follows:
|
||||
|
||||
* dev_attr_groups: attributes of the parent device
|
||||
* mdev_attr_groups: attributes of the mediated device
|
||||
* supported_config: attributes to define supported configurations
|
||||
|
||||
The functions in the parent_ops structure are as follows:
|
||||
The functions in the mdev_parent_ops structure are as follows:
|
||||
|
||||
* create: allocate basic resources in a driver for a mediated device
|
||||
* remove: free resources in a driver when a mediated device is destroyed
|
||||
|
||||
The callbacks in the parent_ops structure are as follows:
|
||||
The callbacks in the mdev_parent_ops structure are as follows:
|
||||
|
||||
* open: open callback of mediated device
|
||||
* close: close callback of mediated device
|
||||
|
|
@ -151,14 +151,14 @@ The callbacks in the parent_ops structure are as follows:
|
|||
* write: write emulation callback
|
||||
* mmap: mmap emulation callback
|
||||
|
||||
A driver should use the parent_ops structure in the function call to register
|
||||
itself with the mdev core driver:
|
||||
A driver should use the mdev_parent_ops structure in the function call to
|
||||
register itself with the mdev core driver:
|
||||
|
||||
extern int mdev_register_device(struct device *dev,
|
||||
const struct parent_ops *ops);
|
||||
const struct mdev_parent_ops *ops);
|
||||
|
||||
However, the parent_ops structure is not required in the function call that a
|
||||
driver should use to unregister itself with the mdev core driver:
|
||||
However, the mdev_parent_ops structure is not required in the function call
|
||||
that a driver should use to unregister itself with the mdev core driver:
|
||||
|
||||
extern void mdev_unregister_device(struct device *dev);
|
||||
|
||||
|
|
@ -223,6 +223,9 @@ Directories and files under the sysfs for Each Physical Device
|
|||
|
||||
sprintf(buf, "%s-%s", dev_driver_string(parent->dev), group->name);
|
||||
|
||||
(or using mdev_parent_dev(mdev) to arrive at the parent device outside
|
||||
of the core mdev code)
|
||||
|
||||
* device_api
|
||||
|
||||
This attribute should show which device API is being created, for example,
|
||||
|
|
@ -394,5 +397,5 @@ References
|
|||
|
||||
[1] See Documentation/vfio.txt for more information on VFIO.
|
||||
[2] struct mdev_driver in include/linux/mdev.h
|
||||
[3] struct parent_ops in include/linux/mdev.h
|
||||
[3] struct mdev_parent_ops in include/linux/mdev.h
|
||||
[4] struct vfio_iommu_driver_ops in include/linux/vfio.h
|
||||
|
|
|
|||
|
|
@ -0,0 +1,42 @@
|
|||
Page fragments
|
||||
--------------
|
||||
|
||||
A page fragment is an arbitrary-length arbitrary-offset area of memory
|
||||
which resides within a 0 or higher order compound page. Multiple
|
||||
fragments within that page are individually refcounted, in the page's
|
||||
reference counter.
|
||||
|
||||
The page_frag functions, page_frag_alloc and page_frag_free, provide a
|
||||
simple allocation framework for page fragments. This is used by the
|
||||
network stack and network device drivers to provide a backing region of
|
||||
memory for use as either an sk_buff->head, or to be used in the "frags"
|
||||
portion of skb_shared_info.
|
||||
|
||||
In order to make use of the page fragment APIs a backing page fragment
|
||||
cache is needed. This provides a central point for the fragment allocation
|
||||
and tracks allows multiple calls to make use of a cached page. The
|
||||
advantage to doing this is that multiple calls to get_page can be avoided
|
||||
which can be expensive at allocation time. However due to the nature of
|
||||
this caching it is required that any calls to the cache be protected by
|
||||
either a per-cpu limitation, or a per-cpu limitation and forcing interrupts
|
||||
to be disabled when executing the fragment allocation.
|
||||
|
||||
The network stack uses two separate caches per CPU to handle fragment
|
||||
allocation. The netdev_alloc_cache is used by callers making use of the
|
||||
__netdev_alloc_frag and __netdev_alloc_skb calls. The napi_alloc_cache is
|
||||
used by callers of the __napi_alloc_frag and __napi_alloc_skb calls. The
|
||||
main difference between these two calls is the context in which they may be
|
||||
called. The "netdev" prefixed functions are usable in any context as these
|
||||
functions will disable interrupts, while the "napi" prefixed functions are
|
||||
only usable within the softirq context.
|
||||
|
||||
Many network device drivers use a similar methodology for allocating page
|
||||
fragments, but the page fragments are cached at the ring or descriptor
|
||||
level. In order to enable these cases it is necessary to provide a generic
|
||||
way of tearing down a page cache. For this reason __page_frag_cache_drain
|
||||
was implemented. It allows for freeing multiple references from a single
|
||||
page via a single call. The advantage to doing this is that it allows for
|
||||
cleaning up the multiple references that were added to a page in order to
|
||||
avoid calling get_page per allocation.
|
||||
|
||||
Alexander Duyck, Nov 29, 2016.
|
||||
72
MAINTAINERS
72
MAINTAINERS
|
|
@ -81,7 +81,6 @@ Descriptions of section entries:
|
|||
Q: Patchwork web based patch tracking system site
|
||||
T: SCM tree type and location.
|
||||
Type is one of: git, hg, quilt, stgit, topgit
|
||||
B: Bug tracking system location.
|
||||
S: Status, one of the following:
|
||||
Supported: Someone is actually paid to look after this.
|
||||
Maintained: Someone actually looks after it.
|
||||
|
|
@ -977,6 +976,7 @@ M: Russell King <linux@armlinux.org.uk>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.armlinux.org.uk/
|
||||
S: Maintained
|
||||
T: git git://git.armlinux.org.uk/~rmk/linux-arm.git
|
||||
F: arch/arm/
|
||||
|
||||
ARM SUB-ARCHITECTURES
|
||||
|
|
@ -1154,6 +1154,7 @@ ARM/CLKDEV SUPPORT
|
|||
M: Russell King <linux@armlinux.org.uk>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.armlinux.org.uk/~rmk/linux-arm.git clkdev
|
||||
F: arch/arm/include/asm/clkdev.h
|
||||
F: drivers/clk/clkdev.c
|
||||
|
||||
|
|
@ -1689,6 +1690,7 @@ M: Krzysztof Kozlowski <krzk@kernel.org>
|
|||
R: Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/s3c*
|
||||
F: arch/arm/boot/dts/s5p*
|
||||
|
|
@ -2194,14 +2196,6 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
|||
S: Supported
|
||||
F: sound/soc/atmel
|
||||
|
||||
ATMEL DMA DRIVER
|
||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: drivers/dma/at_hdmac.c
|
||||
F: drivers/dma/at_hdmac_regs.h
|
||||
F: include/linux/platform_data/dma-atmel.h
|
||||
|
||||
ATMEL XDMA DRIVER
|
||||
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
|
|
@ -3800,6 +3794,7 @@ F: include/linux/devcoredump.h
|
|||
DEVICE FREQUENCY (DEVFREQ)
|
||||
M: MyungJoo Ham <myungjoo.ham@samsung.com>
|
||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||
R: Chanwoo Choi <cw00.choi@samsung.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mzx/devfreq.git
|
||||
S: Maintained
|
||||
|
|
@ -4105,18 +4100,24 @@ F: drivers/gpu/drm/bridge/
|
|||
|
||||
DRM DRIVER FOR BOCHS VIRTUAL GPU
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
S: Odd Fixes
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
T: git git://git.kraxel.org/linux drm-qemu
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/bochs/
|
||||
|
||||
DRM DRIVER FOR QEMU'S CIRRUS DEVICE
|
||||
M: Dave Airlie <airlied@redhat.com>
|
||||
S: Odd Fixes
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
T: git git://git.kraxel.org/linux drm-qemu
|
||||
S: Obsolete
|
||||
W: https://www.kraxel.org/blog/2014/10/qemu-using-cirrus-considered-harmful/
|
||||
F: drivers/gpu/drm/cirrus/
|
||||
|
||||
RADEON and AMDGPU DRM DRIVERS
|
||||
M: Alex Deucher <alexander.deucher@amd.com>
|
||||
M: Christian König <christian.koenig@amd.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: amd-gfx@lists.freedesktop.org
|
||||
T: git git://people.freedesktop.org/~agd5f/linux
|
||||
S: Supported
|
||||
F: drivers/gpu/drm/radeon/
|
||||
|
|
@ -4303,7 +4304,10 @@ F: Documentation/devicetree/bindings/display/renesas,du.txt
|
|||
|
||||
DRM DRIVER FOR QXL VIRTUAL GPU
|
||||
M: Dave Airlie <airlied@redhat.com>
|
||||
S: Odd Fixes
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
T: git git://git.kraxel.org/linux drm-qemu
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/qxl/
|
||||
F: include/uapi/drm/qxl_drm.h
|
||||
|
||||
|
|
@ -5080,9 +5084,11 @@ F: drivers/net/wan/dlci.c
|
|||
F: drivers/net/wan/sdla.c
|
||||
|
||||
FRAMEBUFFER LAYER
|
||||
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
T: git git://github.com/bzolnier/linux.git
|
||||
Q: http://patchwork.kernel.org/project/linux-fbdev/list/
|
||||
S: Orphan
|
||||
S: Maintained
|
||||
F: Documentation/fb/
|
||||
F: drivers/video/
|
||||
F: include/video/
|
||||
|
|
@ -5504,6 +5510,7 @@ M: Alex Elder <elder@kernel.org>
|
|||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
S: Maintained
|
||||
F: drivers/staging/greybus/
|
||||
L: greybus-dev@lists.linaro.org
|
||||
|
||||
GREYBUS AUDIO PROTOCOLS DRIVERS
|
||||
M: Vaibhav Agarwal <vaibhav.sr@gmail.com>
|
||||
|
|
@ -5961,6 +5968,7 @@ F: drivers/media/platform/sti/hva
|
|||
Hyper-V CORE AND DRIVERS
|
||||
M: "K. Y. Srinivasan" <kys@microsoft.com>
|
||||
M: Haiyang Zhang <haiyangz@microsoft.com>
|
||||
M: Stephen Hemminger <sthemmin@microsoft.com>
|
||||
L: devel@linuxdriverproject.org
|
||||
S: Maintained
|
||||
F: arch/x86/include/asm/mshyperv.h
|
||||
|
|
@ -7701,8 +7709,10 @@ F: drivers/net/dsa/mv88e6xxx/
|
|||
F: Documentation/devicetree/bindings/net/dsa/marvell.txt
|
||||
|
||||
MARVELL ARMADA DRM SUPPORT
|
||||
M: Russell King <rmk+kernel@armlinux.org.uk>
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
S: Maintained
|
||||
T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-armada-devel
|
||||
T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-armada-fixes
|
||||
F: drivers/gpu/drm/armada/
|
||||
F: include/uapi/drm/armada_drm.h
|
||||
F: Documentation/devicetree/bindings/display/armada/
|
||||
|
|
@ -8174,6 +8184,15 @@ S: Maintained
|
|||
F: drivers/tty/serial/atmel_serial.c
|
||||
F: include/linux/atmel_serial.h
|
||||
|
||||
MICROCHIP / ATMEL DMA DRIVER
|
||||
M: Ludovic Desroches <ludovic.desroches@microchip.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: dmaengine@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/dma/at_hdmac.c
|
||||
F: drivers/dma/at_hdmac_regs.h
|
||||
F: include/linux/platform_data/dma-atmel.h
|
||||
|
||||
MICROCHIP / ATMEL ISC DRIVER
|
||||
M: Songjun Wu <songjun.wu@microchip.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -8852,17 +8871,22 @@ F: drivers/video/fbdev/nvidia/
|
|||
NVM EXPRESS DRIVER
|
||||
M: Keith Busch <keith.busch@intel.com>
|
||||
M: Jens Axboe <axboe@fb.com>
|
||||
M: Christoph Hellwig <hch@lst.de>
|
||||
M: Sagi Grimberg <sagi@grimberg.me>
|
||||
L: linux-nvme@lists.infradead.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
|
||||
W: https://kernel.googlesource.com/pub/scm/linux/kernel/git/axboe/linux-block/
|
||||
T: git://git.infradead.org/nvme.git
|
||||
W: http://git.infradead.org/nvme.git
|
||||
S: Supported
|
||||
F: drivers/nvme/host/
|
||||
F: include/linux/nvme.h
|
||||
F: include/uapi/linux/nvme_ioctl.h
|
||||
|
||||
NVM EXPRESS TARGET DRIVER
|
||||
M: Christoph Hellwig <hch@lst.de>
|
||||
M: Sagi Grimberg <sagi@grimberg.me>
|
||||
L: linux-nvme@lists.infradead.org
|
||||
T: git://git.infradead.org/nvme.git
|
||||
W: http://git.infradead.org/nvme.git
|
||||
S: Supported
|
||||
F: drivers/nvme/target/
|
||||
|
||||
|
|
@ -8893,8 +8917,10 @@ S: Supported
|
|||
F: drivers/nfc/nxp-nci
|
||||
|
||||
NXP TDA998X DRM DRIVER
|
||||
M: Russell King <rmk+kernel@armlinux.org.uk>
|
||||
M: Russell King <linux@armlinux.org.uk>
|
||||
S: Supported
|
||||
T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-devel
|
||||
T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-fixes
|
||||
F: drivers/gpu/drm/i2c/tda998x_drv.c
|
||||
F: include/drm/i2c/tda998x.h
|
||||
|
||||
|
|
@ -9842,7 +9868,7 @@ M: Mark Rutland <mark.rutland@arm.com>
|
|||
M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
L: linux-arm-kernel@lists.infradead.org
|
||||
S: Maintained
|
||||
F: drivers/firmware/psci.c
|
||||
F: drivers/firmware/psci*.c
|
||||
F: include/linux/psci.h
|
||||
F: include/uapi/linux/psci.h
|
||||
|
||||
|
|
@ -13075,6 +13101,7 @@ M: David Airlie <airlied@linux.ie>
|
|||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
T: git git://git.kraxel.org/linux drm-qemu
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/virtio/
|
||||
F: include/uapi/linux/virtio_gpu.h
|
||||
|
|
@ -13426,6 +13453,7 @@ F: arch/x86/
|
|||
|
||||
X86 PLATFORM DRIVERS
|
||||
M: Darren Hart <dvhart@infradead.org>
|
||||
M: Andy Shevchenko <andy@infradead.org>
|
||||
L: platform-driver-x86@vger.kernel.org
|
||||
T: git git://git.infradead.org/users/dvhart/linux-platform-drivers-x86.git
|
||||
S: Maintained
|
||||
|
|
@ -13527,11 +13555,11 @@ F: arch/x86/xen/*swiotlb*
|
|||
F: drivers/xen/*swiotlb*
|
||||
|
||||
XFS FILESYSTEM
|
||||
M: Dave Chinner <david@fromorbit.com>
|
||||
M: Darrick J. Wong <darrick.wong@oracle.com>
|
||||
M: linux-xfs@vger.kernel.org
|
||||
L: linux-xfs@vger.kernel.org
|
||||
W: http://xfs.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/dgc/linux-xfs.git
|
||||
T: git git://git.kernel.org/pub/scm/fs/xfs/xfs-linux.git
|
||||
S: Supported
|
||||
F: Documentation/filesystems/xfs.txt
|
||||
F: fs/xfs/
|
||||
|
|
@ -13597,6 +13625,7 @@ F: drivers/net/hamradio/z8530.h
|
|||
|
||||
ZBUD COMPRESSED PAGE ALLOCATOR
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
M: Dan Streetman <ddstreet@ieee.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zbud.c
|
||||
|
|
@ -13652,6 +13681,7 @@ F: Documentation/vm/zsmalloc.txt
|
|||
|
||||
ZSWAP COMPRESSED SWAP CACHING
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
M: Dan Streetman <ddstreet@ieee.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zswap.c
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,8 +1,8 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 10
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
NAME = Roaring Lionus
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Anniversary Edition
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ config ARC
|
|||
select HAVE_KPROBES
|
||||
select HAVE_KRETPROBES
|
||||
select HAVE_MEMBLOCK
|
||||
select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
|
||||
select HAVE_MOD_ARCH_SPECIFIC
|
||||
select HAVE_OPROFILE
|
||||
select HAVE_PERF_EVENTS
|
||||
select HANDLE_DOMAIN_IRQ
|
||||
|
|
|
|||
|
|
@ -67,7 +67,7 @@ extern unsigned long perip_base, perip_end;
|
|||
#define ARC_REG_IC_PTAG_HI 0x1F
|
||||
|
||||
/* Bit val in IC_CTRL */
|
||||
#define IC_CTRL_CACHE_DISABLE 0x1
|
||||
#define IC_CTRL_DIS 0x1
|
||||
|
||||
/* Data cache related Auxiliary registers */
|
||||
#define ARC_REG_DC_BCR 0x72 /* Build Config reg */
|
||||
|
|
@ -80,8 +80,9 @@ extern unsigned long perip_base, perip_end;
|
|||
#define ARC_REG_DC_PTAG_HI 0x5F
|
||||
|
||||
/* Bit val in DC_CTRL */
|
||||
#define DC_CTRL_INV_MODE_FLUSH 0x40
|
||||
#define DC_CTRL_FLUSH_STATUS 0x100
|
||||
#define DC_CTRL_DIS 0x001
|
||||
#define DC_CTRL_INV_MODE_FLUSH 0x040
|
||||
#define DC_CTRL_FLUSH_STATUS 0x100
|
||||
|
||||
/*System-level cache (L2 cache) related Auxiliary registers */
|
||||
#define ARC_REG_SLC_CFG 0x901
|
||||
|
|
@ -92,8 +93,8 @@ extern unsigned long perip_base, perip_end;
|
|||
#define ARC_REG_SLC_RGN_END 0x916
|
||||
|
||||
/* Bit val in SLC_CONTROL */
|
||||
#define SLC_CTRL_DIS 0x001
|
||||
#define SLC_CTRL_IM 0x040
|
||||
#define SLC_CTRL_DISABLE 0x001
|
||||
#define SLC_CTRL_BUSY 0x100
|
||||
#define SLC_CTRL_RGN_OP_INV 0x200
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
;
|
||||
; Now manually save: r12, sp, fp, gp, r25
|
||||
|
||||
PUSH r30
|
||||
PUSH r12
|
||||
|
||||
; Saving pt_regs->sp correctly requires some extra work due to the way
|
||||
|
|
@ -72,6 +73,7 @@
|
|||
POPAX AUX_USER_SP
|
||||
1:
|
||||
POP r12
|
||||
POP r30
|
||||
|
||||
.endm
|
||||
|
||||
|
|
|
|||
|
|
@ -14,13 +14,13 @@
|
|||
|
||||
#include <asm-generic/module.h>
|
||||
|
||||
#ifdef CONFIG_ARC_DW2_UNWIND
|
||||
struct mod_arch_specific {
|
||||
#ifdef CONFIG_ARC_DW2_UNWIND
|
||||
void *unw_info;
|
||||
int unw_sec_idx;
|
||||
#endif
|
||||
const char *secstr;
|
||||
};
|
||||
#endif
|
||||
|
||||
#define MODULE_PROC_FAMILY "ARC700"
|
||||
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@ struct pt_regs {
|
|||
unsigned long fp;
|
||||
unsigned long sp; /* user/kernel sp depending on where we came from */
|
||||
|
||||
unsigned long r12;
|
||||
unsigned long r12, r30;
|
||||
|
||||
/*------- Below list auto saved by h/w -----------*/
|
||||
unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@ extern int root_mountflags, end_mem;
|
|||
|
||||
void setup_processor(void);
|
||||
void __init setup_arch_memory(void);
|
||||
long __init arc_get_mem_sz(void);
|
||||
|
||||
/* Helpers used in arc_*_mumbojumbo routines */
|
||||
#define IS_AVAIL1(v, s) ((v) ? s : "")
|
||||
|
|
|
|||
|
|
@ -77,20 +77,20 @@ void arc_init_IRQ(void)
|
|||
|
||||
static void arcv2_irq_mask(struct irq_data *data)
|
||||
{
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->irq);
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
|
||||
write_aux_reg(AUX_IRQ_ENABLE, 0);
|
||||
}
|
||||
|
||||
static void arcv2_irq_unmask(struct irq_data *data)
|
||||
{
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->irq);
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
|
||||
write_aux_reg(AUX_IRQ_ENABLE, 1);
|
||||
}
|
||||
|
||||
void arcv2_irq_enable(struct irq_data *data)
|
||||
{
|
||||
/* set default priority */
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->irq);
|
||||
write_aux_reg(AUX_IRQ_SELECT, data->hwirq);
|
||||
write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO);
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ static void arc_irq_mask(struct irq_data *data)
|
|||
unsigned int ienb;
|
||||
|
||||
ienb = read_aux_reg(AUX_IENABLE);
|
||||
ienb &= ~(1 << data->irq);
|
||||
ienb &= ~(1 << data->hwirq);
|
||||
write_aux_reg(AUX_IENABLE, ienb);
|
||||
}
|
||||
|
||||
|
|
@ -66,7 +66,7 @@ static void arc_irq_unmask(struct irq_data *data)
|
|||
unsigned int ienb;
|
||||
|
||||
ienb = read_aux_reg(AUX_IENABLE);
|
||||
ienb |= (1 << data->irq);
|
||||
ienb |= (1 << data->hwirq);
|
||||
write_aux_reg(AUX_IENABLE, ienb);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
|
||||
#include <linux/smp.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/irqchip/chained_irq.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <soc/arc/mcip.h>
|
||||
#include <asm/irqflags-arcv2.h>
|
||||
|
|
@ -221,10 +222,13 @@ static irq_hw_number_t idu_first_hwirq;
|
|||
static void idu_cascade_isr(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_domain *idu_domain = irq_desc_get_handler_data(desc);
|
||||
struct irq_chip *core_chip = irq_desc_get_chip(desc);
|
||||
irq_hw_number_t core_hwirq = irqd_to_hwirq(irq_desc_get_irq_data(desc));
|
||||
irq_hw_number_t idu_hwirq = core_hwirq - idu_first_hwirq;
|
||||
|
||||
chained_irq_enter(core_chip, desc);
|
||||
generic_handle_irq(irq_find_mapping(idu_domain, idu_hwirq));
|
||||
chained_irq_exit(core_chip, desc);
|
||||
}
|
||||
|
||||
static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq)
|
||||
|
|
|
|||
|
|
@ -32,8 +32,8 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
|
|||
#ifdef CONFIG_ARC_DW2_UNWIND
|
||||
mod->arch.unw_sec_idx = 0;
|
||||
mod->arch.unw_info = NULL;
|
||||
mod->arch.secstr = secstr;
|
||||
#endif
|
||||
mod->arch.secstr = secstr;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -113,8 +113,10 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
|
|||
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARC_DW2_UNWIND
|
||||
if (strcmp(module->arch.secstr+sechdrs[tgtsec].sh_name, ".eh_frame") == 0)
|
||||
module->arch.unw_sec_idx = tgtsec;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
|
||||
static int l2_line_sz;
|
||||
static int ioc_exists;
|
||||
int slc_enable = 1, ioc_enable = 0;
|
||||
int slc_enable = 1, ioc_enable = 1;
|
||||
unsigned long perip_base = ARC_UNCACHED_ADDR_SPACE; /* legacy value for boot */
|
||||
unsigned long perip_end = 0xFFFFFFFF; /* legacy value */
|
||||
|
||||
|
|
@ -271,7 +271,11 @@ void __cache_line_loop_v2(phys_addr_t paddr, unsigned long vaddr,
|
|||
|
||||
/*
|
||||
* For ARC700 MMUv3 I-cache and D-cache flushes
|
||||
* Also reused for HS38 aliasing I-cache configuration
|
||||
* - ARC700 programming model requires paddr and vaddr be passed in seperate
|
||||
* AUX registers (*_IV*L and *_PTAG respectively) irrespective of whether the
|
||||
* caches actually alias or not.
|
||||
* - For HS38, only the aliasing I-cache configuration uses the PTAG reg
|
||||
* (non aliasing I-cache version doesn't; while D-cache can't possibly alias)
|
||||
*/
|
||||
static inline
|
||||
void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr,
|
||||
|
|
@ -458,6 +462,21 @@ static inline void __dc_entire_op(const int op)
|
|||
__after_dc_op(op);
|
||||
}
|
||||
|
||||
static inline void __dc_disable(void)
|
||||
{
|
||||
const int r = ARC_REG_DC_CTRL;
|
||||
|
||||
__dc_entire_op(OP_FLUSH_N_INV);
|
||||
write_aux_reg(r, read_aux_reg(r) | DC_CTRL_DIS);
|
||||
}
|
||||
|
||||
static void __dc_enable(void)
|
||||
{
|
||||
const int r = ARC_REG_DC_CTRL;
|
||||
|
||||
write_aux_reg(r, read_aux_reg(r) & ~DC_CTRL_DIS);
|
||||
}
|
||||
|
||||
/* For kernel mappings cache operation: index is same as paddr */
|
||||
#define __dc_line_op_k(p, sz, op) __dc_line_op(p, p, sz, op)
|
||||
|
||||
|
|
@ -483,6 +502,8 @@ static inline void __dc_line_op(phys_addr_t paddr, unsigned long vaddr,
|
|||
#else
|
||||
|
||||
#define __dc_entire_op(op)
|
||||
#define __dc_disable()
|
||||
#define __dc_enable()
|
||||
#define __dc_line_op(paddr, vaddr, sz, op)
|
||||
#define __dc_line_op_k(paddr, sz, op)
|
||||
|
||||
|
|
@ -597,6 +618,40 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op)
|
|||
#endif
|
||||
}
|
||||
|
||||
noinline static void slc_entire_op(const int op)
|
||||
{
|
||||
unsigned int ctrl, r = ARC_REG_SLC_CTRL;
|
||||
|
||||
ctrl = read_aux_reg(r);
|
||||
|
||||
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
|
||||
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
|
||||
else
|
||||
ctrl |= SLC_CTRL_IM;
|
||||
|
||||
write_aux_reg(r, ctrl);
|
||||
|
||||
write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
|
||||
|
||||
/* Important to wait for flush to complete */
|
||||
while (read_aux_reg(r) & SLC_CTRL_BUSY);
|
||||
}
|
||||
|
||||
static inline void arc_slc_disable(void)
|
||||
{
|
||||
const int r = ARC_REG_SLC_CTRL;
|
||||
|
||||
slc_entire_op(OP_FLUSH_N_INV);
|
||||
write_aux_reg(r, read_aux_reg(r) | SLC_CTRL_DIS);
|
||||
}
|
||||
|
||||
static inline void arc_slc_enable(void)
|
||||
{
|
||||
const int r = ARC_REG_SLC_CTRL;
|
||||
|
||||
write_aux_reg(r, read_aux_reg(r) & ~SLC_CTRL_DIS);
|
||||
}
|
||||
|
||||
/***********************************************************
|
||||
* Exported APIs
|
||||
*/
|
||||
|
|
@ -923,21 +978,54 @@ SYSCALL_DEFINE3(cacheflush, uint32_t, start, uint32_t, sz, uint32_t, flags)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void arc_cache_init(void)
|
||||
/*
|
||||
* IO-Coherency (IOC) setup rules:
|
||||
*
|
||||
* 1. Needs to be at system level, so only once by Master core
|
||||
* Non-Masters need not be accessing caches at that time
|
||||
* - They are either HALT_ON_RESET and kick started much later or
|
||||
* - if run on reset, need to ensure that arc_platform_smp_wait_to_boot()
|
||||
* doesn't perturb caches or coherency unit
|
||||
*
|
||||
* 2. caches (L1 and SLC) need to be purged (flush+inv) before setting up IOC,
|
||||
* otherwise any straggler data might behave strangely post IOC enabling
|
||||
*
|
||||
* 3. All Caches need to be disabled when setting up IOC to elide any in-flight
|
||||
* Coherency transactions
|
||||
*/
|
||||
noinline void __init arc_ioc_setup(void)
|
||||
{
|
||||
unsigned int __maybe_unused cpu = smp_processor_id();
|
||||
char str[256];
|
||||
unsigned int ap_sz;
|
||||
|
||||
printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
|
||||
/* Flush + invalidate + disable L1 dcache */
|
||||
__dc_disable();
|
||||
|
||||
/* Flush + invalidate SLC */
|
||||
if (read_aux_reg(ARC_REG_SLC_BCR))
|
||||
slc_entire_op(OP_FLUSH_N_INV);
|
||||
|
||||
/* IOC Aperture start: TDB: handle non default CONFIG_LINUX_LINK_BASE */
|
||||
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
|
||||
|
||||
/*
|
||||
* Only master CPU needs to execute rest of function:
|
||||
* - Assume SMP so all cores will have same cache config so
|
||||
* any geomtry checks will be same for all
|
||||
* - IOC setup / dma callbacks only need to be setup once
|
||||
* IOC Aperture size:
|
||||
* decoded as 2 ^ (SIZE + 2) KB: so setting 0x11 implies 512M
|
||||
* TBD: fix for PGU + 1GB of low mem
|
||||
* TBD: fix for PAE
|
||||
*/
|
||||
if (cpu)
|
||||
return;
|
||||
ap_sz = order_base_2(arc_get_mem_sz()/1024) - 2;
|
||||
write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, ap_sz);
|
||||
|
||||
write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
|
||||
write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
|
||||
|
||||
/* Re-enable L1 dcache */
|
||||
__dc_enable();
|
||||
}
|
||||
|
||||
void __init arc_cache_init_master(void)
|
||||
{
|
||||
unsigned int __maybe_unused cpu = smp_processor_id();
|
||||
|
||||
if (IS_ENABLED(CONFIG_ARC_HAS_ICACHE)) {
|
||||
struct cpuinfo_arc_cache *ic = &cpuinfo_arc700[cpu].icache;
|
||||
|
|
@ -985,30 +1073,14 @@ void arc_cache_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
if (is_isa_arcv2() && l2_line_sz && !slc_enable) {
|
||||
/* Note that SLC disable not formally supported till HS 3.0 */
|
||||
if (is_isa_arcv2() && l2_line_sz && !slc_enable)
|
||||
arc_slc_disable();
|
||||
|
||||
/* IM set : flush before invalidate */
|
||||
write_aux_reg(ARC_REG_SLC_CTRL,
|
||||
read_aux_reg(ARC_REG_SLC_CTRL) | SLC_CTRL_IM);
|
||||
|
||||
write_aux_reg(ARC_REG_SLC_INVALIDATE, 1);
|
||||
|
||||
/* Important to wait for flush to complete */
|
||||
while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
|
||||
write_aux_reg(ARC_REG_SLC_CTRL,
|
||||
read_aux_reg(ARC_REG_SLC_CTRL) | SLC_CTRL_DISABLE);
|
||||
}
|
||||
if (is_isa_arcv2() && ioc_enable)
|
||||
arc_ioc_setup();
|
||||
|
||||
if (is_isa_arcv2() && ioc_enable) {
|
||||
/* IO coherency base - 0x8z */
|
||||
write_aux_reg(ARC_REG_IO_COH_AP0_BASE, 0x80000);
|
||||
/* IO coherency aperture size - 512Mb: 0x8z-0xAz */
|
||||
write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, 0x11);
|
||||
/* Enable partial writes */
|
||||
write_aux_reg(ARC_REG_IO_COH_PARTIAL, 1);
|
||||
/* Enable IO coherency */
|
||||
write_aux_reg(ARC_REG_IO_COH_ENABLE, 1);
|
||||
|
||||
__dma_cache_wback_inv = __dma_cache_wback_inv_ioc;
|
||||
__dma_cache_inv = __dma_cache_inv_ioc;
|
||||
__dma_cache_wback = __dma_cache_wback_ioc;
|
||||
|
|
@ -1022,3 +1094,20 @@ void arc_cache_init(void)
|
|||
__dma_cache_wback = __dma_cache_wback_l1;
|
||||
}
|
||||
}
|
||||
|
||||
void __ref arc_cache_init(void)
|
||||
{
|
||||
unsigned int __maybe_unused cpu = smp_processor_id();
|
||||
char str[256];
|
||||
|
||||
printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
|
||||
|
||||
/*
|
||||
* Only master CPU needs to execute rest of function:
|
||||
* - Assume SMP so all cores will have same cache config so
|
||||
* any geomtry checks will be same for all
|
||||
* - IOC setup / dma callbacks only need to be setup once
|
||||
*/
|
||||
if (!cpu)
|
||||
arc_cache_init_master();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -40,6 +40,11 @@ struct pglist_data node_data[MAX_NUMNODES] __read_mostly;
|
|||
EXPORT_SYMBOL(node_data);
|
||||
#endif
|
||||
|
||||
long __init arc_get_mem_sz(void)
|
||||
{
|
||||
return low_mem_sz;
|
||||
}
|
||||
|
||||
/* User can over-ride above with "mem=nnn[KkMm]" in cmdline */
|
||||
static int __init setup_mem_sz(char *str)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1502,8 +1502,7 @@ source kernel/Kconfig.preempt
|
|||
|
||||
config HZ_FIXED
|
||||
int
|
||||
default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
|
||||
ARCH_S5PV210 || ARCH_EXYNOS4
|
||||
default 200 if ARCH_EBSA110
|
||||
default 128 if SOC_AT91RM9200
|
||||
default 0
|
||||
|
||||
|
|
|
|||
|
|
@ -501,6 +501,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
|
|||
am3517-evm.dtb \
|
||||
am3517_mt_ventoux.dtb \
|
||||
logicpd-torpedo-37xx-devkit.dtb \
|
||||
logicpd-som-lv-37xx-devkit.dtb \
|
||||
omap3430-sdp.dtb \
|
||||
omap3-beagle.dtb \
|
||||
omap3-beagle-xm.dtb \
|
||||
|
|
@ -845,6 +846,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
|
|||
sun8i-a83t-allwinner-h8homlet-v2.dtb \
|
||||
sun8i-a83t-cubietruck-plus.dtb \
|
||||
sun8i-h3-bananapi-m2-plus.dtb \
|
||||
sun8i-h3-nanopi-m1.dtb \
|
||||
sun8i-h3-nanopi-neo.dtb \
|
||||
sun8i-h3-orangepi-2.dtb \
|
||||
sun8i-h3-orangepi-lite.dtb \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,6 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/mfd/tps65217.h>
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
|
|
@ -319,13 +317,13 @@
|
|||
ti,pmic-shutdown-controller;
|
||||
|
||||
charger {
|
||||
interrupts = <TPS65217_IRQ_AC>, <TPS65217_IRQ_USB>;
|
||||
interrupts-names = "AC", "USB";
|
||||
interrupts = <0>, <1>;
|
||||
interrupt-names = "USB", "AC";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pwrbutton {
|
||||
interrupts = <TPS65217_IRQ_PB>;
|
||||
interrupts = <2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -170,7 +170,6 @@
|
|||
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
|
||||
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
|
||||
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
|
||||
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* (C15) spi0_cs1.mmc0_sdcd */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
interrupt-parent = <&wakeupgen>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
|
|
|
|||
|
|
@ -62,11 +62,6 @@
|
|||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
|
||||
extcon_usb2: extcon_usb2 {
|
||||
compatible = "linux,extcon-usb-gpio";
|
||||
id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
|
|
@ -79,3 +74,8 @@
|
|||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&extcon_usb2 {
|
||||
id-gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
|
||||
vbus-gpio = <&gpio7 22 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -23,11 +23,6 @@
|
|||
reg = <0x0 0x80000000 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
extcon_usb2: extcon_usb2 {
|
||||
compatible = "linux,extcon-usb-gpio";
|
||||
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
status-leds {
|
||||
compatible = "gpio-leds";
|
||||
cpu0-led {
|
||||
|
|
@ -76,6 +71,11 @@
|
|||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&extcon_usb2 {
|
||||
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
|
||||
vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&v3_3d>;
|
||||
|
|
@ -87,3 +87,7 @@
|
|||
&sn65hvs882 {
|
||||
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -303,6 +303,13 @@
|
|||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
extcon_usb2: tps659038_usb {
|
||||
compatible = "ti,palmas-usb-vid";
|
||||
ti,enable-vbus-detection;
|
||||
ti,enable-id-detection;
|
||||
/* ID & VBUS GPIOs provided in board dts */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -369,7 +376,7 @@
|
|||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "otg";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
|
|
|
|||
|
|
@ -160,7 +160,7 @@
|
|||
|
||||
axi {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0x18000000 0x0011c40a>;
|
||||
ranges = <0x00000000 0x18000000 0x0011c40c>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
|
|||
|
|
@ -99,6 +99,7 @@
|
|||
#size-cells = <1>;
|
||||
compatible = "m25p64";
|
||||
spi-max-frequency = <30000000>;
|
||||
m25p,fast-read;
|
||||
reg = <0>;
|
||||
partition@0 {
|
||||
label = "U-Boot-SPL";
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
|
||||
compatible = "ti,dra7xx";
|
||||
interrupt-parent = <&crossbar_mpu>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
|
|
@ -1377,6 +1378,7 @@
|
|||
phy-names = "sata-phy";
|
||||
clocks = <&sata_ref_clk>;
|
||||
ti,hwmods = "sata";
|
||||
ports-implemented = <0x1>;
|
||||
};
|
||||
|
||||
rtc: rtc@48838000 {
|
||||
|
|
|
|||
|
|
@ -75,6 +75,6 @@
|
|||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
|
||||
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
|
||||
ti,min-output-imepdance;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -132,3 +132,19 @@
|
|||
ti,palmas-long-press-seconds = <6>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldo4_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&ldo4_reg>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
vdda_video-supply = <&ldo5_reg>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc_aux-supply = <&ldo1_reg>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -31,11 +31,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
avic: avic-interrupt-controller@60000000 {
|
||||
avic: interrupt-controller@68000000 {
|
||||
compatible = "fsl,imx31-avic", "fsl,avic";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x60000000 0x100000>;
|
||||
reg = <0x68000000 0x100000>;
|
||||
};
|
||||
|
||||
soc {
|
||||
|
|
|
|||
|
|
@ -319,8 +319,6 @@
|
|||
compatible = "fsl,imx6q-nitrogen6_max-sgtl5000",
|
||||
"fsl,imx-audio-sgtl5000";
|
||||
model = "imx6q-nitrogen6_max-sgtl5000";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sgtl5000>;
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&codec>;
|
||||
audio-routing =
|
||||
|
|
@ -402,6 +400,8 @@
|
|||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sgtl5000>;
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
VDDA-supply = <®_2p5v>;
|
||||
|
|
|
|||
|
|
@ -250,8 +250,6 @@
|
|||
compatible = "fsl,imx6q-nitrogen6_som2-sgtl5000",
|
||||
"fsl,imx-audio-sgtl5000";
|
||||
model = "imx6q-nitrogen6_som2-sgtl5000";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sgtl5000>;
|
||||
ssi-controller = <&ssi1>;
|
||||
audio-codec = <&codec>;
|
||||
audio-routing =
|
||||
|
|
@ -320,6 +318,8 @@
|
|||
|
||||
codec: sgtl5000@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sgtl5000>;
|
||||
reg = <0x0a>;
|
||||
clocks = <&clks IMX6QDL_CLK_CKO>;
|
||||
VDDA-supply = <®_2p5v>;
|
||||
|
|
|
|||
|
|
@ -533,7 +533,6 @@
|
|||
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
|
||||
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
|
||||
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
|
||||
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1100,6 +1100,7 @@
|
|||
interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6QDL_CLK_EIM_SLOW>;
|
||||
fsl,weim-cs-gpr = <&gpr>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ocotp: ocotp@021bc000 {
|
||||
|
|
|
|||
|
|
@ -900,6 +900,7 @@
|
|||
reg = <0x021b8000 0x4000>;
|
||||
interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
fsl,weim-cs-gpr = <&gpr>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ocotp: ocotp@021bc000 {
|
||||
|
|
|
|||
|
|
@ -977,6 +977,7 @@
|
|||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SX_CLK_EIM_SLOW>;
|
||||
fsl,weim-cs-gpr = <&gpr>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ocotp: ocotp@021bc000 {
|
||||
|
|
|
|||
|
|
@ -158,7 +158,7 @@
|
|||
&mmc1 {
|
||||
interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins &mmc1_cd>;
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
|
||||
cd-gpios = <&gpio4 14 IRQ_TYPE_LEVEL_LOW>; /* gpio_110 */
|
||||
vmmc-supply = <&vmmc1>;
|
||||
|
|
@ -193,7 +193,8 @@
|
|||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_strobe.gpio_126 sdmmc1_wp*/
|
||||
OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_strobe.gpio_126 */
|
||||
OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d11.gpio_110 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -242,12 +243,6 @@
|
|||
OMAP3_WKUP_IOPAD(0x2a16, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4) /* sys_boot6.gpio_8 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_cd: pinmux_mmc1_cd {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE4) /* cam_d11.gpio_110 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
|
|
|
|||
|
|
@ -734,6 +734,8 @@
|
|||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
interrupt-parent = <&intc>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
interrupt-parent = <&wakeupgen>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
|
||||
compatible = "ti,omap5";
|
||||
interrupt-parent = <&wakeupgen>;
|
||||
chosen { };
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
|
|
@ -987,6 +988,7 @@
|
|||
phy-names = "sata-phy";
|
||||
clocks = <&sata_ref_clk>;
|
||||
ti,hwmods = "sata";
|
||||
ports-implemented = <0x1>;
|
||||
};
|
||||
|
||||
dss: dss@58000000 {
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
|
||||
#include <dt-bindings/reset/qcom,gcc-msm8960.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/soc/qcom,gsbi.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
|
@ -303,6 +304,9 @@
|
|||
firmware {
|
||||
scm {
|
||||
compatible = "qcom,scm-apq8064";
|
||||
|
||||
clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>;
|
||||
clock-names = "core";
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -357,7 +357,7 @@
|
|||
};
|
||||
|
||||
amba {
|
||||
compatible = "arm,amba-bus";
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
|
|
|||
|
|
@ -140,6 +140,10 @@
|
|||
cpu-supply = <®_dcdc3>;
|
||||
};
|
||||
|
||||
&de {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -234,6 +234,7 @@
|
|||
de: display-engine {
|
||||
compatible = "allwinner,sun6i-a31-display-engine";
|
||||
allwinner,pipelines = <&fe0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
soc@01c00000 {
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@
|
|||
};
|
||||
|
||||
&pio {
|
||||
mmc2_pins_nrst: mmc2@0 {
|
||||
mmc2_pins_nrst: mmc2-rst-pin {
|
||||
allwinner,pins = "PC16";
|
||||
allwinner,function = "gpio_out";
|
||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@
|
|||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0 0x2c001000 0 0x1000>,
|
||||
<0 0x2c002000 0 0x1000>,
|
||||
<0 0x2c002000 0 0x2000>,
|
||||
<0 0x2c004000 0 0x2000>,
|
||||
<0 0x2c006000 0 0x2000>;
|
||||
interrupts = <1 9 0xf04>;
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@
|
|||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0 0x2c001000 0 0x1000>,
|
||||
<0 0x2c002000 0 0x1000>,
|
||||
<0 0x2c002000 0 0x2000>,
|
||||
<0 0x2c004000 0 0x2000>,
|
||||
<0 0x2c006000 0 0x2000>;
|
||||
interrupts = <1 9 0xf04>;
|
||||
|
|
|
|||
|
|
@ -153,7 +153,8 @@
|
|||
switch0phy1: switch1phy0@1 {
|
||||
reg = <1>;
|
||||
interrupt-parent = <&switch0>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; };
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
switch0phy2: switch1phy0@2 {
|
||||
reg = <2>;
|
||||
interrupt-parent = <&switch0>;
|
||||
|
|
|
|||
|
|
@ -471,7 +471,7 @@ CONFIG_MESON_WATCHDOG=y
|
|||
CONFIG_DW_WATCHDOG=y
|
||||
CONFIG_DIGICOLOR_WATCHDOG=y
|
||||
CONFIG_BCM2835_WDT=y
|
||||
CONFIG_BCM47XX_WATCHDOG=y
|
||||
CONFIG_BCM47XX_WDT=y
|
||||
CONFIG_BCM7038_WDT=m
|
||||
CONFIG_BCM_KONA_WDT=y
|
||||
CONFIG_MFD_ACT8945A=y
|
||||
|
|
@ -893,7 +893,7 @@ CONFIG_BCM2835_MBOX=y
|
|||
CONFIG_RASPBERRYPI_FIRMWARE=y
|
||||
CONFIG_EFI_VARS=m
|
||||
CONFIG_EFI_CAPSULE_LOADER=m
|
||||
CONFIG_CONFIG_BCM47XX_NVRAM=y
|
||||
CONFIG_BCM47XX_NVRAM=y
|
||||
CONFIG_BCM47XX_SPROM=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
|
|
|
|||
|
|
@ -86,9 +86,9 @@ CONFIG_IPV6_TUNNEL=m
|
|||
CONFIG_NETFILTER=y
|
||||
CONFIG_NF_CONNTRACK=m
|
||||
CONFIG_NF_CONNTRACK_EVENTS=y
|
||||
CONFIG_NF_CT_PROTO_DCCP=m
|
||||
CONFIG_NF_CT_PROTO_SCTP=m
|
||||
CONFIG_NF_CT_PROTO_UDPLITE=m
|
||||
CONFIG_NF_CT_PROTO_DCCP=y
|
||||
CONFIG_NF_CT_PROTO_SCTP=y
|
||||
CONFIG_NF_CT_PROTO_UDPLITE=y
|
||||
CONFIG_NF_CONNTRACK_AMANDA=m
|
||||
CONFIG_NF_CONNTRACK_FTP=m
|
||||
CONFIG_NF_CONNTRACK_H323=m
|
||||
|
|
|
|||
|
|
@ -94,6 +94,9 @@
|
|||
#define ARM_CPU_XSCALE_ARCH_V2 0x4000
|
||||
#define ARM_CPU_XSCALE_ARCH_V3 0x6000
|
||||
|
||||
/* Qualcomm implemented cores */
|
||||
#define ARM_CPU_PART_SCORPION 0x510002d0
|
||||
|
||||
extern unsigned int processor_id;
|
||||
|
||||
#ifdef CONFIG_CPU_CP15
|
||||
|
|
|
|||
|
|
@ -54,6 +54,24 @@ static inline void *return_address(unsigned int level)
|
|||
|
||||
#define ftrace_return_address(n) return_address(n)
|
||||
|
||||
#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
|
||||
|
||||
static inline bool arch_syscall_match_sym_name(const char *sym,
|
||||
const char *name)
|
||||
{
|
||||
if (!strcmp(sym, "sys_mmap2"))
|
||||
sym = "sys_mmap_pgoff";
|
||||
else if (!strcmp(sym, "sys_statfs64_wrapper"))
|
||||
sym = "sys_statfs64";
|
||||
else if (!strcmp(sym, "sys_fstatfs64_wrapper"))
|
||||
sym = "sys_fstatfs64";
|
||||
else if (!strcmp(sym, "sys_arm_fadvise64_64"))
|
||||
sym = "sys_fadvise64_64";
|
||||
|
||||
/* Ignore case since sym may start with "SyS" instead of "sys" */
|
||||
return !strcasecmp(sym, name);
|
||||
}
|
||||
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ASM_ARM_FTRACE */
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ static inline bool is_kernel_in_hyp_mode(void)
|
|||
return false;
|
||||
}
|
||||
|
||||
static inline bool has_vhe(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
/* The section containing the hypervisor idmap text */
|
||||
extern char __hyp_idmap_text_start[];
|
||||
extern char __hyp_idmap_text_end[];
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#ifndef _ASM_TYPES_H
|
||||
#define _ASM_TYPES_H
|
||||
#ifndef _UAPI_ASM_TYPES_H
|
||||
#define _UAPI_ASM_TYPES_H
|
||||
|
||||
#include <asm-generic/int-ll64.h>
|
||||
|
||||
|
|
@ -37,4 +37,4 @@
|
|||
#define __UINTPTR_TYPE__ unsigned long
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_TYPES_H */
|
||||
#endif /* _UAPI_ASM_TYPES_H */
|
||||
|
|
@ -1063,6 +1063,22 @@ static int __init arch_hw_breakpoint_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Scorpion CPUs (at least those in APQ8060) seem to set DBGPRSR.SPD
|
||||
* whenever a WFI is issued, even if the core is not powered down, in
|
||||
* violation of the architecture. When DBGPRSR.SPD is set, accesses to
|
||||
* breakpoint and watchpoint registers are treated as undefined, so
|
||||
* this results in boot time and runtime failures when these are
|
||||
* accessed and we unexpectedly take a trap.
|
||||
*
|
||||
* It's not clear if/how this can be worked around, so we blacklist
|
||||
* Scorpion CPUs to avoid these issues.
|
||||
*/
|
||||
if (read_cpuid_part() == ARM_CPU_PART_SCORPION) {
|
||||
pr_info("Scorpion CPU detected. Hardware breakpoints and watchpoints disabled\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
has_ossr = core_has_os_save_restore();
|
||||
|
||||
/* Determine how many BRPs/WRPs are available. */
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
*/
|
||||
#include <linux/preempt.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
|
@ -40,8 +41,11 @@ static inline void ipi_flush_tlb_mm(void *arg)
|
|||
static inline void ipi_flush_tlb_page(void *arg)
|
||||
{
|
||||
struct tlb_args *ta = (struct tlb_args *)arg;
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
|
||||
local_flush_tlb_page(ta->ta_vma, ta->ta_start);
|
||||
|
||||
uaccess_restore(__ua_flags);
|
||||
}
|
||||
|
||||
static inline void ipi_flush_tlb_kernel_page(void *arg)
|
||||
|
|
@ -54,8 +58,11 @@ static inline void ipi_flush_tlb_kernel_page(void *arg)
|
|||
static inline void ipi_flush_tlb_range(void *arg)
|
||||
{
|
||||
struct tlb_args *ta = (struct tlb_args *)arg;
|
||||
unsigned int __ua_flags = uaccess_save_and_enable();
|
||||
|
||||
local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
|
||||
|
||||
uaccess_restore(__ua_flags);
|
||||
}
|
||||
|
||||
static inline void ipi_flush_tlb_kernel_range(void *arg)
|
||||
|
|
|
|||
|
|
@ -1099,6 +1099,9 @@ static void cpu_init_hyp_mode(void *dummy)
|
|||
__cpu_init_hyp_mode(pgd_ptr, hyp_stack_ptr, vector_ptr);
|
||||
__cpu_init_stage2();
|
||||
|
||||
if (is_kernel_in_hyp_mode())
|
||||
kvm_timer_init_vhe();
|
||||
|
||||
kvm_arm_init_debug();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -31,10 +31,10 @@ static LIST_HEAD(clocks);
|
|||
static DEFINE_MUTEX(clocks_mutex);
|
||||
static DEFINE_SPINLOCK(clockfw_lock);
|
||||
|
||||
static void __clk_enable(struct clk *clk)
|
||||
void davinci_clk_enable(struct clk *clk)
|
||||
{
|
||||
if (clk->parent)
|
||||
__clk_enable(clk->parent);
|
||||
davinci_clk_enable(clk->parent);
|
||||
if (clk->usecount++ == 0) {
|
||||
if (clk->flags & CLK_PSC)
|
||||
davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc,
|
||||
|
|
@ -44,7 +44,7 @@ static void __clk_enable(struct clk *clk)
|
|||
}
|
||||
}
|
||||
|
||||
static void __clk_disable(struct clk *clk)
|
||||
void davinci_clk_disable(struct clk *clk)
|
||||
{
|
||||
if (WARN_ON(clk->usecount == 0))
|
||||
return;
|
||||
|
|
@ -56,7 +56,7 @@ static void __clk_disable(struct clk *clk)
|
|||
clk->clk_disable(clk);
|
||||
}
|
||||
if (clk->parent)
|
||||
__clk_disable(clk->parent);
|
||||
davinci_clk_disable(clk->parent);
|
||||
}
|
||||
|
||||
int davinci_clk_reset(struct clk *clk, bool reset)
|
||||
|
|
@ -103,7 +103,7 @@ int clk_enable(struct clk *clk)
|
|||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
__clk_enable(clk);
|
||||
davinci_clk_enable(clk);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
|
||||
return 0;
|
||||
|
|
@ -118,7 +118,7 @@ void clk_disable(struct clk *clk)
|
|||
return;
|
||||
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
__clk_disable(clk);
|
||||
davinci_clk_disable(clk);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
|
|
|||
|
|
@ -132,6 +132,8 @@ int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
|
|||
int davinci_set_refclk_rate(unsigned long rate);
|
||||
int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
|
||||
int davinci_clk_reset(struct clk *clk, bool reset);
|
||||
void davinci_clk_enable(struct clk *clk);
|
||||
void davinci_clk_disable(struct clk *clk);
|
||||
|
||||
extern struct platform_device davinci_wdt_device;
|
||||
extern void davinci_watchdog_reset(struct platform_device *);
|
||||
|
|
|
|||
|
|
@ -319,6 +319,16 @@ static struct clk emac_clk = {
|
|||
.gpsc = 1,
|
||||
};
|
||||
|
||||
/*
|
||||
* In order to avoid adding the emac_clk to the clock lookup table twice (and
|
||||
* screwing up the linked list in the process) create a separate clock for
|
||||
* mdio inheriting the rate from emac_clk.
|
||||
*/
|
||||
static struct clk mdio_clk = {
|
||||
.name = "mdio",
|
||||
.parent = &emac_clk,
|
||||
};
|
||||
|
||||
static struct clk mcasp_clk = {
|
||||
.name = "mcasp",
|
||||
.parent = &async3_clk,
|
||||
|
|
@ -367,6 +377,16 @@ static struct clk aemif_clk = {
|
|||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
/*
|
||||
* In order to avoid adding the aemif_clk to the clock lookup table twice (and
|
||||
* screwing up the linked list in the process) create a separate clock for
|
||||
* nand inheriting the rate from aemif_clk.
|
||||
*/
|
||||
static struct clk aemif_nand_clk = {
|
||||
.name = "nand",
|
||||
.parent = &aemif_clk,
|
||||
};
|
||||
|
||||
static struct clk usb11_clk = {
|
||||
.name = "usb11",
|
||||
.parent = &pll0_sysclk4,
|
||||
|
|
@ -529,7 +549,7 @@ static struct clk_lookup da850_clks[] = {
|
|||
CLK(NULL, "arm", &arm_clk),
|
||||
CLK(NULL, "rmii", &rmii_clk),
|
||||
CLK("davinci_emac.1", NULL, &emac_clk),
|
||||
CLK("davinci_mdio.0", "fck", &emac_clk),
|
||||
CLK("davinci_mdio.0", "fck", &mdio_clk),
|
||||
CLK("davinci-mcasp.0", NULL, &mcasp_clk),
|
||||
CLK("davinci-mcbsp.0", NULL, &mcbsp0_clk),
|
||||
CLK("davinci-mcbsp.1", NULL, &mcbsp1_clk),
|
||||
|
|
@ -537,7 +557,15 @@ static struct clk_lookup da850_clks[] = {
|
|||
CLK("da830-mmc.0", NULL, &mmcsd0_clk),
|
||||
CLK("da830-mmc.1", NULL, &mmcsd1_clk),
|
||||
CLK("ti-aemif", NULL, &aemif_clk),
|
||||
CLK(NULL, "aemif", &aemif_clk),
|
||||
/*
|
||||
* The only user of this clock is davinci_nand and it get's it through
|
||||
* con_id. The nand node itself is created from within the aemif
|
||||
* driver to guarantee that it's probed after the aemif timing
|
||||
* parameters are configured. of_dev_auxdata is not accessible from
|
||||
* the aemif driver and can't be passed to of_platform_populate(). For
|
||||
* that reason we're leaving the dev_id here as NULL.
|
||||
*/
|
||||
CLK(NULL, "aemif", &aemif_nand_clk),
|
||||
CLK("ohci-da8xx", "usb11", &usb11_clk),
|
||||
CLK("musb-da8xx", "usb20", &usb20_clk),
|
||||
CLK("spi_davinci.0", NULL, &spi0_clk),
|
||||
|
|
|
|||
|
|
@ -22,6 +22,8 @@
|
|||
#define DA8XX_USB0_BASE 0x01e00000
|
||||
#define DA8XX_USB1_BASE 0x01e25000
|
||||
|
||||
static struct clk *usb20_clk;
|
||||
|
||||
static struct platform_device da8xx_usb_phy = {
|
||||
.name = "da8xx-usb-phy",
|
||||
.id = -1,
|
||||
|
|
@ -158,26 +160,13 @@ int __init da8xx_register_usb_refclkin(int rate)
|
|||
|
||||
static void usb20_phy_clk_enable(struct clk *clk)
|
||||
{
|
||||
struct clk *usb20_clk;
|
||||
int err;
|
||||
u32 val;
|
||||
u32 timeout = 500000; /* 500 msec */
|
||||
|
||||
val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
|
||||
|
||||
usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
|
||||
if (IS_ERR(usb20_clk)) {
|
||||
pr_err("could not get usb20 clk: %ld\n", PTR_ERR(usb20_clk));
|
||||
return;
|
||||
}
|
||||
|
||||
/* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */
|
||||
err = clk_prepare_enable(usb20_clk);
|
||||
if (err) {
|
||||
pr_err("failed to enable usb20 clk: %d\n", err);
|
||||
clk_put(usb20_clk);
|
||||
return;
|
||||
}
|
||||
davinci_clk_enable(usb20_clk);
|
||||
|
||||
/*
|
||||
* Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1
|
||||
|
|
@ -197,8 +186,7 @@ static void usb20_phy_clk_enable(struct clk *clk)
|
|||
|
||||
pr_err("Timeout waiting for USB 2.0 PHY clock good\n");
|
||||
done:
|
||||
clk_disable_unprepare(usb20_clk);
|
||||
clk_put(usb20_clk);
|
||||
davinci_clk_disable(usb20_clk);
|
||||
}
|
||||
|
||||
static void usb20_phy_clk_disable(struct clk *clk)
|
||||
|
|
@ -285,11 +273,19 @@ static struct clk_lookup usb20_phy_clk_lookup =
|
|||
int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin)
|
||||
{
|
||||
struct clk *parent;
|
||||
int ret = 0;
|
||||
int ret;
|
||||
|
||||
usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20");
|
||||
ret = PTR_ERR_OR_ZERO(usb20_clk);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux");
|
||||
if (IS_ERR(parent))
|
||||
return PTR_ERR(parent);
|
||||
ret = PTR_ERR_OR_ZERO(parent);
|
||||
if (ret) {
|
||||
clk_put(usb20_clk);
|
||||
return ret;
|
||||
}
|
||||
|
||||
usb20_phy_clk.parent = parent;
|
||||
ret = clk_register(&usb20_phy_clk);
|
||||
|
|
|
|||
|
|
@ -385,36 +385,6 @@ fail:
|
|||
return pen_release != -1 ? ret : 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialise the CPU possible map early - this describes the CPUs
|
||||
* which may be present or become present in the system.
|
||||
*/
|
||||
|
||||
static void __init exynos_smp_init_cpus(void)
|
||||
{
|
||||
void __iomem *scu_base = scu_base_addr();
|
||||
unsigned int i, ncores;
|
||||
|
||||
if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
|
||||
ncores = scu_base ? scu_get_core_count(scu_base) : 1;
|
||||
else
|
||||
/*
|
||||
* CPU Nodes are passed thru DT and set_cpu_possible
|
||||
* is set by "arm_dt_init_cpu_maps".
|
||||
*/
|
||||
return;
|
||||
|
||||
/* sanity check */
|
||||
if (ncores > nr_cpu_ids) {
|
||||
pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
|
||||
ncores, nr_cpu_ids);
|
||||
ncores = nr_cpu_ids;
|
||||
}
|
||||
|
||||
for (i = 0; i < ncores; i++)
|
||||
set_cpu_possible(i, true);
|
||||
}
|
||||
|
||||
static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
int i;
|
||||
|
|
@ -479,7 +449,6 @@ static void exynos_cpu_die(unsigned int cpu)
|
|||
#endif /* CONFIG_HOTPLUG_CPU */
|
||||
|
||||
const struct smp_operations exynos_smp_ops __initconst = {
|
||||
.smp_init_cpus = exynos_smp_init_cpus,
|
||||
.smp_prepare_cpus = exynos_smp_prepare_cpus,
|
||||
.smp_secondary_init = exynos_secondary_init,
|
||||
.smp_boot_secondary = exynos_boot_secondary,
|
||||
|
|
|
|||
|
|
@ -37,7 +37,6 @@ static const char * const imx1_dt_board_compat[] __initconst = {
|
|||
};
|
||||
|
||||
DT_MACHINE_START(IMX1_DT, "Freescale i.MX1 (Device Tree Support)")
|
||||
.map_io = debug_ll_io_init,
|
||||
.init_early = imx1_init_early,
|
||||
.init_irq = imx1_init_irq,
|
||||
.dt_compat = imx1_dt_board_compat,
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@
|
|||
#include "soc.h"
|
||||
|
||||
#define OMAP1_DMA_BASE (0xfffed800)
|
||||
#define OMAP1_LOGICAL_DMA_CH_COUNT 17
|
||||
|
||||
static u32 enable_1510_mode;
|
||||
|
||||
|
|
@ -348,8 +347,6 @@ static int __init omap1_system_dma_init(void)
|
|||
goto exit_iounmap;
|
||||
}
|
||||
|
||||
d->lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
|
||||
|
||||
/* Valid attributes for omap1 plus processors */
|
||||
if (cpu_is_omap15xx())
|
||||
d->dev_caps = ENABLE_1510_MODE;
|
||||
|
|
@ -366,13 +363,14 @@ static int __init omap1_system_dma_init(void)
|
|||
d->dev_caps |= CLEAR_CSR_ON_READ;
|
||||
d->dev_caps |= IS_WORD_16;
|
||||
|
||||
if (cpu_is_omap15xx())
|
||||
d->chan_count = 9;
|
||||
else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
|
||||
if (!(d->dev_caps & ENABLE_1510_MODE))
|
||||
d->chan_count = 16;
|
||||
/* available logical channels */
|
||||
if (cpu_is_omap15xx()) {
|
||||
d->lch_count = 9;
|
||||
} else {
|
||||
if (d->dev_caps & ENABLE_1510_MODE)
|
||||
d->lch_count = 9;
|
||||
else
|
||||
d->chan_count = 9;
|
||||
d->lch_count = 16;
|
||||
}
|
||||
|
||||
p = dma_plat_info;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
|
|||
|
||||
# Common support
|
||||
obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \
|
||||
common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
|
||||
common.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
|
||||
omap_device.o omap-headsmp.o sram.o drm.o
|
||||
|
||||
hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
|
||||
|
|
|
|||
|
|
@ -304,7 +304,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
|
|||
.init_late = am43xx_init_late,
|
||||
.init_irq = omap_gic_of_init,
|
||||
.init_machine = omap_generic_init,
|
||||
.init_time = omap4_local_timer_init,
|
||||
.init_time = omap3_gptimer_timer_init,
|
||||
.dt_compat = am43_boards_compat,
|
||||
.restart = omap44xx_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -1,160 +0,0 @@
|
|||
/*
|
||||
* OMAP2+ specific gpio initialization
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* Author:
|
||||
* Charulatha V <charu@ti.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_data/gpio-omap.h>
|
||||
|
||||
#include "soc.h"
|
||||
#include "omap_hwmod.h"
|
||||
#include "omap_device.h"
|
||||
#include "omap-pm.h"
|
||||
|
||||
#include "powerdomain.h"
|
||||
|
||||
static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
|
||||
{
|
||||
struct platform_device *pdev;
|
||||
struct omap_gpio_platform_data *pdata;
|
||||
struct omap_gpio_dev_attr *dev_attr;
|
||||
char *name = "omap_gpio";
|
||||
int id;
|
||||
struct powerdomain *pwrdm;
|
||||
|
||||
/*
|
||||
* extract the device id from name field available in the
|
||||
* hwmod database and use the same for constructing ids for
|
||||
* gpio devices.
|
||||
* CAUTION: Make sure the name in the hwmod database does
|
||||
* not change. If changed, make corresponding change here
|
||||
* or make use of static variable mechanism to handle this.
|
||||
*/
|
||||
sscanf(oh->name, "gpio%d", &id);
|
||||
|
||||
pdata = kzalloc(sizeof(struct omap_gpio_platform_data), GFP_KERNEL);
|
||||
if (!pdata) {
|
||||
pr_err("gpio%d: Memory allocation failed\n", id);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
dev_attr = (struct omap_gpio_dev_attr *)oh->dev_attr;
|
||||
pdata->bank_width = dev_attr->bank_width;
|
||||
pdata->dbck_flag = dev_attr->dbck_flag;
|
||||
pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
|
||||
pdata->regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
|
||||
if (!pdata->regs) {
|
||||
pr_err("gpio%d: Memory allocation failed\n", id);
|
||||
kfree(pdata);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
switch (oh->class->rev) {
|
||||
case 0:
|
||||
if (id == 1)
|
||||
/* non-wakeup GPIO pins for OMAP2 Bank1 */
|
||||
pdata->non_wakeup_gpios = 0xe203ffc0;
|
||||
else if (id == 2)
|
||||
/* non-wakeup GPIO pins for OMAP2 Bank2 */
|
||||
pdata->non_wakeup_gpios = 0x08700040;
|
||||
/* fall through */
|
||||
|
||||
case 1:
|
||||
pdata->regs->revision = OMAP24XX_GPIO_REVISION;
|
||||
pdata->regs->direction = OMAP24XX_GPIO_OE;
|
||||
pdata->regs->datain = OMAP24XX_GPIO_DATAIN;
|
||||
pdata->regs->dataout = OMAP24XX_GPIO_DATAOUT;
|
||||
pdata->regs->set_dataout = OMAP24XX_GPIO_SETDATAOUT;
|
||||
pdata->regs->clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT;
|
||||
pdata->regs->irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
|
||||
pdata->regs->irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
|
||||
pdata->regs->irqenable = OMAP24XX_GPIO_IRQENABLE1;
|
||||
pdata->regs->irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
|
||||
pdata->regs->set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
|
||||
pdata->regs->clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
|
||||
pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
|
||||
pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
|
||||
pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;
|
||||
pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;
|
||||
pdata->regs->leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
|
||||
pdata->regs->leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
|
||||
pdata->regs->risingdetect = OMAP24XX_GPIO_RISINGDETECT;
|
||||
pdata->regs->fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
|
||||
break;
|
||||
case 2:
|
||||
pdata->regs->revision = OMAP4_GPIO_REVISION;
|
||||
pdata->regs->direction = OMAP4_GPIO_OE;
|
||||
pdata->regs->datain = OMAP4_GPIO_DATAIN;
|
||||
pdata->regs->dataout = OMAP4_GPIO_DATAOUT;
|
||||
pdata->regs->set_dataout = OMAP4_GPIO_SETDATAOUT;
|
||||
pdata->regs->clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
|
||||
pdata->regs->irqstatus_raw0 = OMAP4_GPIO_IRQSTATUSRAW0;
|
||||
pdata->regs->irqstatus_raw1 = OMAP4_GPIO_IRQSTATUSRAW1;
|
||||
pdata->regs->irqstatus = OMAP4_GPIO_IRQSTATUS0;
|
||||
pdata->regs->irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
|
||||
pdata->regs->irqenable = OMAP4_GPIO_IRQSTATUSSET0;
|
||||
pdata->regs->irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
|
||||
pdata->regs->set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
|
||||
pdata->regs->clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
|
||||
pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;
|
||||
pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
|
||||
pdata->regs->ctrl = OMAP4_GPIO_CTRL;
|
||||
pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;
|
||||
pdata->regs->leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
|
||||
pdata->regs->leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
|
||||
pdata->regs->risingdetect = OMAP4_GPIO_RISINGDETECT;
|
||||
pdata->regs->fallingdetect = OMAP4_GPIO_FALLINGDETECT;
|
||||
break;
|
||||
default:
|
||||
WARN(1, "Invalid gpio bank_type\n");
|
||||
kfree(pdata->regs);
|
||||
kfree(pdata);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pwrdm = omap_hwmod_get_pwrdm(oh);
|
||||
pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
|
||||
|
||||
pdev = omap_device_build(name, id - 1, oh, pdata, sizeof(*pdata));
|
||||
kfree(pdata);
|
||||
|
||||
if (IS_ERR(pdev)) {
|
||||
WARN(1, "Can't build omap_device for %s:%s.\n",
|
||||
name, oh->name);
|
||||
return PTR_ERR(pdev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* gpio_init needs to be done before
|
||||
* machine_init functions access gpio APIs.
|
||||
* Hence gpio_init is a omap_postcore_initcall.
|
||||
*/
|
||||
static int __init omap2_gpio_init(void)
|
||||
{
|
||||
/* If dtb is there, the devices will be created dynamically */
|
||||
if (of_have_populated_dt())
|
||||
return -ENODEV;
|
||||
|
||||
return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL);
|
||||
}
|
||||
omap_postcore_initcall(omap2_gpio_init);
|
||||
|
|
@ -741,14 +741,14 @@ static int _init_main_clk(struct omap_hwmod *oh)
|
|||
int ret = 0;
|
||||
char name[MOD_CLK_MAX_NAME_LEN];
|
||||
struct clk *clk;
|
||||
static const char modck[] = "_mod_ck";
|
||||
|
||||
/* +7 magic comes from '_mod_ck' suffix */
|
||||
if (strlen(oh->name) + 7 > MOD_CLK_MAX_NAME_LEN)
|
||||
if (strlen(oh->name) >= MOD_CLK_MAX_NAME_LEN - strlen(modck))
|
||||
pr_warn("%s: warning: cropping name for %s\n", __func__,
|
||||
oh->name);
|
||||
|
||||
strncpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - 7);
|
||||
strcat(name, "_mod_ck");
|
||||
strlcpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - strlen(modck));
|
||||
strlcat(name, modck, MOD_CLK_MAX_NAME_LEN);
|
||||
|
||||
clk = clk_get(NULL, name);
|
||||
if (!IS_ERR(clk)) {
|
||||
|
|
|
|||
|
|
@ -121,10 +121,6 @@ extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[];
|
|||
extern struct omap_hwmod_irq_info omap2_dispc_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio1_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio2_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio3_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_gpio4_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_dma_system_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[];
|
||||
extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[];
|
||||
|
|
|
|||
|
|
@ -161,7 +161,7 @@ static struct ti_st_plat_data wilink7_pdata = {
|
|||
.nshutdown_gpio = 162,
|
||||
.dev_name = "/dev/ttyO1",
|
||||
.flow_cntrl = 1,
|
||||
.baud_rate = 300000,
|
||||
.baud_rate = 3000000,
|
||||
};
|
||||
|
||||
static struct platform_device wl128x_device = {
|
||||
|
|
|
|||
|
|
@ -295,10 +295,8 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
|
|||
GFP_KERNEL);
|
||||
|
||||
if (!prcm_irq_chips || !prcm_irq_setup->saved_mask ||
|
||||
!prcm_irq_setup->priority_mask) {
|
||||
pr_err("PRCM: kzalloc failed\n");
|
||||
!prcm_irq_setup->priority_mask)
|
||||
goto err;
|
||||
}
|
||||
|
||||
memset(mask, 0, sizeof(mask));
|
||||
|
||||
|
|
|
|||
|
|
@ -510,18 +510,19 @@ void __init omap3_secure_sync32k_timer_init(void)
|
|||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
|
||||
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \
|
||||
defined(CONFIG_SOC_AM43XX)
|
||||
void __init omap3_gptimer_timer_init(void)
|
||||
{
|
||||
__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
|
||||
1, "timer_sys_ck", "ti,timer-alwon", true);
|
||||
|
||||
clocksource_probe();
|
||||
if (of_have_populated_dt())
|
||||
clocksource_probe();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
|
||||
defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
|
||||
defined(CONFIG_SOC_DRA7XX)
|
||||
static void __init omap4_sync32k_timer_init(void)
|
||||
{
|
||||
__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
|
||||
|
|
|
|||
|
|
@ -345,10 +345,40 @@ static struct s3c24xx_dma_channel s3c2410_dma_channels[DMACH_MAX] = {
|
|||
[DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, S3C24XX_DMA_CHANREQ(4, 3), },
|
||||
};
|
||||
|
||||
static const struct dma_slave_map s3c2410_dma_slave_map[] = {
|
||||
{ "s3c2410-sdi", "rx-tx", (void *)DMACH_SDI },
|
||||
{ "s3c2410-spi.0", "rx", (void *)DMACH_SPI0_RX },
|
||||
{ "s3c2410-spi.0", "tx", (void *)DMACH_SPI0_TX },
|
||||
{ "s3c2410-spi.1", "rx", (void *)DMACH_SPI1_RX },
|
||||
{ "s3c2410-spi.1", "tx", (void *)DMACH_SPI1_TX },
|
||||
/*
|
||||
* The DMA request source[1] (DMACH_UARTx_SRC2) are
|
||||
* not used in the UART driver.
|
||||
*/
|
||||
{ "s3c2410-uart.0", "rx", (void *)DMACH_UART0 },
|
||||
{ "s3c2410-uart.0", "tx", (void *)DMACH_UART0 },
|
||||
{ "s3c2410-uart.1", "rx", (void *)DMACH_UART1 },
|
||||
{ "s3c2410-uart.1", "tx", (void *)DMACH_UART1 },
|
||||
{ "s3c2410-uart.2", "rx", (void *)DMACH_UART2 },
|
||||
{ "s3c2410-uart.2", "tx", (void *)DMACH_UART2 },
|
||||
{ "s3c24xx-iis", "rx", (void *)DMACH_I2S_IN },
|
||||
{ "s3c24xx-iis", "tx", (void *)DMACH_I2S_OUT },
|
||||
{ "s3c-hsudc", "rx0", (void *)DMACH_USB_EP1 },
|
||||
{ "s3c-hsudc", "tx0", (void *)DMACH_USB_EP1 },
|
||||
{ "s3c-hsudc", "rx1", (void *)DMACH_USB_EP2 },
|
||||
{ "s3c-hsudc", "tx1", (void *)DMACH_USB_EP2 },
|
||||
{ "s3c-hsudc", "rx2", (void *)DMACH_USB_EP3 },
|
||||
{ "s3c-hsudc", "tx2", (void *)DMACH_USB_EP3 },
|
||||
{ "s3c-hsudc", "rx3", (void *)DMACH_USB_EP4 },
|
||||
{ "s3c-hsudc", "tx3", (void *)DMACH_USB_EP4 }
|
||||
};
|
||||
|
||||
static struct s3c24xx_dma_platdata s3c2410_dma_platdata = {
|
||||
.num_phy_channels = 4,
|
||||
.channels = s3c2410_dma_channels,
|
||||
.num_channels = DMACH_MAX,
|
||||
.slave_map = s3c2410_dma_slave_map,
|
||||
.slavecnt = ARRAY_SIZE(s3c2410_dma_slave_map),
|
||||
};
|
||||
|
||||
struct platform_device s3c2410_device_dma = {
|
||||
|
|
@ -388,10 +418,36 @@ static struct s3c24xx_dma_channel s3c2412_dma_channels[DMACH_MAX] = {
|
|||
[DMACH_USB_EP4] = { S3C24XX_DMA_APB, true, 16 },
|
||||
};
|
||||
|
||||
static const struct dma_slave_map s3c2412_dma_slave_map[] = {
|
||||
{ "s3c2412-sdi", "rx-tx", (void *)DMACH_SDI },
|
||||
{ "s3c2412-spi.0", "rx", (void *)DMACH_SPI0_RX },
|
||||
{ "s3c2412-spi.0", "tx", (void *)DMACH_SPI0_TX },
|
||||
{ "s3c2412-spi.1", "rx", (void *)DMACH_SPI1_RX },
|
||||
{ "s3c2412-spi.1", "tx", (void *)DMACH_SPI1_TX },
|
||||
{ "s3c2440-uart.0", "rx", (void *)DMACH_UART0 },
|
||||
{ "s3c2440-uart.0", "tx", (void *)DMACH_UART0 },
|
||||
{ "s3c2440-uart.1", "rx", (void *)DMACH_UART1 },
|
||||
{ "s3c2440-uart.1", "tx", (void *)DMACH_UART1 },
|
||||
{ "s3c2440-uart.2", "rx", (void *)DMACH_UART2 },
|
||||
{ "s3c2440-uart.2", "tx", (void *)DMACH_UART2 },
|
||||
{ "s3c2412-iis", "rx", (void *)DMACH_I2S_IN },
|
||||
{ "s3c2412-iis", "tx", (void *)DMACH_I2S_OUT },
|
||||
{ "s3c-hsudc", "rx0", (void *)DMACH_USB_EP1 },
|
||||
{ "s3c-hsudc", "tx0", (void *)DMACH_USB_EP1 },
|
||||
{ "s3c-hsudc", "rx1", (void *)DMACH_USB_EP2 },
|
||||
{ "s3c-hsudc", "tx1", (void *)DMACH_USB_EP2 },
|
||||
{ "s3c-hsudc", "rx2", (void *)DMACH_USB_EP3 },
|
||||
{ "s3c-hsudc", "tx2", (void *)DMACH_USB_EP3 },
|
||||
{ "s3c-hsudc", "rx3", (void *)DMACH_USB_EP4 },
|
||||
{ "s3c-hsudc", "tx3", (void *)DMACH_USB_EP4 }
|
||||
};
|
||||
|
||||
static struct s3c24xx_dma_platdata s3c2412_dma_platdata = {
|
||||
.num_phy_channels = 4,
|
||||
.channels = s3c2412_dma_channels,
|
||||
.num_channels = DMACH_MAX,
|
||||
.slave_map = s3c2412_dma_slave_map,
|
||||
.slavecnt = ARRAY_SIZE(s3c2412_dma_slave_map),
|
||||
};
|
||||
|
||||
struct platform_device s3c2412_device_dma = {
|
||||
|
|
@ -534,10 +590,30 @@ static struct s3c24xx_dma_channel s3c2443_dma_channels[DMACH_MAX] = {
|
|||
[DMACH_MIC_IN] = { S3C24XX_DMA_APB, true, 29 },
|
||||
};
|
||||
|
||||
static const struct dma_slave_map s3c2443_dma_slave_map[] = {
|
||||
{ "s3c2440-sdi", "rx-tx", (void *)DMACH_SDI },
|
||||
{ "s3c2443-spi.0", "rx", (void *)DMACH_SPI0_RX },
|
||||
{ "s3c2443-spi.0", "tx", (void *)DMACH_SPI0_TX },
|
||||
{ "s3c2443-spi.1", "rx", (void *)DMACH_SPI1_RX },
|
||||
{ "s3c2443-spi.1", "tx", (void *)DMACH_SPI1_TX },
|
||||
{ "s3c2440-uart.0", "rx", (void *)DMACH_UART0 },
|
||||
{ "s3c2440-uart.0", "tx", (void *)DMACH_UART0 },
|
||||
{ "s3c2440-uart.1", "rx", (void *)DMACH_UART1 },
|
||||
{ "s3c2440-uart.1", "tx", (void *)DMACH_UART1 },
|
||||
{ "s3c2440-uart.2", "rx", (void *)DMACH_UART2 },
|
||||
{ "s3c2440-uart.2", "tx", (void *)DMACH_UART2 },
|
||||
{ "s3c2440-uart.3", "rx", (void *)DMACH_UART3 },
|
||||
{ "s3c2440-uart.3", "tx", (void *)DMACH_UART3 },
|
||||
{ "s3c24xx-iis", "rx", (void *)DMACH_I2S_IN },
|
||||
{ "s3c24xx-iis", "tx", (void *)DMACH_I2S_OUT },
|
||||
};
|
||||
|
||||
static struct s3c24xx_dma_platdata s3c2443_dma_platdata = {
|
||||
.num_phy_channels = 6,
|
||||
.channels = s3c2443_dma_channels,
|
||||
.num_channels = DMACH_MAX,
|
||||
.slave_map = s3c2443_dma_slave_map,
|
||||
.slavecnt = ARRAY_SIZE(s3c2443_dma_slave_map),
|
||||
};
|
||||
|
||||
struct platform_device s3c2443_device_dma = {
|
||||
|
|
|
|||
|
|
@ -134,8 +134,8 @@ bool prcmu_pending_irq(void)
|
|||
*/
|
||||
bool prcmu_is_cpu_in_wfi(int cpu)
|
||||
{
|
||||
return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 :
|
||||
PRCM_ARM_WFI_STANDBY_WFI0;
|
||||
return readl(PRCM_ARM_WFI_STANDBY) &
|
||||
(cpu ? PRCM_ARM_WFI_STANDBY_WFI1 : PRCM_ARM_WFI_STANDBY_WFI0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -356,5 +356,21 @@
|
|||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
vpu: vpu@d0100000 {
|
||||
compatible = "amlogic,meson-gx-vpu";
|
||||
reg = <0x0 0xd0100000 0x0 0x100000>,
|
||||
<0x0 0xc883c000 0x0 0x1000>,
|
||||
<0x0 0xc8838000 0x0 0x1000>;
|
||||
reg-names = "vpu", "hhi", "dmc";
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* CVBS VDAC output port */
|
||||
cvbs_vdac_port: port@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -142,6 +142,16 @@
|
|||
clocks = <&wifi32k>;
|
||||
clock-names = "ext_clock";
|
||||
};
|
||||
|
||||
cvbs-connector {
|
||||
compatible = "composite-video-connector";
|
||||
|
||||
port {
|
||||
cvbs_connector_in: endpoint {
|
||||
remote-endpoint = <&cvbs_vdac_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
|
|
@ -229,3 +239,9 @@
|
|||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&cvbs_vdac_port {
|
||||
cvbs_vdac_out: endpoint {
|
||||
remote-endpoint = <&cvbs_connector_in>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -137,6 +137,10 @@
|
|||
};
|
||||
};
|
||||
|
||||
&scpi_clocks {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&uart_ao_a_pins>;
|
||||
|
|
|
|||
|
|
@ -125,6 +125,16 @@
|
|||
clocks = <&wifi32k>;
|
||||
clock-names = "ext_clock";
|
||||
};
|
||||
|
||||
cvbs-connector {
|
||||
compatible = "composite-video-connector";
|
||||
|
||||
port {
|
||||
cvbs_connector_in: endpoint {
|
||||
remote-endpoint = <&cvbs_vdac_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* This UART is brought out to the DB9 connector */
|
||||
|
|
@ -234,3 +244,9 @@
|
|||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&cvbs_vdac_port {
|
||||
cvbs_vdac_out: endpoint {
|
||||
remote-endpoint = <&cvbs_connector_in>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
mboxes = <&mailbox 1 &mailbox 2>;
|
||||
shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
|
||||
|
||||
clocks {
|
||||
scpi_clocks: clocks {
|
||||
compatible = "arm,scpi-clocks";
|
||||
|
||||
scpi_dvfs: scpi_clocks@0 {
|
||||
|
|
@ -506,3 +506,7 @@
|
|||
<&clkc CLKID_FCLK_DIV2>;
|
||||
clock-names = "core", "clkin0", "clkin1";
|
||||
};
|
||||
|
||||
&vpu {
|
||||
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -117,6 +117,16 @@
|
|||
clocks = <&wifi32k>;
|
||||
clock-names = "ext_clock";
|
||||
};
|
||||
|
||||
cvbs-connector {
|
||||
compatible = "composite-video-connector";
|
||||
|
||||
port {
|
||||
cvbs_connector_in: endpoint {
|
||||
remote-endpoint = <&cvbs_vdac_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
|
|
@ -203,3 +213,9 @@
|
|||
clocks = <&clkc CLKID_FCLK_DIV4>;
|
||||
clock-names = "clkin0";
|
||||
};
|
||||
|
||||
&cvbs_vdac_port {
|
||||
cvbs_vdac_out: endpoint {
|
||||
remote-endpoint = <&cvbs_connector_in>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@
|
|||
|
||||
#include "meson-gx.dtsi"
|
||||
#include <dt-bindings/clock/gxbb-clkc.h>
|
||||
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
|
||||
#include <dt-bindings/gpio/meson-gxl-gpio.h>
|
||||
|
||||
/ {
|
||||
compatible = "amlogic,meson-gxl";
|
||||
|
|
@ -299,3 +299,7 @@
|
|||
<&clkc CLKID_FCLK_DIV2>;
|
||||
clock-names = "core", "clkin0", "clkin1";
|
||||
};
|
||||
|
||||
&vpu {
|
||||
compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -90,6 +90,16 @@
|
|||
compatible = "mmc-pwrseq-emmc";
|
||||
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
cvbs-connector {
|
||||
compatible = "composite-video-connector";
|
||||
|
||||
port {
|
||||
cvbs_connector_in: endpoint {
|
||||
remote-endpoint = <&cvbs_vdac_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* This UART is brought out to the DB9 connector */
|
||||
|
|
@ -167,3 +177,9 @@
|
|||
max-speed = <1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cvbs_vdac_port {
|
||||
cvbs_vdac_out: endpoint {
|
||||
remote-endpoint = <&cvbs_connector_in>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue