ASoC: sgtl5000: add delay before first I2C access
commit 58cc9c9a17
upstream.
To quote from section 1.3.1 of the data sheet:
The SGTL5000 has an internal reset that is deasserted
8 SYS_MCLK cycles after all power rails have been brought
up. After this time, communication can start
...
1.0us represents 8 SYS_MCLK cycles at the minimum 8.0 MHz SYS_MCLK.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1521,6 +1521,9 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
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if (ret)
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return ret;
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/* Need 8 clocks before I2C accesses */
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udelay(1);
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/* read chip information */
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ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, ®);
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if (ret)
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