xtensa: xtfpga: fix hardware lockup caused by LCD driver
LCD driver is always built for the XTFPGA platform, but its base address is not configurable, and is wrong for ML605/KC705. Its initialization locks up KC705 board hardware. Make the whole driver optional, and its base address and bus width configurable. Implement 4-bit bus access method. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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@ -428,6 +428,36 @@ config DEFAULT_MEM_SIZE
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If unsure, leave the default value here.
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config XTFPGA_LCD
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bool "Enable XTFPGA LCD driver"
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depends on XTENSA_PLATFORM_XTFPGA
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default n
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help
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There's a 2x16 LCD on most of XTFPGA boards, kernel may output
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progress messages there during bootup/shutdown. It may be useful
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during board bringup.
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If unsure, say N.
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config XTFPGA_LCD_BASE_ADDR
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hex "XTFPGA LCD base address"
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depends on XTFPGA_LCD
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default "0x0d0c0000"
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help
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Base address of the LCD controller inside KIO region.
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Different boards from XTFPGA family have LCD controller at different
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addresses. Please consult prototyping user guide for your board for
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the correct address. Wrong address here may lead to hardware lockup.
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config XTFPGA_LCD_8BIT_ACCESS
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bool "Use 8-bit access to XTFPGA LCD"
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depends on XTFPGA_LCD
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default n
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help
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LCD may be connected with 4- or 8-bit interface, 8-bit access may
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only be used with 8-bit interface. Please consult prototyping user
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guide for your board for the correct interface width.
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endmenu
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menu "Executable file formats"
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@ -6,4 +6,5 @@
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#
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# Note 2! The CFLAGS definitions are in the main makefile...
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obj-y = setup.o lcd.o
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obj-y += setup.o
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obj-$(CONFIG_XTFPGA_LCD) += lcd.o
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@ -40,9 +40,6 @@
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/* UART */
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#define DUART16552_PADDR (XCHAL_KIO_PADDR + 0x0D050020)
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/* LCD instruction and data addresses. */
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#define LCD_INSTR_ADDR ((char *)IOADDR(0x0D040000))
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#define LCD_DATA_ADDR ((char *)IOADDR(0x0D040004))
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/* Misc. */
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#define XTFPGA_FPGAREGS_VADDR IOADDR(0x0D020000)
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@ -11,10 +11,25 @@
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#ifndef __XTENSA_XTAVNET_LCD_H
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#define __XTENSA_XTAVNET_LCD_H
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#ifdef CONFIG_XTFPGA_LCD
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/* Display string STR at position POS on the LCD. */
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void lcd_disp_at_pos(char *str, unsigned char pos);
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/* Shift the contents of the LCD display left or right. */
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void lcd_shiftleft(void);
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void lcd_shiftright(void);
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#else
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static inline void lcd_disp_at_pos(char *str, unsigned char pos)
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{
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}
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static inline void lcd_shiftleft(void)
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{
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}
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static inline void lcd_shiftright(void)
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{
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}
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#endif
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#endif
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@ -1,50 +1,63 @@
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/*
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* Driver for the LCD display on the Tensilica LX60 Board.
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* Driver for the LCD display on the Tensilica XTFPGA board family.
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* http://www.mytechcorp.com/cfdata/productFile/File1/MOC-16216B-B-A0A04.pdf
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001, 2006 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*/
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/*
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*
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* FIXME: this code is from the examples from the LX60 user guide.
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*
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* The lcd_pause function does busy waiting, which is probably not
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* great. Maybe the code could be changed to use kernel timers, or
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* change the hardware to not need to wait.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <platform/hardware.h>
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#include <platform/lcd.h>
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#include <linux/delay.h>
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#define LCD_PAUSE_ITERATIONS 4000
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/* LCD instruction and data addresses. */
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#define LCD_INSTR_ADDR ((char *)IOADDR(CONFIG_XTFPGA_LCD_BASE_ADDR))
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#define LCD_DATA_ADDR (LCD_INSTR_ADDR + 4)
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#define LCD_CLEAR 0x1
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#define LCD_DISPLAY_ON 0xc
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/* 8bit and 2 lines display */
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#define LCD_DISPLAY_MODE8BIT 0x38
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#define LCD_DISPLAY_MODE4BIT 0x28
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#define LCD_DISPLAY_POS 0x80
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#define LCD_SHIFT_LEFT 0x18
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#define LCD_SHIFT_RIGHT 0x1c
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static void lcd_put_byte(u8 *addr, u8 data)
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{
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#ifdef CONFIG_XTFPGA_LCD_8BIT_ACCESS
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ACCESS_ONCE(*addr) = data;
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#else
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ACCESS_ONCE(*addr) = data & 0xf0;
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ACCESS_ONCE(*addr) = (data << 4) & 0xf0;
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#endif
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}
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static int __init lcd_init(void)
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{
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*LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT;
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ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE8BIT;
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mdelay(5);
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*LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT;
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ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE8BIT;
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udelay(200);
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*LCD_INSTR_ADDR = LCD_DISPLAY_MODE8BIT;
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ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE8BIT;
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udelay(50);
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*LCD_INSTR_ADDR = LCD_DISPLAY_ON;
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#ifndef CONFIG_XTFPGA_LCD_8BIT_ACCESS
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ACCESS_ONCE(*LCD_INSTR_ADDR) = LCD_DISPLAY_MODE4BIT;
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udelay(50);
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*LCD_INSTR_ADDR = LCD_CLEAR;
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lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_MODE4BIT);
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udelay(50);
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#endif
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lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_ON);
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udelay(50);
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lcd_put_byte(LCD_INSTR_ADDR, LCD_CLEAR);
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mdelay(10);
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lcd_disp_at_pos("XTENSA LINUX", 0);
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return 0;
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@ -52,10 +65,10 @@ static int __init lcd_init(void)
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void lcd_disp_at_pos(char *str, unsigned char pos)
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{
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*LCD_INSTR_ADDR = LCD_DISPLAY_POS | pos;
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lcd_put_byte(LCD_INSTR_ADDR, LCD_DISPLAY_POS | pos);
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udelay(100);
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while (*str != 0) {
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*LCD_DATA_ADDR = *str;
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lcd_put_byte(LCD_DATA_ADDR, *str);
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udelay(200);
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str++;
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}
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@ -63,13 +76,13 @@ void lcd_disp_at_pos(char *str, unsigned char pos)
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void lcd_shiftleft(void)
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{
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*LCD_INSTR_ADDR = LCD_SHIFT_LEFT;
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lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_LEFT);
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udelay(50);
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}
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void lcd_shiftright(void)
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{
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*LCD_INSTR_ADDR = LCD_SHIFT_RIGHT;
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lcd_put_byte(LCD_INSTR_ADDR, LCD_SHIFT_RIGHT);
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udelay(50);
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}
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