OpenE2K
/
linux
6
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

ARM: plat-mxc: hook special idle handlers to arm_pm_idle 

... and remove redundant include of <mach/system.h>.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
This commit is contained in:
Nicolas Pitre 2011-08-03 11:34:59 -04:00 committed by Nicolas Pitre
parent 92311272c1
commit 4a3ea24405
3 changed files with 37 additions and 46 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

52
arch/arm/mach-imx/mm-imx3.c
View File

@ -34,31 +34,29 @@ static void imx3_idle(void)
{ {
unsigned long reg = 0; unsigned long reg = 0;
if (!need_resched()) __asm__ __volatile__(
__asm__ __volatile__( /* disable I and D cache */
/* disable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n"
"mrc p15, 0, %0, c1, c0, 0\n" "bic %0, %0, #0x00001000\n"
"bic %0, %0, #0x00001000\n" "bic %0, %0, #0x00000004\n"
"bic %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c1, c0, 0\n" /* invalidate I cache */
/* invalidate I cache */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c5, 0\n"
"mcr p15, 0, %0, c7, c5, 0\n" /* clear and invalidate D cache */
/* clear and invalidate D cache */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c14, 0\n"
"mcr p15, 0, %0, c7, c14, 0\n" /* WFI */
/* WFI */ "mov %0, #0\n"
"mov %0, #0\n" "mcr p15, 0, %0, c7, c0, 4\n"
"mcr p15, 0, %0, c7, c0, 4\n" "nop\n" "nop\n" "nop\n" "nop\n"
"nop\n" "nop\n" "nop\n" "nop\n" "nop\n" "nop\n" "nop\n"
"nop\n" "nop\n" "nop\n" /* enable I and D cache */
/* enable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n"
"mrc p15, 0, %0, c1, c0, 0\n" "orr %0, %0, #0x00001000\n"
"orr %0, %0, #0x00001000\n" "orr %0, %0, #0x00000004\n"
"orr %0, %0, #0x00000004\n" "mcr p15, 0, %0, c1, c0, 0\n"
"mcr p15, 0, %0, c1, c0, 0\n" : "=r" (reg));
: "=r" (reg));
local_irq_enable();
} }
static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
@ -134,8 +132,8 @@ void __init imx31_init_early(void)
{ {
mxc_set_cpu_type(MXC_CPU_MX31); mxc_set_cpu_type(MXC_CPU_MX31);
mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR));
pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap; imx_ioremap = imx3_ioremap;
arm_pm_idle = imx3_idle;
} }
void __init mx31_init_irq(void) void __init mx31_init_irq(void)
@ -197,7 +195,7 @@ void __init imx35_init_early(void)
mxc_set_cpu_type(MXC_CPU_MX35); mxc_set_cpu_type(MXC_CPU_MX35);
mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR));
pm_idle = imx3_idle; arm_pm_idle = imx3_idle;
imx_ioremap = imx3_ioremap; imx_ioremap = imx3_ioremap;
} }

3
arch/arm/mach-imx/pm-imx27.c
View File

@ -10,7 +10,6 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/suspend.h> #include <linux/suspend.h>
#include <linux/io.h> #include <linux/io.h>
#include <mach/system.h>
#include <mach/hardware.h> #include <mach/hardware.h>
static int mx27_suspend_enter(suspend_state_t state) static int mx27_suspend_enter(suspend_state_t state)
@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state)
cscr &= 0xFFFFFFFC; cscr &= 0xFFFFFFFC;
__raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
/* Executes WFI */ /* Executes WFI */
arch_idle(); cpu_do_idle();
break; break;
default: default:

28
arch/arm/mach-mx5/mm.c
View File

@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk;
static void imx5_idle(void) static void imx5_idle(void)
{ {
if (!need_resched()) { /* gpc clock is needed for SRPG */
/* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) {
if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs");
gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk))
if (IS_ERR(gpc_dvfs_clk)) return;
goto err0;
}
clk_enable(gpc_dvfs_clk);
mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
if (tzic_enable_wake())
goto err1;
cpu_do_idle();
err1:
clk_disable(gpc_dvfs_clk);
} }
err0: clk_enable(gpc_dvfs_clk);
local_irq_enable(); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
if (tzic_enable_wake() != 0)
cpu_do_idle();
clk_disable(gpc_dvfs_clk);
} }
/* /*
@ -108,7 +102,7 @@ void __init imx51_init_early(void)
mxc_set_cpu_type(MXC_CPU_MX51); mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
pm_idle = imx5_idle; arm_pm_idle = imx5_idle;
} }
void __init imx53_init_early(void) void __init imx53_init_early(void)