ARM: dts: qcom-msm8974: Add HS usb node and OTG detection mechanisms

This USB controller has two phys, so add them both underneath the
ULPI bus, but only enable one of them based on the board
configuration. To get OTG to work, we need to add the id and vbus
detection info and also populate the regulators for the vbus
supply.

Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Stephen Boyd 2017-01-26 16:47:26 -08:00 committed by Andy Gross
parent ffb35d431b
commit 4ac5a200b0
3 changed files with 101 additions and 1 deletions

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@ -44,6 +44,26 @@
vqmmc-supply = <&pm8941_l13>;
};
usb@f9a55000 {
status = "ok";
phys = <&usb_hs2_phy>;
phy-select = <&tcsr 0xb000 1>;
extcon = <&smbb>, <&usb_id>;
vbus-supply = <&chg_otg>;
hnp-disable;
srp-disable;
adp-disable;
ulpi {
phy@b {
status = "ok";
v3p3-supply = <&pm8941_l24>;
v1p8-supply = <&pm8941_l6>;
extcon = <&smbb>;
qcom,init-seq = /bits/ 8 <0x1 0x63>;
};
};
};
pinctrl@fd510000 {
i2c11_pins: i2c11 {

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@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/reset/qcom,gcc-msm8974.h>
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
@ -551,6 +552,11 @@
reg = <0xfc400000 0x4000>;
};
tcsr: syscon@fd4a0000 {
compatible = "syscon";
reg = <0xfd4a0000 0x10000>;
};
tcsr_mutex_block: syscon@fd484000 {
compatible = "syscon";
reg = <0xfd484000 0x2000>;
@ -620,6 +626,50 @@
status = "disabled";
};
otg: usb@f9a55000 {
compatible = "qcom,ci-hdrc";
reg = <0xf9a55000 0x200>,
<0xf9a55200 0x200>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_USB_HS_AHB_CLK>,
<&gcc GCC_USB_HS_SYSTEM_CLK>;
clock-names = "iface", "core";
assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
assigned-clock-rates = <75000000>;
resets = <&gcc GCC_USB_HS_BCR>;
reset-names = "core";
phy_type = "ulpi";
dr_mode = "otg";
ahb-burst-config = <0>;
phy-names = "usb-phy";
status = "disabled";
#reset-cells = <1>;
ulpi {
usb_hs1_phy: phy@a {
compatible = "qcom,usb-hs-phy-msm8974",
"qcom,usb-hs-phy";
#phy-cells = <0>;
clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
reset-names = "phy", "por";
status = "disabled";
};
usb_hs2_phy: phy@b {
compatible = "qcom,usb-hs-phy-msm8974",
"qcom,usb-hs-phy";
#phy-cells = <0>;
clocks = <&xo_board>, <&gcc GCC_USB2B_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
resets = <&gcc GCC_USB2B_PHY_BCR>, <&otg 1>;
reset-names = "phy", "por";
status = "disabled";
};
};
};
rng@f9bff000 {
compatible = "qcom,prng";
reg = <0xf9bff000 0x200>;

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@ -26,7 +26,14 @@
bias-pull-up;
};
charger@1000 {
usb_id: misc@900 {
compatible = "qcom,pm8941-misc";
reg = <0x900>;
interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "usb_id";
};
smbb: charger@1000 {
compatible = "qcom,pm8941-charger";
reg = <0x1000>;
interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
@ -175,5 +182,28 @@
status = "disabled";
};
regulators {
compatible = "qcom,pm8941-regulators";
interrupts = <0x1 0x83 0x2 0>, <0x1 0x84 0x2 0>;
interrupt-names = "ocp-5vs1", "ocp-5vs2";
vin_5vs-supply = <&pm8941_5v>;
pm8941_5v: s4 {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-enable-ramp-delay = <500>;
};
pm8941_5vs1: 5vs1 {
regulator-enable-ramp-delay = <1000>;
regulator-pull-down;
regulator-over-current-protection;
qcom,ocp-max-retries = <10>;
qcom,ocp-retry-delay = <30>;
qcom,vs-soft-start-strength = <0>;
regulator-initial-mode = <1>;
};
};
};
};