- Fixes a bug in the ->read/write_reg() implementation of the m25p80

driver
 - Make sure of_node_get/put() calls are balanced in the partition
   parsing code
 - Fix a race in the denali NAND controller driver
 - Fix false positive WARN_ON() in the marvell NAND controller driver
 -----BEGIN PGP SIGNATURE-----
 
 iQI5BAABCAAjBQJbo2UeHBxib3Jpcy5icmV6aWxsb25AYm9vdGxpbi5jb20ACgkQ
 Ze02AX4ItwDWbxAAttHJYM0BsQaBBbso7bjRhk8i3E5/C600W3Lv/MB9LuVjP2xX
 sJ0yA+2akvuv5t5ieHgrFZD4gOMdZ/oMRTeXFEy+YxvluJZx6ta1SR5SJqqvJWd8
 xTnOteaU/Yw84GqA/bJMy+j4xp/5tqho305NzIB1Jn0XbCTst91n3HxGNIKQioYa
 RSGND2bW/UE6p/TRpNQTZu10JWeuCPb9rVD50XL5fAQF+Fdu0ELpfkkPDXTwxLb2
 Msdo7wfECNK3Oj22yXtEnPOia5SaBOiOmQ/fP7EiQNMFvfC+heFAbG5J5xZRe2mw
 JWUtiCPajLSzJv3qv6kxf4VEbj8cQo9pN4Drfy+FRO7CogXoDpxvXQ5vmX042Q7M
 ygt/CNqe0NC8hJPt2eygaAyRIXXHTo45VAd1DWgN3bi2ZEy1DZ8oD0RjhiD8B7Fn
 EDcHO019spNglM0J+RqwQPrCWwgnw9ext8xGprwj0K+B78s1HgmGnuMfFE/tdn/w
 oZNn1v1iNZxOv5oz/VR9QTt3ggVjOXBzKZGGoXSjI0ScrXrS9WZg1yR6fzf/DeVg
 0whIlXQBsvRaMIxeSnXHboK5ZBaOBCficGKS8mxlxue7QHErrPV6RiunFP8nvq5j
 yMt5qYCdCRHd2BZlhKO1pX8RtnwK7Sew1E/0USroS/Ke87hoGETiQxLf3ZE=
 =p43N
 -----END PGP SIGNATURE-----

Merge tag 'mtd/fixes-for-4.19-rc5' of git://git.infradead.org/linux-mtd

Boris writes:
  "- Fixes a bug in the ->read/write_reg() implementation of the m25p80
     driver
   - Make sure of_node_get/put() calls are balanced in the partition
     parsing code
   - Fix a race in the denali NAND controller driver
   - Fix false positive WARN_ON() in the marvell NAND controller driver"

* tag 'mtd/fixes-for-4.19-rc5' of git://git.infradead.org/linux-mtd:
  mtd: devices: m25p80: Make sure the buffer passed in op is DMA-able
  mtd: partitions: fix unbalanced of_node_get/put()
  mtd: rawnand: denali: fix a race condition when DMA is kicked
  mtd: rawnand: marvell: prevent harmless warnings
This commit is contained in:
Greg Kroah-Hartman 2018-09-20 11:25:20 +02:00
commit 4b92e7fd76
4 changed files with 36 additions and 5 deletions

View File

@ -39,13 +39,23 @@ static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
SPI_MEM_OP_NO_ADDR,
SPI_MEM_OP_NO_DUMMY,
SPI_MEM_OP_DATA_IN(len, val, 1));
SPI_MEM_OP_DATA_IN(len, NULL, 1));
void *scratchbuf;
int ret;
scratchbuf = kmalloc(len, GFP_KERNEL);
if (!scratchbuf)
return -ENOMEM;
op.data.buf.in = scratchbuf;
ret = spi_mem_exec_op(flash->spimem, &op);
if (ret < 0)
dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
code);
else
memcpy(val, scratchbuf, len);
kfree(scratchbuf);
return ret;
}
@ -56,9 +66,19 @@ static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
SPI_MEM_OP_NO_ADDR,
SPI_MEM_OP_NO_DUMMY,
SPI_MEM_OP_DATA_OUT(len, buf, 1));
SPI_MEM_OP_DATA_OUT(len, NULL, 1));
void *scratchbuf;
int ret;
return spi_mem_exec_op(flash->spimem, &op);
scratchbuf = kmemdup(buf, len, GFP_KERNEL);
if (!scratchbuf)
return -ENOMEM;
op.data.buf.out = scratchbuf;
ret = spi_mem_exec_op(flash->spimem, &op);
kfree(scratchbuf);
return ret;
}
static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,

View File

@ -873,8 +873,11 @@ static int mtd_part_of_parse(struct mtd_info *master,
int ret, err = 0;
np = mtd_get_of_node(master);
if (!mtd_is_partition(master))
if (mtd_is_partition(master))
of_node_get(np);
else
np = of_get_child_by_name(np, "partitions");
of_property_for_each_string(np, "compatible", prop, compat) {
parser = mtd_part_get_compatible_parser(compat);
if (!parser)

View File

@ -596,6 +596,12 @@ static int denali_dma_xfer(struct denali_nand_info *denali, void *buf,
}
iowrite32(DMA_ENABLE__FLAG, denali->reg + DMA_ENABLE);
/*
* The ->setup_dma() hook kicks DMA by using the data/command
* interface, which belongs to a different AXI port from the
* register interface. Read back the register to avoid a race.
*/
ioread32(denali->reg + DMA_ENABLE);
denali_reset_irq(denali);
denali->setup_dma(denali, dma_addr, page, write);

View File

@ -1547,7 +1547,7 @@ static void marvell_nfc_parse_instructions(struct nand_chip *chip,
for (op_id = 0; op_id < subop->ninstrs; op_id++) {
unsigned int offset, naddrs;
const u8 *addrs;
int len = nand_subop_get_data_len(subop, op_id);
int len;
instr = &subop->instrs[op_id];
@ -1593,6 +1593,7 @@ static void marvell_nfc_parse_instructions(struct nand_chip *chip,
nfc_op->ndcb[0] |=
NDCB0_CMD_XTYPE(XTYPE_MONOLITHIC_RW) |
NDCB0_LEN_OVRD;
len = nand_subop_get_data_len(subop, op_id);
nfc_op->ndcb[3] |= round_up(len, FIFO_DEPTH);
}
nfc_op->data_delay_ns = instr->delay_ns;
@ -1606,6 +1607,7 @@ static void marvell_nfc_parse_instructions(struct nand_chip *chip,
nfc_op->ndcb[0] |=
NDCB0_CMD_XTYPE(XTYPE_MONOLITHIC_RW) |
NDCB0_LEN_OVRD;
len = nand_subop_get_data_len(subop, op_id);
nfc_op->ndcb[3] |= round_up(len, FIFO_DEPTH);
}
nfc_op->data_delay_ns = instr->delay_ns;