ARM: imx6sl: add missing enet clock for imx6sl
There's a enet clock gate missing in clock tree, thus add it. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
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clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
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clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
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clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
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clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
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clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
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clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
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clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);
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@ -145,6 +145,7 @@
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#define IMX6SL_CLK_USDHC4 132
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#define IMX6SL_CLK_PLL4_AUDIO_DIV 133
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#define IMX6SL_CLK_SPBA 134
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#define IMX6SL_CLK_END 135
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#define IMX6SL_CLK_ENET 135
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#define IMX6SL_CLK_END 136
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#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
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