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drm/bridge/sii8620: add delay during cbus reset 

Without delay CBUS sometimes was not reset properly.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-17-git-send-email-a.hajda@samsung.com
This commit is contained in:
Andrzej Hajda 2017-02-01 08:47:43 +01:00 committed by Archit Taneja
parent 6bed9bc2ae
commit 4dc3c07127
1 changed files with 4 additions and 5 deletions
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9
drivers/gpu/drm/bridge/sil-sii8620.c
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@ -892,11 +892,10 @@ static void sii8620_hw_reset(struct sii8620 *ctx)
static void sii8620_cbus_reset(struct sii8620 *ctx)
{
sii8620_write_seq_static(ctx,
REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
| BIT_PWD_SRST_CBUS_RST_SW_EN,
REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN
);
sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
| BIT_PWD_SRST_CBUS_RST_SW_EN);
usleep_range(10000, 20000);
sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN);
}
static void sii8620_set_auto_zone(struct sii8620 *ctx)