PCI: Restore PRI and PASID state after Function-Level Reset
After a Function-Level Reset, PCI states need to be restored. Save PASID features and PRI reqs cached. [bhelgaas: search for capability only if PRI/PASID were enabled] Signed-off-by: CQ Tang <cq.tang@intel.com> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Jean-Phillipe Brucker <jean-philippe.brucker@arm.com> Cc: David Woodhouse <dwmw2@infradead.org>
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@ -160,17 +160,16 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
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if (!pos)
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return -EINVAL;
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pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
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pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
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if ((control & PCI_PRI_CTRL_ENABLE) ||
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!(status & PCI_PRI_STATUS_STOPPED))
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if (!(status & PCI_PRI_STATUS_STOPPED))
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return -EBUSY;
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pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
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reqs = min(max_requests, reqs);
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pdev->pri_reqs_alloc = reqs;
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pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
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control |= PCI_PRI_CTRL_ENABLE;
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control = PCI_PRI_CTRL_ENABLE;
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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pdev->pri_enabled = 1;
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@ -205,6 +204,28 @@ void pci_disable_pri(struct pci_dev *pdev)
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}
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EXPORT_SYMBOL_GPL(pci_disable_pri);
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/**
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* pci_restore_pri_state - Restore PRI
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* @pdev: PCI device structure
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*/
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void pci_restore_pri_state(struct pci_dev *pdev)
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{
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u16 control = PCI_PRI_CTRL_ENABLE;
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u32 reqs = pdev->pri_reqs_alloc;
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int pos;
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if (!pdev->pri_enabled)
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return;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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if (!pos)
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return;
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pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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}
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EXPORT_SYMBOL_GPL(pci_restore_pri_state);
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/**
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* pci_reset_pri - Resets device's PRI state
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* @pdev: PCI device structure
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@ -224,12 +245,7 @@ int pci_reset_pri(struct pci_dev *pdev)
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if (!pos)
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return -EINVAL;
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pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
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if (control & PCI_PRI_CTRL_ENABLE)
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return -EBUSY;
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control |= PCI_PRI_CTRL_RESET;
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control = PCI_PRI_CTRL_RESET;
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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return 0;
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@ -259,12 +275,7 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
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if (!pos)
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return -EINVAL;
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pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
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pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
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if (control & PCI_PASID_CTRL_ENABLE)
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return -EINVAL;
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supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
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/* User wants to enable anything unsupported? */
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@ -272,6 +283,7 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
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return -EINVAL;
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control = PCI_PASID_CTRL_ENABLE | features;
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pdev->pasid_features = features;
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pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
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@ -284,7 +296,6 @@ EXPORT_SYMBOL_GPL(pci_enable_pasid);
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/**
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* pci_disable_pasid - Disable the PASID capability
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* @pdev: PCI device structure
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*
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*/
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void pci_disable_pasid(struct pci_dev *pdev)
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{
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@ -304,6 +315,27 @@ void pci_disable_pasid(struct pci_dev *pdev)
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}
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EXPORT_SYMBOL_GPL(pci_disable_pasid);
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/**
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* pci_restore_pasid_state - Restore PASID capabilities
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* @pdev: PCI device structure
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*/
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void pci_restore_pasid_state(struct pci_dev *pdev)
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{
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u16 control;
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int pos;
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if (!pdev->pasid_enabled)
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return;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
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if (!pos)
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return;
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control = PCI_PASID_CTRL_ENABLE | pdev->pasid_features;
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pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
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}
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EXPORT_SYMBOL_GPL(pci_restore_pasid_state);
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/**
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* pci_pasid_features - Check which PASID features are supported
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* @pdev: PCI device structure
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@ -28,6 +28,7 @@
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#include <linux/pm_runtime.h>
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#include <linux/pci_hotplug.h>
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#include <linux/vmalloc.h>
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#include <linux/pci-ats.h>
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#include <asm/setup.h>
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#include <asm/dma.h>
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#include <linux/aer.h>
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@ -1173,6 +1174,8 @@ void pci_restore_state(struct pci_dev *dev)
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/* PCI Express register must be restored first */
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pci_restore_pcie_state(dev);
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pci_restore_pasid_state(dev);
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pci_restore_pri_state(dev);
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pci_restore_ats_state(dev);
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pci_restore_vc_state(dev);
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@ -7,6 +7,7 @@
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int pci_enable_pri(struct pci_dev *pdev, u32 reqs);
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void pci_disable_pri(struct pci_dev *pdev);
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void pci_restore_pri_state(struct pci_dev *pdev);
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int pci_reset_pri(struct pci_dev *pdev);
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#else /* CONFIG_PCI_PRI */
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@ -20,6 +21,10 @@ static inline void pci_disable_pri(struct pci_dev *pdev)
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{
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}
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static inline void pci_restore_pri_state(struct pci_dev *pdev)
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{
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}
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static inline int pci_reset_pri(struct pci_dev *pdev)
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{
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return -ENODEV;
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@ -31,6 +36,7 @@ static inline int pci_reset_pri(struct pci_dev *pdev)
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int pci_enable_pasid(struct pci_dev *pdev, int features);
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void pci_disable_pasid(struct pci_dev *pdev);
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void pci_restore_pasid_state(struct pci_dev *pdev);
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int pci_pasid_features(struct pci_dev *pdev);
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int pci_max_pasids(struct pci_dev *pdev);
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@ -45,6 +51,10 @@ static inline void pci_disable_pasid(struct pci_dev *pdev)
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{
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}
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static inline void pci_restore_pasid_state(struct pci_dev *pdev)
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{
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}
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static inline int pci_pasid_features(struct pci_dev *pdev)
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{
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return -EINVAL;
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@ -400,6 +400,12 @@ struct pci_dev {
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u16 ats_cap; /* ATS Capability offset */
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u8 ats_stu; /* ATS Smallest Translation Unit */
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atomic_t ats_ref_cnt; /* number of VFs with ATS enabled */
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#endif
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#ifdef CONFIG_PCI_PRI
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u32 pri_reqs_alloc; /* Number of PRI requests allocated */
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#endif
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#ifdef CONFIG_PCI_PASID
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u16 pasid_features;
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#endif
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phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
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size_t romlen; /* Length of ROM if it's not from the BAR */
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