arm64: Add a description on 48-bit address space with 4KB pages
This patch adds memory layout and translation lookup information about 48-bit address space with 4K pages. The description is based on 4 levels of translation tables. Signed-off-by: Jungseok Lee <jays.lee@samsung.com> Reviewed-by: Sungjinn Chung <sungjinn.chung@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
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@ -8,10 +8,11 @@ This document describes the virtual memory layout used by the AArch64
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Linux kernel. The architecture allows up to 4 levels of translation
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Linux kernel. The architecture allows up to 4 levels of translation
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tables with a 4KB page size and up to 3 levels with a 64KB page size.
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tables with a 4KB page size and up to 3 levels with a 64KB page size.
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AArch64 Linux uses 3 levels of translation tables with the 4KB page
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AArch64 Linux uses either 3 levels or 4 levels of translation tables with
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configuration, allowing 39-bit (512GB) virtual addresses for both user
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the 4KB page configuration, allowing 39-bit (512GB) or 48-bit (256TB)
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and kernel. With 64KB pages, only 2 levels of translation tables are
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virtual addresses, respectively, for both user and kernel. With 64KB
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used but the memory layout is the same.
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pages, only 2 levels of translation tables, allowing 42-bit (4TB)
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virtual address, are used but the memory layout is the same.
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User addresses have bits 63:39 set to 0 while the kernel addresses have
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User addresses have bits 63:39 set to 0 while the kernel addresses have
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the same bits set to 1. TTBRx selection is given by bit 63 of the
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the same bits set to 1. TTBRx selection is given by bit 63 of the
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@ -21,7 +22,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to
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TTBR0.
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TTBR0.
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AArch64 Linux memory layout with 4KB pages:
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AArch64 Linux memory layout with 4KB pages + 3 levels:
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Start End Size Use
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Start End Size Use
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-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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@ -48,7 +49,34 @@ ffffffbffc000000 ffffffbfffffffff 64MB modules
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ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
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ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
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AArch64 Linux memory layout with 64KB pages:
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AArch64 Linux memory layout with 4KB pages + 4 levels:
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Start End Size Use
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-----------------------------------------------------------------------
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0000000000000000 0000ffffffffffff 256TB user
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ffff000000000000 ffff7bfffffeffff ~124TB vmalloc
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ffff7bffffff0000 ffff7bffffffffff 64KB [guard page]
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ffff7c0000000000 ffff7dffffffffff 2TB vmemmap
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ffff7e0000000000 ffff7ffffbbfffff ~2TB [guard, future vmmemap]
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ffff7ffffa000000 ffff7ffffaffffff 16MB PCI I/O space
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ffff7ffffb000000 ffff7ffffbbfffff 12MB [guard]
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ffff7ffffbc00000 ffff7ffffbdfffff 2MB fixed mappings
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ffff7ffffbe00000 ffff7ffffbffffff 2MB [guard]
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ffff7ffffc000000 ffff7fffffffffff 64MB modules
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ffff800000000000 ffffffffffffffff 128TB kernel logical memory map
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AArch64 Linux memory layout with 64KB pages + 2 levels:
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Start End Size Use
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Start End Size Use
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-----------------------------------------------------------------------
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-----------------------------------------------------------------------
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@ -75,7 +103,7 @@ fffffdfffc000000 fffffdffffffffff 64MB modules
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fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map
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fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map
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Translation table lookup with 4KB pages:
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Translation table lookup with 4KB pages + 3 levels:
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+--------+--------+--------+--------+--------+--------+--------+--------+
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+--------+--------+--------+--------+--------+--------+--------+--------+
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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@ -90,7 +118,22 @@ Translation table lookup with 4KB pages:
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+-------------------------------------------------> [63] TTBR0/1
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+-------------------------------------------------> [63] TTBR0/1
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Translation table lookup with 64KB pages:
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Translation table lookup with 4KB pages + 4 levels:
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+--------+--------+--------+--------+--------+--------+--------+--------+
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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+--------+--------+--------+--------+--------+--------+--------+--------+
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| | | | | |
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| | | | | v
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| | | | | [11:0] in-page offset
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| | | | +-> [20:12] L3 index
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| | | +-----------> [29:21] L2 index
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| | +---------------------> [38:30] L1 index
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| +-------------------------------> [47:39] L0 index
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+-------------------------------------------------> [63] TTBR0/1
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Translation table lookup with 64KB pages + 2 levels:
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+--------+--------+--------+--------+--------+--------+--------+--------+
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+--------+--------+--------+--------+--------+--------+--------+--------+
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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