arm: zynq: Move timer to generic location
Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -0,0 +1,17 @@
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Cadence TTC - Triple Timer Counter
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Required properties:
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- compatible : Should be "cdns,ttc".
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- reg : Specifies base physical address and size of the registers.
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- interrupts : A list of 3 interrupts; one per timer channel.
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- clocks: phandle to the source clock
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Example:
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ttc0: ttc0@f8001000 {
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interrupt-parent = <&intc>;
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interrupts = < 0 10 4 0 11 4 0 12 4 >;
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compatible = "cdns,ttc";
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reg = <0xF8001000 0x1000>;
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clocks = <&cpu_clk 3>;
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};
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@ -9,5 +9,6 @@ config ARCH_ZYNQ
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select MIGHT_HAVE_CACHE_L2X0
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select MIGHT_HAVE_CACHE_L2X0
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select USE_OF
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select USE_OF
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select SPARSE_IRQ
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select SPARSE_IRQ
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select CADENCE_TTC_TIMER
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help
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help
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Support for Xilinx Zynq ARM Cortex A9 Platform
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Support for Xilinx Zynq ARM Cortex A9 Platform
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@ -3,4 +3,4 @@
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#
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#
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# Common support
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# Common support
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obj-y := common.o timer.o
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obj-y := common.o
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@ -31,6 +31,9 @@ config SUNXI_TIMER
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config VT8500_TIMER
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config VT8500_TIMER
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bool
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bool
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config CADENCE_TTC_TIMER
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bool
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config CLKSRC_NOMADIK_MTU
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config CLKSRC_NOMADIK_MTU
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bool
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bool
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depends on (ARCH_NOMADIK || ARCH_U8500)
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depends on (ARCH_NOMADIK || ARCH_U8500)
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@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o
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obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
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obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o
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obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
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obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o
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obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
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obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
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obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o
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obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
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obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
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obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o
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obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o
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