usb: dwc3: core: split host address space
This fix prevents a problem with dwc3 and host mode where we were requesting the entire memory region in dwc3/core.c, thus preventing xhci-plat from ever ioremapping its own address space. Signed-off-by: Ido Shayevitz <idos@codeaurora.org> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Ido Shayevitz
Felipe Balbi
parent
ab5e59dbdb
commit
51249dca62
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@ -410,7 +410,6 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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int ret = -ENOMEM;
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int irq;
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void __iomem *regs;
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void *mem;
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@ -425,15 +424,28 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
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dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1);
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dwc->mem = mem;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!res) {
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dev_err(dev, "missing resource\n");
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dev_err(dev, "missing IRQ\n");
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return -ENODEV;
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}
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dwc->xhci_resources[1] = *res;
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dwc->res = res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "missing memory resource\n");
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return -ENODEV;
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}
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dwc->xhci_resources[0] = *res;
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dwc->xhci_resources[0].end = dwc->xhci_resources[0].start +
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DWC3_XHCI_REGS_END;
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res = devm_request_mem_region(dev, res->start, resource_size(res),
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/*
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* Request memory region but exclude xHCI regs,
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* since it will be requested by the xhci-plat driver.
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*/
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res = devm_request_mem_region(dev, res->start + DWC3_GLOBALS_REGS_START,
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resource_size(res) - DWC3_GLOBALS_REGS_START,
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dev_name(dev));
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if (!res) {
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dev_err(dev, "can't request mem region\n");
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@ -446,19 +458,12 @@ static int __devinit dwc3_probe(struct platform_device *pdev)
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return -ENOMEM;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(dev, "missing IRQ\n");
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return -ENODEV;
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}
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spin_lock_init(&dwc->lock);
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platform_set_drvdata(pdev, dwc);
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dwc->regs = regs;
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dwc->regs_size = resource_size(res);
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dwc->dev = dev;
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dwc->irq = irq;
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if (!strncmp("super", maximum_speed, 5))
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dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
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@ -52,6 +52,7 @@
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/* Global constants */
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#define DWC3_ENDPOINTS_NUM 32
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#define DWC3_XHCI_RESOURCES_NUM 2
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#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE
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#define DWC3_EVENT_TYPE_MASK 0xfe
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@ -75,6 +76,16 @@
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#define DWC3_GSNPSID_MASK 0xffff0000
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#define DWC3_GSNPSREV_MASK 0xffff
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/* DWC3 registers memory space boundries */
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#define DWC3_XHCI_REGS_START 0x0
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#define DWC3_XHCI_REGS_END 0x7fff
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#define DWC3_GLOBALS_REGS_START 0xc100
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#define DWC3_GLOBALS_REGS_END 0xc6ff
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#define DWC3_DEVICE_REGS_START 0xc700
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#define DWC3_DEVICE_REGS_END 0xcbff
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#define DWC3_OTG_REGS_START 0xcc00
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#define DWC3_OTG_REGS_END 0xccff
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/* Global Registers */
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#define DWC3_GSBUSCFG0 0xc100
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#define DWC3_GSBUSCFG1 0xc104
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@ -583,7 +594,7 @@ struct dwc3 {
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struct device *dev;
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struct platform_device *xhci;
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struct resource *res;
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struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM];
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struct dwc3_event_buffer **ev_buffs;
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struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM];
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@ -594,8 +605,6 @@ struct dwc3 {
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void __iomem *regs;
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size_t regs_size;
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int irq;
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u32 num_event_buffers;
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u32 u1u2;
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u32 maximum_speed;
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@ -39,15 +39,6 @@
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#include "core.h"
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static struct resource generic_resources[] = {
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{
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.flags = IORESOURCE_IRQ,
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},
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{
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.flags = IORESOURCE_MEM,
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},
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};
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int dwc3_host_init(struct dwc3 *dwc)
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{
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struct platform_device *xhci;
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@ -68,14 +59,8 @@ int dwc3_host_init(struct dwc3 *dwc)
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dwc->xhci = xhci;
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/* setup resources */
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generic_resources[0].start = dwc->irq;
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generic_resources[1].start = dwc->res->start;
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generic_resources[1].end = dwc->res->start + 0x7fff;
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ret = platform_device_add_resources(xhci, generic_resources,
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ARRAY_SIZE(generic_resources));
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ret = platform_device_add_resources(xhci, dwc->xhci_resources,
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DWC3_XHCI_RESOURCES_NUM);
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if (ret) {
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dev_err(dwc->dev, "couldn't add resources to xHCI device\n");
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goto err1;
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@ -41,14 +41,26 @@
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#include <linux/io.h>
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#include "core.h"
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static inline u32 dwc3_readl(void __iomem *base, u32 offset)
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{
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return readl(base + offset);
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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return readl(base + (offset - DWC3_GLOBALS_REGS_START));
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}
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static inline void dwc3_writel(void __iomem *base, u32 offset, u32 value)
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{
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writel(value, base + offset);
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/*
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* We requested the mem region starting from the Globals address
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* space, see dwc3_probe in core.c.
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* However, the offsets are given starting from xHCI address space.
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*/
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writel(value, base + (offset - DWC3_GLOBALS_REGS_START));
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}
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#endif /* __DRIVERS_USB_DWC3_IO_H */
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