x86/hotplug: Silence APIC only after all interrupts are migrated
There is a race when taking a CPU offline. Current code looks like this:
native_cpu_disable()
{
...
apic_soft_disable();
/*
* Any existing set bits for pending interrupt to
* this CPU are preserved and will be sent via IPI
* to another CPU by fixup_irqs().
*/
cpu_disable_common();
{
....
/*
* Race window happens here. Once local APIC has been
* disabled any new interrupts from the device to
* the old CPU are lost
*/
fixup_irqs(); // Too late to capture anything in IRR.
...
}
}
The fix is to disable the APIC *after* cpu_disable_common().
Testing was done with a USB NIC that provided a source of frequent
interrupts. A script migrated interrupts to a specific CPU and
then took that CPU offline.
Fixes: 60dcaad573
("x86/hotplug: Silence APIC and NMI when CPU is dead")
Reported-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Tested-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/lkml/875zdarr4h.fsf@nanos.tec.linutronix.de/
Link: https://lore.kernel.org/r/1598501530-45821-1-git-send-email-ashok.raj@intel.com
This commit is contained in:
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@ -1594,14 +1594,28 @@ int native_cpu_disable(void)
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if (ret)
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return ret;
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/*
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* Disable the local APIC. Otherwise IPI broadcasts will reach
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* it. It still responds normally to INIT, NMI, SMI, and SIPI
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* messages.
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*/
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apic_soft_disable();
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cpu_disable_common();
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/*
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* Disable the local APIC. Otherwise IPI broadcasts will reach
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* it. It still responds normally to INIT, NMI, SMI, and SIPI
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* messages.
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*
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* Disabling the APIC must happen after cpu_disable_common()
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* which invokes fixup_irqs().
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*
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* Disabling the APIC preserves already set bits in IRR, but
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* an interrupt arriving after disabling the local APIC does not
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* set the corresponding IRR bit.
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*
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* fixup_irqs() scans IRR for set bits so it can raise a not
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* yet handled interrupt on the new destination CPU via an IPI
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* but obviously it can't do so for IRR bits which are not set.
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* IOW, interrupts arriving after disabling the local APIC will
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* be lost.
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*/
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apic_soft_disable();
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return 0;
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}
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