net: phy: broadcom: Fix RGMII delays configuration for BCM54210E
commitfea7fda7f5
upstream. Commit0fc9ae1076
("net: phy: broadcom: add support for BCM54210E") added support for BCM54210E but also unconditionally cleared the RXC to RXD skew and the TXD to TXC skew, thus only making PHY_INTERFACE_MODE_RGMII a possible configuration. Use bcm54xx_config_clock_delay() which correctly sets the registers depending on the 4 possible PHY interface values that exist for RGMII. Fixes:0fc9ae1076
("net: phy: broadcom: add support for BCM54210E") Reported-by: Manasa Mudireddy <manasa.mudireddy@broadcom.com> Reported-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -26,18 +26,13 @@ MODULE_DESCRIPTION("Broadcom PHY driver");
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MODULE_AUTHOR("Maciej W. Rozycki");
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MODULE_LICENSE("GPL");
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static int bcm54xx_config_clock_delay(struct phy_device *phydev);
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static int bcm54210e_config_init(struct phy_device *phydev)
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{
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int val;
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val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
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val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;
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val |= MII_BCM54XX_AUXCTL_MISC_WREN;
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bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, val);
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val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);
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val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN;
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bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);
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bcm54xx_config_clock_delay(phydev);
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if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {
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val = phy_read(phydev, MII_CTRL1000);
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