Merge tag 'master-2014-11-20' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next
John W. Linville says: ==================== pull request: wireless-next 2014-11-21 Please pull this batch of updates intended for the 3.19 stream... For the mac80211 bits, Johannes says: "It has been a while since my last pull request, so we accumulated another relatively large set of changes: * TDLS off-channel support set from Arik/Liad, with some support patches I did * custom regulatory fixes from Arik * minstrel VHT fix (and a small optimisation) from Felix * add back radiotap vendor namespace support (myself) * random MAC address scanning for cfg80211/mac80211/hwsim (myself) * CSA improvements (Luca) * WoWLAN Net Detect (wake on network found) support (Luca) * and lots of other smaller changes from many people" For the Bluetooth bits, Johan says: "Here's another set of patches for 3.19. Most of it is again fixes and cleanups to ieee802154 related code from Alexander Aring. We've also got better handling of hardware error events along with a proper API for HCI drivers to notify the HCI core of such situations. There's also a minor fix for mgmt events as well as a sparse warning fix. The code for sending HCI commands synchronously also gets a fix where we might loose the completion event in the case of very fast HW (particularly easily reproducible with an emulated HCI device)." And... "Here's another bluetooth-next pull request for 3.19. We've got: - Various fixes, cleanups and improvements to ieee802154/mac802154 - Support for a Broadcom BCM20702A1 variant - Lots of lockdep fixes - Fixed handling of LE CoC errors that should trigger SMP" For the Atheros bits, Kalle says: "One ath6kl patch and rest for ath10k, but nothing really major which stands out. Most notable: o fix resume (Bartosz) o firmware restart is now faster and more reliable (Michal) o it's now possible to test hardware restart functionality without crashing the firmware using hw-restart parameter with simulate_fw_crash debugfs file (Michal)" On top of that...both ath9k and mwifiex get their usual level of updates. Of note is the ath9k spectral scan work from Oleksij Rempel. I also pulled from the wireless tree in order to avoid some merge issues. Please let me know if there are problems! ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
53b15ef3c2
|
@ -8,6 +8,11 @@ Required properties:
|
|||
|
||||
The cores on the AXI bus are automatically detected by bcma with the
|
||||
memory ranges they are using and they get registered afterwards.
|
||||
Automatic detection of the IRQ number is not working on
|
||||
BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
|
||||
them manually through device tree. Use an interrupt-map to specify the
|
||||
IRQ used by the devices on the bus. The first address is just an index,
|
||||
because we do not have any special register.
|
||||
|
||||
The top-level axi bus may contain children representing attached cores
|
||||
(devices). This is needed since some hardware details can't be auto
|
||||
|
@ -22,6 +27,22 @@ Example:
|
|||
ranges = <0x00000000 0x18000000 0x00100000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x000fffff 0xffff>;
|
||||
interrupt-map =
|
||||
/* Ethernet Controller 0 */
|
||||
<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
||||
/* Ethernet Controller 1 */
|
||||
<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
/* PCIe Controller 0 */
|
||||
<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
chipcommon {
|
||||
reg = <0x00000000 0x1000>;
|
||||
|
|
|
@ -339,7 +339,7 @@ void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
|
|||
return;
|
||||
}
|
||||
|
||||
irq = bcma_core_irq(cc->core);
|
||||
irq = bcma_core_irq(cc->core, 0);
|
||||
|
||||
/* Determine the registers of the UARTs */
|
||||
cc->nr_serial_ports = (cc->capabilities & BCMA_CC_CAP_NRUART);
|
||||
|
|
|
@ -152,7 +152,7 @@ static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
|
|||
handle_simple_irq);
|
||||
}
|
||||
|
||||
hwirq = bcma_core_irq(cc->core);
|
||||
hwirq = bcma_core_irq(cc->core, 0);
|
||||
err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio",
|
||||
cc);
|
||||
if (err)
|
||||
|
@ -183,7 +183,7 @@ static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
|
|||
return;
|
||||
|
||||
bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO);
|
||||
free_irq(bcma_core_irq(cc->core), cc);
|
||||
free_irq(bcma_core_irq(cc->core, 0), cc);
|
||||
for (gpio = 0; gpio < chip->ngpio; gpio++) {
|
||||
int irq = irq_find_mapping(cc->irq_domain, gpio);
|
||||
|
||||
|
|
|
@ -115,7 +115,7 @@ static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
|
|||
* If disabled, 5 is returned.
|
||||
* If not supported, 6 is returned.
|
||||
*/
|
||||
static unsigned int bcma_core_mips_irq(struct bcma_device *dev)
|
||||
unsigned int bcma_core_mips_irq(struct bcma_device *dev)
|
||||
{
|
||||
struct bcma_device *mdev = dev->bus->drv_mips.core;
|
||||
u32 irqflag;
|
||||
|
@ -133,13 +133,6 @@ static unsigned int bcma_core_mips_irq(struct bcma_device *dev)
|
|||
return 5;
|
||||
}
|
||||
|
||||
unsigned int bcma_core_irq(struct bcma_device *dev)
|
||||
{
|
||||
unsigned int mips_irq = bcma_core_mips_irq(dev);
|
||||
return mips_irq <= 4 ? mips_irq + 2 : 0;
|
||||
}
|
||||
EXPORT_SYMBOL(bcma_core_irq);
|
||||
|
||||
static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
|
||||
{
|
||||
unsigned int oldirq = bcma_core_mips_irq(dev);
|
||||
|
@ -423,7 +416,7 @@ void bcma_core_mips_init(struct bcma_drv_mips *mcore)
|
|||
break;
|
||||
default:
|
||||
list_for_each_entry(core, &bus->cores, list) {
|
||||
core->irq = bcma_core_irq(core);
|
||||
core->irq = bcma_core_irq(core, 0);
|
||||
}
|
||||
bcma_err(bus,
|
||||
"Unknown device (0x%x) found, can not configure IRQs\n",
|
||||
|
|
|
@ -593,7 +593,7 @@ int bcma_core_pci_plat_dev_init(struct pci_dev *dev)
|
|||
pr_info("PCI: Fixing up device %s\n", pci_name(dev));
|
||||
|
||||
/* Fix up interrupt lines */
|
||||
dev->irq = bcma_core_irq(pc_host->pdev->core);
|
||||
dev->irq = bcma_core_irq(pc_host->pdev->core, 0);
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
|
||||
|
||||
readrq = pcie_get_readrq(dev);
|
||||
|
@ -617,6 +617,6 @@ int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev)
|
|||
|
||||
pc_host = container_of(dev->bus->ops, struct bcma_drv_pci_host,
|
||||
pci_ops);
|
||||
return bcma_core_irq(pc_host->pdev->core);
|
||||
return bcma_core_irq(pc_host->pdev->core, 0);
|
||||
}
|
||||
EXPORT_SYMBOL(bcma_core_pci_pcibios_map_irq);
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
#include <linux/bcma/bcma.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
|
||||
MODULE_DESCRIPTION("Broadcom's specific AMBA driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
@ -153,6 +154,46 @@ static struct device_node *bcma_of_find_child_device(struct platform_device *par
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static int bcma_of_irq_parse(struct platform_device *parent,
|
||||
struct bcma_device *core,
|
||||
struct of_phandle_args *out_irq, int num)
|
||||
{
|
||||
__be32 laddr[1];
|
||||
int rc;
|
||||
|
||||
if (core->dev.of_node) {
|
||||
rc = of_irq_parse_one(core->dev.of_node, num, out_irq);
|
||||
if (!rc)
|
||||
return rc;
|
||||
}
|
||||
|
||||
out_irq->np = parent->dev.of_node;
|
||||
out_irq->args_count = 1;
|
||||
out_irq->args[0] = num;
|
||||
|
||||
laddr[0] = cpu_to_be32(core->addr);
|
||||
return of_irq_parse_raw(laddr, out_irq);
|
||||
}
|
||||
|
||||
static unsigned int bcma_of_get_irq(struct platform_device *parent,
|
||||
struct bcma_device *core, int num)
|
||||
{
|
||||
struct of_phandle_args out_irq;
|
||||
int ret;
|
||||
|
||||
if (!parent || !parent->dev.of_node)
|
||||
return 0;
|
||||
|
||||
ret = bcma_of_irq_parse(parent, core, &out_irq, num);
|
||||
if (ret) {
|
||||
bcma_debug(core->bus, "bcma_of_get_irq() failed with rc=%d\n",
|
||||
ret);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return irq_create_of_mapping(&out_irq);
|
||||
}
|
||||
|
||||
static void bcma_of_fill_device(struct platform_device *parent,
|
||||
struct bcma_device *core)
|
||||
{
|
||||
|
@ -161,14 +202,45 @@ static void bcma_of_fill_device(struct platform_device *parent,
|
|||
node = bcma_of_find_child_device(parent, core);
|
||||
if (node)
|
||||
core->dev.of_node = node;
|
||||
|
||||
core->irq = bcma_of_get_irq(parent, core, 0);
|
||||
}
|
||||
#else
|
||||
static void bcma_of_fill_device(struct platform_device *parent,
|
||||
struct bcma_device *core)
|
||||
{
|
||||
}
|
||||
static inline unsigned int bcma_of_get_irq(struct platform_device *parent,
|
||||
struct bcma_device *core, int num)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_OF */
|
||||
|
||||
unsigned int bcma_core_irq(struct bcma_device *core, int num)
|
||||
{
|
||||
struct bcma_bus *bus = core->bus;
|
||||
unsigned int mips_irq;
|
||||
|
||||
switch (bus->hosttype) {
|
||||
case BCMA_HOSTTYPE_PCI:
|
||||
return bus->host_pci->irq;
|
||||
case BCMA_HOSTTYPE_SOC:
|
||||
if (bus->drv_mips.core && num == 0) {
|
||||
mips_irq = bcma_core_mips_irq(core);
|
||||
return mips_irq <= 4 ? mips_irq + 2 : 0;
|
||||
}
|
||||
if (bus->host_pdev)
|
||||
return bcma_of_get_irq(bus->host_pdev, core, num);
|
||||
return 0;
|
||||
case BCMA_HOSTTYPE_SDIO:
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(bcma_core_irq);
|
||||
|
||||
void bcma_prepare_core(struct bcma_bus *bus, struct bcma_device *core)
|
||||
{
|
||||
core->dev.release = bcma_release_core_dev;
|
||||
|
|
|
@ -106,6 +106,8 @@ static const struct usb_device_id btusb_table[] = {
|
|||
{ USB_DEVICE(0x0b05, 0x17b5) },
|
||||
{ USB_DEVICE(0x0b05, 0x17cb) },
|
||||
{ USB_DEVICE(0x413c, 0x8197) },
|
||||
{ USB_DEVICE(0x13d3, 0x3404),
|
||||
.driver_info = BTUSB_BCM_PATCHRAM },
|
||||
|
||||
/* Foxconn - Hon Hai */
|
||||
{ USB_VENDOR_AND_INTERFACE_INFO(0x0489, 0xff, 0x01, 0x01) },
|
||||
|
@ -299,6 +301,8 @@ struct btusb_data {
|
|||
unsigned int sco_num;
|
||||
int isoc_altsetting;
|
||||
int suspend_count;
|
||||
|
||||
int (*recv_bulk)(struct btusb_data *data, void *buffer, int count);
|
||||
};
|
||||
|
||||
static inline void btusb_free_frags(struct btusb_data *data)
|
||||
|
@ -590,7 +594,7 @@ static void btusb_bulk_complete(struct urb *urb)
|
|||
if (urb->status == 0) {
|
||||
hdev->stat.byte_rx += urb->actual_length;
|
||||
|
||||
if (btusb_recv_bulk(data, urb->transfer_buffer,
|
||||
if (data->recv_bulk(data, urb->transfer_buffer,
|
||||
urb->actual_length) < 0) {
|
||||
BT_ERR("%s corrupted ACL packet", hdev->name);
|
||||
hdev->stat.err_rx++;
|
||||
|
@ -2012,6 +2016,8 @@ static int btusb_probe(struct usb_interface *intf,
|
|||
init_usb_anchor(&data->isoc_anchor);
|
||||
spin_lock_init(&data->rxlock);
|
||||
|
||||
data->recv_bulk = btusb_recv_bulk;
|
||||
|
||||
hdev = hci_alloc_dev();
|
||||
if (!hdev)
|
||||
return -ENOMEM;
|
||||
|
@ -2035,6 +2041,7 @@ static int btusb_probe(struct usb_interface *intf,
|
|||
if (id->driver_info & BTUSB_BCM_PATCHRAM) {
|
||||
hdev->setup = btusb_setup_bcm_patchram;
|
||||
hdev->set_bdaddr = btusb_set_bdaddr_bcm;
|
||||
set_bit(HCI_QUIRK_STRICT_DUPLICATE_FILTER, &hdev->quirks);
|
||||
}
|
||||
|
||||
if (id->driver_info & BTUSB_INTEL) {
|
||||
|
|
|
@ -74,7 +74,7 @@ static int ath_wakeup_ar3k(struct tty_struct *tty)
|
|||
|
||||
status = tty->driver->ops->tiocmget(tty);
|
||||
|
||||
/* Disable Automatic RTSCTS */
|
||||
/* Enable Automatic RTSCTS */
|
||||
ktermios.c_cflag |= CRTSCTS;
|
||||
status = tty_set_termios(tty, &ktermios);
|
||||
|
||||
|
|
|
@ -171,8 +171,6 @@ wakeup:
|
|||
static void h5_peer_reset(struct hci_uart *hu)
|
||||
{
|
||||
struct h5 *h5 = hu->priv;
|
||||
struct sk_buff *skb;
|
||||
const unsigned char hard_err[] = { 0x10, 0x01, 0x00 };
|
||||
|
||||
BT_ERR("Peer device has reset");
|
||||
|
||||
|
@ -187,15 +185,8 @@ static void h5_peer_reset(struct hci_uart *hu)
|
|||
h5->tx_seq = 0;
|
||||
h5->tx_ack = 0;
|
||||
|
||||
skb = bt_skb_alloc(3, GFP_ATOMIC);
|
||||
if (!skb)
|
||||
return;
|
||||
|
||||
bt_cb(skb)->pkt_type = HCI_EVENT_PKT;
|
||||
memcpy(skb_put(skb, 3), hard_err, 3);
|
||||
|
||||
/* Send Hardware Error to upper stack */
|
||||
hci_recv_frame(hu->hdev, skb);
|
||||
/* Send reset request to upper stack */
|
||||
hci_reset_dev(hu->hdev);
|
||||
}
|
||||
|
||||
static int h5_open(struct hci_uart *hu)
|
||||
|
|
|
@ -46,10 +46,6 @@ struct at86rf2xx_chip_data {
|
|||
u16 t_off_to_tx_on;
|
||||
u16 t_frame;
|
||||
u16 t_p_ack;
|
||||
/* short interframe spacing time */
|
||||
u16 t_sifs;
|
||||
/* long interframe spacing time */
|
||||
u16 t_lifs;
|
||||
/* completion timeout for tx in msecs */
|
||||
u16 t_tx_timeout;
|
||||
int rssi_base_val;
|
||||
|
@ -719,19 +715,10 @@ at86rf230_tx_complete(void *context)
|
|||
|
||||
enable_irq(lp->spi->irq);
|
||||
|
||||
if (lp->max_frame_retries <= 0) {
|
||||
/* Interfame spacing time, which is phy depend.
|
||||
* TODO
|
||||
* Move this handling in MAC 802.15.4 layer.
|
||||
* This is currently a workaround to avoid fragmenation issues.
|
||||
*/
|
||||
if (skb->len > 18)
|
||||
udelay(lp->data->t_lifs);
|
||||
if (lp->max_frame_retries <= 0)
|
||||
ieee802154_xmit_complete(lp->hw, skb, true);
|
||||
else
|
||||
udelay(lp->data->t_sifs);
|
||||
}
|
||||
|
||||
ieee802154_xmit_complete(lp->hw, skb);
|
||||
ieee802154_xmit_complete(lp->hw, skb, false);
|
||||
}
|
||||
|
||||
static void
|
||||
|
@ -1038,6 +1025,36 @@ at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
|
|||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* This sets the symbol_duration according frequency on the 212.
|
||||
* TODO move this handling while set channel and page in cfg802154.
|
||||
* We can do that, this timings are according 802.15.4 standard.
|
||||
* If we do that in cfg802154, this is a more generic calculation.
|
||||
*
|
||||
* This should also protected from ifs_timer. Means cancel timer and
|
||||
* init with a new value. For now, this is okay.
|
||||
*/
|
||||
if (channel == 0) {
|
||||
if (page == 0) {
|
||||
/* SUB:0 and BPSK:0 -> BPSK-20 */
|
||||
lp->hw->phy->symbol_duration = 50;
|
||||
} else {
|
||||
/* SUB:1 and BPSK:0 -> BPSK-40 */
|
||||
lp->hw->phy->symbol_duration = 25;
|
||||
}
|
||||
} else {
|
||||
if (page == 0)
|
||||
/* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
|
||||
lp->hw->phy->symbol_duration = 40;
|
||||
else
|
||||
/* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
|
||||
lp->hw->phy->symbol_duration = 16;
|
||||
}
|
||||
|
||||
lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
|
||||
lp->hw->phy->symbol_duration;
|
||||
lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
|
||||
lp->hw->phy->symbol_duration;
|
||||
|
||||
return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
|
||||
}
|
||||
|
||||
|
@ -1047,23 +1064,11 @@ at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
|
|||
struct at86rf230_local *lp = hw->priv;
|
||||
int rc;
|
||||
|
||||
if (page < 0 || page > 31 ||
|
||||
!(lp->hw->phy->channels_supported[page] & BIT(channel))) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
rc = lp->data->set_channel(lp, page, channel);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Wait for PLL */
|
||||
usleep_range(lp->data->t_channel_switch,
|
||||
lp->data->t_channel_switch + 10);
|
||||
hw->phy->current_channel = channel;
|
||||
hw->phy->current_page = page;
|
||||
|
||||
return 0;
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int
|
||||
|
@ -1179,9 +1184,6 @@ at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
|
|||
struct at86rf230_local *lp = hw->priv;
|
||||
int rc;
|
||||
|
||||
if (min_be > max_be || max_be > 8 || retries > 5)
|
||||
return -EINVAL;
|
||||
|
||||
rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
@ -1199,9 +1201,6 @@ at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
|
|||
struct at86rf230_local *lp = hw->priv;
|
||||
int rc = 0;
|
||||
|
||||
if (retries < -1 || retries > 15)
|
||||
return -EINVAL;
|
||||
|
||||
lp->tx_aret = retries >= 0;
|
||||
lp->max_frame_retries = retries;
|
||||
|
||||
|
@ -1263,8 +1262,6 @@ static struct at86rf2xx_chip_data at86rf233_data = {
|
|||
.t_off_to_tx_on = 80,
|
||||
.t_frame = 4096,
|
||||
.t_p_ack = 545,
|
||||
.t_sifs = 192,
|
||||
.t_lifs = 640,
|
||||
.t_tx_timeout = 2000,
|
||||
.rssi_base_val = -91,
|
||||
.set_channel = at86rf23x_set_channel,
|
||||
|
@ -1279,8 +1276,6 @@ static struct at86rf2xx_chip_data at86rf231_data = {
|
|||
.t_off_to_tx_on = 110,
|
||||
.t_frame = 4096,
|
||||
.t_p_ack = 545,
|
||||
.t_sifs = 192,
|
||||
.t_lifs = 640,
|
||||
.t_tx_timeout = 2000,
|
||||
.rssi_base_val = -91,
|
||||
.set_channel = at86rf23x_set_channel,
|
||||
|
@ -1295,8 +1290,6 @@ static struct at86rf2xx_chip_data at86rf212_data = {
|
|||
.t_off_to_tx_on = 200,
|
||||
.t_frame = 4096,
|
||||
.t_p_ack = 545,
|
||||
.t_sifs = 192,
|
||||
.t_lifs = 640,
|
||||
.t_tx_timeout = 2000,
|
||||
.rssi_base_val = -100,
|
||||
.set_channel = at86rf212_set_channel,
|
||||
|
@ -1358,7 +1351,11 @@ static int at86rf230_hw_init(struct at86rf230_local *lp)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
/* Force setting slotted operation bit to 0. Sometimes the atben
|
||||
* sets this bit and I don't know why. We set this always force
|
||||
* to zero while probing.
|
||||
*/
|
||||
return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
|
||||
}
|
||||
|
||||
static struct at86rf230_platform_data *
|
||||
|
@ -1427,6 +1424,8 @@ at86rf230_detect_device(struct at86rf230_local *lp)
|
|||
chip = "at86rf231";
|
||||
lp->data = &at86rf231_data;
|
||||
lp->hw->phy->channels_supported[0] = 0x7FFF800;
|
||||
lp->hw->phy->current_channel = 11;
|
||||
lp->hw->phy->symbol_duration = 16;
|
||||
break;
|
||||
case 7:
|
||||
chip = "at86rf212";
|
||||
|
@ -1435,6 +1434,8 @@ at86rf230_detect_device(struct at86rf230_local *lp)
|
|||
lp->hw->flags |= IEEE802154_HW_LBT;
|
||||
lp->hw->phy->channels_supported[0] = 0x00007FF;
|
||||
lp->hw->phy->channels_supported[2] = 0x00007FF;
|
||||
lp->hw->phy->current_channel = 5;
|
||||
lp->hw->phy->symbol_duration = 25;
|
||||
} else {
|
||||
rc = -ENOTSUPP;
|
||||
}
|
||||
|
@ -1443,6 +1444,8 @@ at86rf230_detect_device(struct at86rf230_local *lp)
|
|||
chip = "at86rf233";
|
||||
lp->data = &at86rf233_data;
|
||||
lp->hw->phy->channels_supported[0] = 0x7FFF800;
|
||||
lp->hw->phy->current_channel = 13;
|
||||
lp->hw->phy->symbol_duration = 16;
|
||||
break;
|
||||
default:
|
||||
chip = "unkown";
|
||||
|
@ -1530,6 +1533,8 @@ static int at86rf230_probe(struct spi_device *spi)
|
|||
lp->hw = hw;
|
||||
lp->spi = spi;
|
||||
hw->parent = &spi->dev;
|
||||
hw->vif_data_size = sizeof(*lp);
|
||||
ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
|
||||
|
||||
lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
|
||||
if (IS_ERR(lp->regmap)) {
|
||||
|
|
|
@ -651,6 +651,7 @@ static int cc2520_register(struct cc2520_private *priv)
|
|||
priv->hw->priv = priv;
|
||||
priv->hw->parent = &priv->spi->dev;
|
||||
priv->hw->extra_tx_headroom = 0;
|
||||
priv->hw->vif_data_size = sizeof(*priv);
|
||||
|
||||
/* We do support only 2.4 Ghz */
|
||||
priv->hw->phy->channels_supported[0] = 0x7FFF800;
|
||||
|
|
|
@ -58,9 +58,6 @@ fakelb_hw_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
|
|||
{
|
||||
pr_debug("set channel to %d\n", channel);
|
||||
|
||||
hw->phy->current_page = page;
|
||||
hw->phy->current_channel = channel;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -135,6 +135,11 @@ struct ath_ops {
|
|||
struct ath_common;
|
||||
struct ath_bus_ops;
|
||||
|
||||
struct ath_ps_ops {
|
||||
void (*wakeup)(struct ath_common *common);
|
||||
void (*restore)(struct ath_common *common);
|
||||
};
|
||||
|
||||
struct ath_common {
|
||||
void *ah;
|
||||
void *priv;
|
||||
|
@ -169,6 +174,7 @@ struct ath_common {
|
|||
struct ath_regulatory reg_world_copy;
|
||||
const struct ath_ops *ops;
|
||||
const struct ath_bus_ops *bus_ops;
|
||||
const struct ath_ps_ops *ps_ops;
|
||||
|
||||
bool btcoex_enabled;
|
||||
bool disable_ani;
|
||||
|
@ -178,6 +184,11 @@ struct ath_common {
|
|||
struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
|
||||
};
|
||||
|
||||
static inline const struct ath_ps_ops *ath_ps_ops(struct ath_common *common)
|
||||
{
|
||||
return common->ps_ops;
|
||||
}
|
||||
|
||||
struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
|
||||
u32 len,
|
||||
gfp_t gfp_mask);
|
||||
|
|
|
@ -558,6 +558,7 @@ int ath10k_ce_revoke_recv_next(struct ath10k_ce_pipe *ce_state,
|
|||
|
||||
/* sanity */
|
||||
dest_ring->per_transfer_context[sw_index] = NULL;
|
||||
desc->nbytes = 0;
|
||||
|
||||
/* Update sw_index */
|
||||
sw_index = CE_RING_IDX_INCR(nentries_mask, sw_index);
|
||||
|
@ -835,8 +836,8 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,
|
|||
|
||||
nentries = roundup_pow_of_two(attr->src_nentries);
|
||||
|
||||
memset(src_ring->per_transfer_context, 0,
|
||||
nentries * sizeof(*src_ring->per_transfer_context));
|
||||
memset(src_ring->base_addr_owner_space, 0,
|
||||
nentries * sizeof(struct ce_desc));
|
||||
|
||||
src_ring->sw_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr);
|
||||
src_ring->sw_index &= src_ring->nentries_mask;
|
||||
|
@ -872,8 +873,8 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar,
|
|||
|
||||
nentries = roundup_pow_of_two(attr->dest_nentries);
|
||||
|
||||
memset(dest_ring->per_transfer_context, 0,
|
||||
nentries * sizeof(*dest_ring->per_transfer_context));
|
||||
memset(dest_ring->base_addr_owner_space, 0,
|
||||
nentries * sizeof(struct ce_desc));
|
||||
|
||||
dest_ring->sw_index = ath10k_ce_dest_ring_read_index_get(ar, ctrl_addr);
|
||||
dest_ring->sw_index &= dest_ring->nentries_mask;
|
||||
|
|
|
@ -31,12 +31,17 @@
|
|||
unsigned int ath10k_debug_mask;
|
||||
static bool uart_print;
|
||||
static unsigned int ath10k_p2p;
|
||||
static bool skip_otp;
|
||||
|
||||
module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
|
||||
module_param(uart_print, bool, 0644);
|
||||
module_param_named(p2p, ath10k_p2p, uint, 0644);
|
||||
module_param(skip_otp, bool, 0644);
|
||||
|
||||
MODULE_PARM_DESC(debug_mask, "Debugging mask");
|
||||
MODULE_PARM_DESC(uart_print, "Uart target debugging");
|
||||
MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
|
||||
MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
|
||||
|
||||
static const struct ath10k_hw_params ath10k_hw_params_list[] = {
|
||||
{
|
||||
|
@ -280,7 +285,7 @@ static int ath10k_download_and_run_otp(struct ath10k *ar)
|
|||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
|
||||
|
||||
if (result != 0) {
|
||||
if (!skip_otp && result != 0) {
|
||||
ath10k_err(ar, "otp calibration failed: %d", result);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -744,6 +749,25 @@ static void ath10k_core_restart(struct work_struct *work)
|
|||
{
|
||||
struct ath10k *ar = container_of(work, struct ath10k, restart_work);
|
||||
|
||||
set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
|
||||
|
||||
/* Place a barrier to make sure the compiler doesn't reorder
|
||||
* CRASH_FLUSH and calling other functions.
|
||||
*/
|
||||
barrier();
|
||||
|
||||
ieee80211_stop_queues(ar->hw);
|
||||
ath10k_drain_tx(ar);
|
||||
complete_all(&ar->scan.started);
|
||||
complete_all(&ar->scan.completed);
|
||||
complete_all(&ar->scan.on_channel);
|
||||
complete_all(&ar->offchan_tx_completed);
|
||||
complete_all(&ar->install_key_done);
|
||||
complete_all(&ar->vdev_setup_done);
|
||||
wake_up(&ar->htt.empty_tx_wq);
|
||||
wake_up(&ar->wmi.tx_credits_wq);
|
||||
wake_up(&ar->peer_mapping_wq);
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
|
||||
switch (ar->state) {
|
||||
|
@ -781,6 +805,8 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
|
|||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
|
||||
|
||||
ath10k_bmi_start(ar);
|
||||
|
||||
if (ath10k_init_configure_target(ar)) {
|
||||
|
@ -1185,6 +1211,8 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
|
|||
|
||||
INIT_LIST_HEAD(&ar->peers);
|
||||
init_waitqueue_head(&ar->peer_mapping_wq);
|
||||
init_waitqueue_head(&ar->htt.empty_tx_wq);
|
||||
init_waitqueue_head(&ar->wmi.tx_credits_wq);
|
||||
|
||||
init_completion(&ar->offchan_tx_completed);
|
||||
INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
|
||||
|
|
|
@ -386,6 +386,11 @@ enum ath10k_dev_flags {
|
|||
/* Indicates that ath10k device is during CAC phase of DFS */
|
||||
ATH10K_CAC_RUNNING,
|
||||
ATH10K_FLAG_CORE_REGISTERED,
|
||||
|
||||
/* Device has crashed and needs to restart. This indicates any pending
|
||||
* waiters should immediately cancel instead of waiting for a time out.
|
||||
*/
|
||||
ATH10K_FLAG_CRASH_FLUSH,
|
||||
};
|
||||
|
||||
enum ath10k_cal_mode {
|
||||
|
|
|
@ -695,7 +695,8 @@ static ssize_t ath10k_read_simulate_fw_crash(struct file *file,
|
|||
"To simulate firmware crash write one of the keywords to this file:\n"
|
||||
"`soft` - this will send WMI_FORCE_FW_HANG_ASSERT to firmware if FW supports that command.\n"
|
||||
"`hard` - this will send to firmware command with illegal parameters causing firmware crash.\n"
|
||||
"`assert` - this will send special illegal parameter to firmware to cause assert failure and crash.\n";
|
||||
"`assert` - this will send special illegal parameter to firmware to cause assert failure and crash.\n"
|
||||
"`hw-restart` - this will simply queue hw restart without fw/hw actually crashing.\n";
|
||||
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf));
|
||||
}
|
||||
|
@ -748,6 +749,10 @@ static ssize_t ath10k_write_simulate_fw_crash(struct file *file,
|
|||
} else if (!strcmp(buf, "assert")) {
|
||||
ath10k_info(ar, "simulating firmware assert crash\n");
|
||||
ret = ath10k_debug_fw_assert(ar);
|
||||
} else if (!strcmp(buf, "hw-restart")) {
|
||||
ath10k_info(ar, "user requested hw restart\n");
|
||||
queue_work(ar->workqueue, &ar->restart_work);
|
||||
ret = 0;
|
||||
} else {
|
||||
ret = -EINVAL;
|
||||
goto exit;
|
||||
|
|
|
@ -291,8 +291,12 @@ static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
|
|||
htt->rx_ring.sw_rd_idx.msdu_payld = idx;
|
||||
htt->rx_ring.fill_cnt--;
|
||||
|
||||
trace_ath10k_htt_rx_pop_msdu(ar, msdu->data, msdu->len +
|
||||
skb_tailroom(msdu));
|
||||
dma_unmap_single(htt->ar->dev,
|
||||
ATH10K_SKB_CB(msdu)->paddr,
|
||||
msdu->len + skb_tailroom(msdu),
|
||||
DMA_FROM_DEVICE);
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
|
||||
msdu->data, msdu->len + skb_tailroom(msdu));
|
||||
|
||||
return msdu;
|
||||
}
|
||||
|
@ -319,7 +323,6 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
|||
int msdu_len, msdu_chaining = 0;
|
||||
struct sk_buff *msdu, *next;
|
||||
struct htt_rx_desc *rx_desc;
|
||||
u32 tsf;
|
||||
|
||||
lockdep_assert_held(&htt->rx_ring.lock);
|
||||
|
||||
|
@ -332,14 +335,6 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
|||
while (msdu) {
|
||||
int last_msdu, msdu_len_invalid, msdu_chained;
|
||||
|
||||
dma_unmap_single(htt->ar->dev,
|
||||
ATH10K_SKB_CB(msdu)->paddr,
|
||||
msdu->len + skb_tailroom(msdu),
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
|
||||
msdu->data, msdu->len + skb_tailroom(msdu));
|
||||
|
||||
rx_desc = (struct htt_rx_desc *)msdu->data;
|
||||
|
||||
/* FIXME: we must report msdu payload since this is what caller
|
||||
|
@ -430,14 +425,14 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
|||
while (msdu_chained--) {
|
||||
struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
|
||||
|
||||
dma_unmap_single(htt->ar->dev,
|
||||
ATH10K_SKB_CB(next)->paddr,
|
||||
next->len + skb_tailroom(next),
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
|
||||
"htt rx chained: ", next->data,
|
||||
next->len + skb_tailroom(next));
|
||||
if (!next) {
|
||||
ath10k_warn(ar, "failed to pop chained msdu\n");
|
||||
ath10k_htt_rx_free_msdu_chain(*head_msdu);
|
||||
*head_msdu = NULL;
|
||||
msdu = NULL;
|
||||
htt->rx_confused = true;
|
||||
break;
|
||||
}
|
||||
|
||||
skb_trim(next, 0);
|
||||
skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
|
||||
|
@ -451,8 +446,7 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
|||
last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
|
||||
RX_MSDU_END_INFO0_LAST_MSDU;
|
||||
|
||||
tsf = __le32_to_cpu(rx_desc->ppdu_end.tsf_timestamp);
|
||||
trace_ath10k_htt_rx_desc(ar, tsf, &rx_desc->attention,
|
||||
trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
|
||||
sizeof(*rx_desc) - sizeof(u32));
|
||||
if (last_msdu) {
|
||||
msdu->next = NULL;
|
||||
|
@ -499,6 +493,8 @@ int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
|
|||
size_t size;
|
||||
struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
|
||||
|
||||
htt->rx_confused = false;
|
||||
|
||||
htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
|
||||
if (!is_power_of_2(htt->rx_ring.size)) {
|
||||
ath10k_warn(ar, "htt rx ring size is not power of 2\n");
|
||||
|
@ -588,41 +584,47 @@ static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
|
|||
enum htt_rx_mpdu_encrypt_type type)
|
||||
{
|
||||
switch (type) {
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP40:
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP104:
|
||||
return 4;
|
||||
case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
|
||||
case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
|
||||
case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
|
||||
case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
|
||||
return 8;
|
||||
case HTT_RX_MPDU_ENCRYPT_NONE:
|
||||
return 0;
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP40:
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP104:
|
||||
return IEEE80211_WEP_IV_LEN;
|
||||
case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
|
||||
case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
|
||||
return IEEE80211_TKIP_IV_LEN;
|
||||
case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
|
||||
return IEEE80211_CCMP_HDR_LEN;
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP128:
|
||||
case HTT_RX_MPDU_ENCRYPT_WAPI:
|
||||
break;
|
||||
}
|
||||
|
||||
ath10k_warn(ar, "unknown encryption type %d\n", type);
|
||||
ath10k_warn(ar, "unsupported encryption type %d\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define MICHAEL_MIC_LEN 8
|
||||
|
||||
static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
|
||||
enum htt_rx_mpdu_encrypt_type type)
|
||||
{
|
||||
switch (type) {
|
||||
case HTT_RX_MPDU_ENCRYPT_NONE:
|
||||
return 0;
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP40:
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP104:
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP128:
|
||||
case HTT_RX_MPDU_ENCRYPT_WAPI:
|
||||
return 0;
|
||||
return IEEE80211_WEP_ICV_LEN;
|
||||
case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
|
||||
case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
|
||||
return 4;
|
||||
return IEEE80211_TKIP_ICV_LEN;
|
||||
case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
|
||||
return 8;
|
||||
return IEEE80211_CCMP_MIC_LEN;
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP128:
|
||||
case HTT_RX_MPDU_ENCRYPT_WAPI:
|
||||
break;
|
||||
}
|
||||
|
||||
ath10k_warn(ar, "unknown encryption type %d\n", type);
|
||||
ath10k_warn(ar, "unsupported encryption type %d\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -899,6 +901,8 @@ static void ath10k_process_rx(struct ath10k *ar,
|
|||
!!(status->flag & RX_FLAG_AMSDU_MORE));
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
|
||||
skb->data, skb->len);
|
||||
trace_ath10k_rx_hdr(ar, skb->data, skb->len);
|
||||
trace_ath10k_rx_payload(ar, skb->data, skb->len);
|
||||
|
||||
ieee80211_rx(ar->hw, skb);
|
||||
}
|
||||
|
@ -1176,7 +1180,6 @@ static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
|
|||
|
||||
static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
|
||||
struct sk_buff *head,
|
||||
enum htt_rx_mpdu_status status,
|
||||
bool channel_set,
|
||||
u32 attention)
|
||||
{
|
||||
|
@ -1200,22 +1203,11 @@ static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
|
|||
}
|
||||
|
||||
/* Skip mgmt frames while we handle this in WMI */
|
||||
if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
|
||||
attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
|
||||
if (attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (status != HTT_RX_IND_MPDU_STATUS_OK &&
|
||||
status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
|
||||
status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
|
||||
!htt->ar->monitor_started) {
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx ignoring frame w/ status %d\n",
|
||||
status);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx CAC running\n");
|
||||
|
@ -1231,8 +1223,6 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
|||
struct ath10k *ar = htt->ar;
|
||||
struct ieee80211_rx_status *rx_status = &htt->rx_status;
|
||||
struct htt_rx_indication_mpdu_range *mpdu_ranges;
|
||||
struct htt_rx_desc *rxd;
|
||||
enum htt_rx_mpdu_status status;
|
||||
struct ieee80211_hdr *hdr;
|
||||
int num_mpdu_ranges;
|
||||
u32 attention;
|
||||
|
@ -1280,8 +1270,6 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
|||
num_mpdu_ranges));
|
||||
|
||||
for (i = 0; i < num_mpdu_ranges; i++) {
|
||||
status = mpdu_ranges[i].mpdu_range_status;
|
||||
|
||||
for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
|
||||
struct sk_buff *msdu_head, *msdu_tail;
|
||||
|
||||
|
@ -1302,12 +1290,7 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
|||
continue;
|
||||
}
|
||||
|
||||
rxd = container_of((void *)msdu_head->data,
|
||||
struct htt_rx_desc,
|
||||
msdu_payload);
|
||||
|
||||
if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
|
||||
status,
|
||||
channel_set,
|
||||
attention)) {
|
||||
ath10k_htt_rx_free_msdu_chain(msdu_head);
|
||||
|
@ -1372,6 +1355,8 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
|||
&attention);
|
||||
spin_unlock_bh(&htt->rx_ring.lock);
|
||||
|
||||
tasklet_schedule(&htt->rx_replenish_task);
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
|
||||
|
||||
if (ret) {
|
||||
|
@ -1433,7 +1418,7 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
|||
/* last fragment of TKIP frags has MIC */
|
||||
if (!ieee80211_has_morefrags(hdr->frame_control) &&
|
||||
enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
|
||||
trim += 8;
|
||||
trim += MICHAEL_MIC_LEN;
|
||||
|
||||
if (trim > msdu_head->len) {
|
||||
ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
|
||||
|
|
|
@ -92,7 +92,6 @@ int ath10k_htt_tx_alloc(struct ath10k_htt *htt)
|
|||
struct ath10k *ar = htt->ar;
|
||||
|
||||
spin_lock_init(&htt->tx_lock);
|
||||
init_waitqueue_head(&htt->empty_tx_wq);
|
||||
|
||||
if (test_bit(ATH10K_FW_FEATURE_WMI_10X, htt->ar->fw_features))
|
||||
htt->max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
|
||||
|
@ -564,7 +563,8 @@ int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
|
|||
(u32)skb_cb->paddr, vdev_id, tid);
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt tx msdu: ",
|
||||
msdu->data, msdu->len);
|
||||
trace_ath10k_htt_tx_msdu(ar, msdu->data, msdu->len);
|
||||
trace_ath10k_tx_hdr(ar, msdu->data, msdu->len);
|
||||
trace_ath10k_tx_payload(ar, msdu->data, msdu->len);
|
||||
|
||||
sg_items[0].transfer_id = 0;
|
||||
sg_items[0].transfer_context = NULL;
|
||||
|
|
|
@ -519,6 +519,9 @@ static inline int ath10k_vdev_setup_sync(struct ath10k *ar)
|
|||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
|
||||
if (test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
|
||||
return -ESHUTDOWN;
|
||||
|
||||
ret = wait_for_completion_timeout(&ar->vdev_setup_done,
|
||||
ATH10K_VDEV_SETUP_TIMEOUT_HZ);
|
||||
if (ret == 0)
|
||||
|
@ -551,6 +554,8 @@ static int ath10k_monitor_vdev_start(struct ath10k *ar, int vdev_id)
|
|||
arg.channel.max_reg_power = channel->max_reg_power * 2;
|
||||
arg.channel.max_antenna_gain = channel->max_antenna_gain * 2;
|
||||
|
||||
reinit_completion(&ar->vdev_setup_done);
|
||||
|
||||
ret = ath10k_wmi_vdev_start(ar, &arg);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to request monitor vdev %i start: %d\n",
|
||||
|
@ -598,6 +603,8 @@ static int ath10k_monitor_vdev_stop(struct ath10k *ar)
|
|||
ath10k_warn(ar, "failed to put down monitor vdev %i: %d\n",
|
||||
ar->monitor_vdev_id, ret);
|
||||
|
||||
reinit_completion(&ar->vdev_setup_done);
|
||||
|
||||
ret = ath10k_wmi_vdev_stop(ar, ar->monitor_vdev_id);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to to request monitor vdev %i stop: %d\n",
|
||||
|
@ -2350,7 +2357,7 @@ static void ath10k_tx(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
/* Must not be called with conf_mutex held as workers can use that also. */
|
||||
static void ath10k_drain_tx(struct ath10k *ar)
|
||||
void ath10k_drain_tx(struct ath10k *ar)
|
||||
{
|
||||
/* make sure rcu-protected mac80211 tx path itself is drained */
|
||||
synchronize_net();
|
||||
|
@ -3307,9 +3314,10 @@ static void ath10k_cancel_hw_scan(struct ieee80211_hw *hw,
|
|||
struct ath10k *ar = hw->priv;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
cancel_delayed_work_sync(&ar->scan.timeout);
|
||||
ath10k_scan_abort(ar);
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
|
||||
cancel_delayed_work_sync(&ar->scan.timeout);
|
||||
}
|
||||
|
||||
static void ath10k_set_key_h_def_keyidx(struct ath10k *ar,
|
||||
|
@ -3826,10 +3834,11 @@ static int ath10k_cancel_remain_on_channel(struct ieee80211_hw *hw)
|
|||
struct ath10k *ar = hw->priv;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
cancel_delayed_work_sync(&ar->scan.timeout);
|
||||
ath10k_scan_abort(ar);
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
|
||||
cancel_delayed_work_sync(&ar->scan.timeout);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3872,7 +3881,7 @@ static int ath10k_set_frag_threshold(struct ieee80211_hw *hw, u32 value)
|
|||
ath10k_dbg(ar, ATH10K_DBG_MAC, "mac vdev %d fragmentation threshold %d\n",
|
||||
arvif->vdev_id, value);
|
||||
|
||||
ret = ath10k_mac_set_rts(arvif, value);
|
||||
ret = ath10k_mac_set_frag(arvif, value);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to set fragmentation threshold for vdev %d: %d\n",
|
||||
arvif->vdev_id, ret);
|
||||
|
@ -3908,7 +3917,9 @@ static void ath10k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
empty = (ar->htt.num_pending_tx == 0);
|
||||
spin_unlock_bh(&ar->htt.tx_lock);
|
||||
|
||||
skip = (ar->state == ATH10K_STATE_WEDGED);
|
||||
skip = (ar->state == ATH10K_STATE_WEDGED) ||
|
||||
test_bit(ATH10K_FLAG_CRASH_FLUSH,
|
||||
&ar->dev_flags);
|
||||
|
||||
(empty || skip);
|
||||
}), ATH10K_FLUSH_TIMEOUT_HZ);
|
||||
|
@ -4009,6 +4020,7 @@ static void ath10k_reconfig_complete(struct ieee80211_hw *hw,
|
|||
if (ar->state == ATH10K_STATE_RESTARTED) {
|
||||
ath10k_info(ar, "device successfully recovered\n");
|
||||
ar->state = ATH10K_STATE_ON;
|
||||
ieee80211_wake_queues(ar->hw);
|
||||
}
|
||||
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
|
@ -4044,6 +4056,9 @@ static int ath10k_get_survey(struct ieee80211_hw *hw, int idx,
|
|||
|
||||
survey->channel = &sband->channels[idx];
|
||||
|
||||
if (ar->rx_channel == survey->channel)
|
||||
survey->filled |= SURVEY_INFO_IN_USE;
|
||||
|
||||
exit:
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
return ret;
|
||||
|
@ -4917,6 +4932,8 @@ int ath10k_mac_register(struct ath10k *ar)
|
|||
ar->hw->wiphy->max_remain_on_channel_duration = 5000;
|
||||
|
||||
ar->hw->wiphy->flags |= WIPHY_FLAG_AP_UAPSD;
|
||||
ar->hw->wiphy->features |= NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE;
|
||||
|
||||
/*
|
||||
* on LL hardware queues are managed entirely by the FW
|
||||
* so we only advertise to mac we can do the queues thing
|
||||
|
|
|
@ -40,6 +40,7 @@ void ath10k_mgmt_over_wmi_tx_purge(struct ath10k *ar);
|
|||
void ath10k_mgmt_over_wmi_tx_work(struct work_struct *work);
|
||||
void ath10k_halt(struct ath10k *ar);
|
||||
void ath10k_mac_vif_beacon_free(struct ath10k_vif *arvif);
|
||||
void ath10k_drain_tx(struct ath10k *ar);
|
||||
|
||||
static inline struct ath10k_vif *ath10k_vif_to_arvif(struct ieee80211_vif *vif)
|
||||
{
|
||||
|
|
|
@ -1196,64 +1196,74 @@ static int ath10k_pci_hif_start(struct ath10k *ar)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void ath10k_pci_rx_pipe_cleanup(struct ath10k_pci_pipe *pipe_info)
|
||||
static void ath10k_pci_rx_pipe_cleanup(struct ath10k_pci_pipe *pci_pipe)
|
||||
{
|
||||
struct ath10k *ar;
|
||||
struct ath10k_pci *ar_pci;
|
||||
struct ath10k_ce_pipe *ce_hdl;
|
||||
u32 buf_sz;
|
||||
struct sk_buff *netbuf;
|
||||
u32 ce_data;
|
||||
struct ath10k_ce_pipe *ce_pipe;
|
||||
struct ath10k_ce_ring *ce_ring;
|
||||
struct sk_buff *skb;
|
||||
int i;
|
||||
|
||||
buf_sz = pipe_info->buf_sz;
|
||||
ar = pci_pipe->hif_ce_state;
|
||||
ce_pipe = pci_pipe->ce_hdl;
|
||||
ce_ring = ce_pipe->dest_ring;
|
||||
|
||||
/* Unused Copy Engine */
|
||||
if (buf_sz == 0)
|
||||
if (!ce_ring)
|
||||
return;
|
||||
|
||||
ar = pipe_info->hif_ce_state;
|
||||
ar_pci = ath10k_pci_priv(ar);
|
||||
ce_hdl = pipe_info->ce_hdl;
|
||||
if (!pci_pipe->buf_sz)
|
||||
return;
|
||||
|
||||
while (ath10k_ce_revoke_recv_next(ce_hdl, (void **)&netbuf,
|
||||
&ce_data) == 0) {
|
||||
dma_unmap_single(ar->dev, ATH10K_SKB_CB(netbuf)->paddr,
|
||||
netbuf->len + skb_tailroom(netbuf),
|
||||
for (i = 0; i < ce_ring->nentries; i++) {
|
||||
skb = ce_ring->per_transfer_context[i];
|
||||
if (!skb)
|
||||
continue;
|
||||
|
||||
ce_ring->per_transfer_context[i] = NULL;
|
||||
|
||||
dma_unmap_single(ar->dev, ATH10K_SKB_CB(skb)->paddr,
|
||||
skb->len + skb_tailroom(skb),
|
||||
DMA_FROM_DEVICE);
|
||||
dev_kfree_skb_any(netbuf);
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath10k_pci_tx_pipe_cleanup(struct ath10k_pci_pipe *pipe_info)
|
||||
static void ath10k_pci_tx_pipe_cleanup(struct ath10k_pci_pipe *pci_pipe)
|
||||
{
|
||||
struct ath10k *ar;
|
||||
struct ath10k_pci *ar_pci;
|
||||
struct ath10k_ce_pipe *ce_hdl;
|
||||
struct sk_buff *netbuf;
|
||||
u32 ce_data;
|
||||
unsigned int nbytes;
|
||||
struct ath10k_ce_pipe *ce_pipe;
|
||||
struct ath10k_ce_ring *ce_ring;
|
||||
struct ce_desc *ce_desc;
|
||||
struct sk_buff *skb;
|
||||
unsigned int id;
|
||||
u32 buf_sz;
|
||||
int i;
|
||||
|
||||
buf_sz = pipe_info->buf_sz;
|
||||
ar = pci_pipe->hif_ce_state;
|
||||
ar_pci = ath10k_pci_priv(ar);
|
||||
ce_pipe = pci_pipe->ce_hdl;
|
||||
ce_ring = ce_pipe->src_ring;
|
||||
|
||||
/* Unused Copy Engine */
|
||||
if (buf_sz == 0)
|
||||
if (!ce_ring)
|
||||
return;
|
||||
|
||||
ar = pipe_info->hif_ce_state;
|
||||
ar_pci = ath10k_pci_priv(ar);
|
||||
ce_hdl = pipe_info->ce_hdl;
|
||||
if (!pci_pipe->buf_sz)
|
||||
return;
|
||||
|
||||
while (ath10k_ce_cancel_send_next(ce_hdl, (void **)&netbuf,
|
||||
&ce_data, &nbytes, &id) == 0) {
|
||||
/* no need to call tx completion for NULL pointers */
|
||||
if (!netbuf)
|
||||
ce_desc = ce_ring->shadow_base;
|
||||
if (WARN_ON(!ce_desc))
|
||||
return;
|
||||
|
||||
for (i = 0; i < ce_ring->nentries; i++) {
|
||||
skb = ce_ring->per_transfer_context[i];
|
||||
if (!skb)
|
||||
continue;
|
||||
|
||||
ar_pci->msg_callbacks_current.tx_completion(ar,
|
||||
netbuf,
|
||||
id);
|
||||
ce_ring->per_transfer_context[i] = NULL;
|
||||
id = MS(__le16_to_cpu(ce_desc[i].flags),
|
||||
CE_DESC_FLAGS_META_DATA);
|
||||
|
||||
ar_pci->msg_callbacks_current.tx_completion(ar, skb, id);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1432,6 +1442,9 @@ static void ath10k_pci_bmi_recv_data(struct ath10k_ce_pipe *ce_state)
|
|||
&nbytes, &transfer_id, &flags))
|
||||
return;
|
||||
|
||||
if (WARN_ON_ONCE(!xfer))
|
||||
return;
|
||||
|
||||
if (!xfer->wait_for_resp) {
|
||||
ath10k_warn(ar, "unexpected: BMI data received; ignoring\n");
|
||||
return;
|
||||
|
@ -1707,99 +1720,167 @@ static void ath10k_pci_warm_reset_si0(struct ath10k *ar)
|
|||
msleep(10);
|
||||
}
|
||||
|
||||
static int ath10k_pci_warm_reset(struct ath10k *ar)
|
||||
static void ath10k_pci_warm_reset_cpu(struct ath10k *ar)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset\n");
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
|
||||
ar->stats.fw_warm_reset_counter++;
|
||||
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
/* debug */
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
PCIE_INTR_CAUSE_ADDRESS);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot host cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
CPU_INTR_ADDRESS);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
/* disable pending irqs */
|
||||
ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
PCIE_INTR_ENABLE_ADDRESS, 0);
|
||||
|
||||
ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
PCIE_INTR_CLR_ADDRESS, ~0);
|
||||
|
||||
msleep(100);
|
||||
|
||||
/* clear fw indicator */
|
||||
ath10k_pci_write32(ar, FW_INDICATOR_ADDRESS, 0);
|
||||
|
||||
/* clear target LF timer interrupts */
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS,
|
||||
val | SOC_RESET_CONTROL_CPU_WARM_RST_MASK);
|
||||
}
|
||||
|
||||
static void ath10k_pci_warm_reset_ce(struct ath10k *ar)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS,
|
||||
val | SOC_RESET_CONTROL_CE_RST_MASK);
|
||||
msleep(10);
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS,
|
||||
val & ~SOC_RESET_CONTROL_CE_RST_MASK);
|
||||
}
|
||||
|
||||
static void ath10k_pci_warm_reset_clear_lf(struct ath10k *ar)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_LF_TIMER_CONTROL0_ADDRESS);
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_LF_TIMER_CONTROL0_ADDRESS,
|
||||
val & ~SOC_LF_TIMER_CONTROL0_ENABLE_MASK);
|
||||
}
|
||||
|
||||
/* reset CE */
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS,
|
||||
val | SOC_RESET_CONTROL_CE_RST_MASK);
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
msleep(10);
|
||||
static int ath10k_pci_warm_reset(struct ath10k *ar)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* unreset CE */
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS,
|
||||
val & ~SOC_RESET_CONTROL_CE_RST_MASK);
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
msleep(10);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset\n");
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ar->stats.fw_warm_reset_counter++;
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
ath10k_pci_irq_disable(ar);
|
||||
|
||||
/* Make sure the target CPU is not doing anything dangerous, e.g. if it
|
||||
* were to access copy engine while host performs copy engine reset
|
||||
* then it is possible for the device to confuse pci-e controller to
|
||||
* the point of bringing host system to a complete stop (i.e. hang).
|
||||
*/
|
||||
ath10k_pci_warm_reset_si0(ar);
|
||||
ath10k_pci_warm_reset_cpu(ar);
|
||||
ath10k_pci_init_pipes(ar);
|
||||
ath10k_pci_wait_for_target_init(ar);
|
||||
|
||||
/* debug */
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
PCIE_INTR_CAUSE_ADDRESS);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot host cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
ath10k_pci_warm_reset_clear_lf(ar);
|
||||
ath10k_pci_warm_reset_ce(ar);
|
||||
ath10k_pci_warm_reset_cpu(ar);
|
||||
ath10k_pci_init_pipes(ar);
|
||||
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
CPU_INTR_ADDRESS);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
/* CPU warm reset */
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + SOC_RESET_CONTROL_ADDRESS,
|
||||
val | SOC_RESET_CONTROL_CPU_WARM_RST_MASK);
|
||||
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target reset state: 0x%08x\n",
|
||||
val);
|
||||
|
||||
msleep(100);
|
||||
ret = ath10k_pci_wait_for_target_init(ar);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to wait for target init: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset complete\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __ath10k_pci_hif_power_up(struct ath10k *ar, bool cold_reset)
|
||||
static int ath10k_pci_chip_reset(struct ath10k *ar)
|
||||
{
|
||||
int i, ret;
|
||||
u32 val;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip reset\n");
|
||||
|
||||
/* Some hardware revisions (e.g. CUS223v2) has issues with cold reset.
|
||||
* It is thus preferred to use warm reset which is safer but may not be
|
||||
* able to recover the device from all possible fail scenarios.
|
||||
*
|
||||
* Warm reset doesn't always work on first try so attempt it a few
|
||||
* times before giving up.
|
||||
*/
|
||||
for (i = 0; i < ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS; i++) {
|
||||
ret = ath10k_pci_warm_reset(ar);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to warm reset attempt %d of %d: %d\n",
|
||||
i + 1, ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS,
|
||||
ret);
|
||||
continue;
|
||||
}
|
||||
|
||||
/* FIXME: Sometimes copy engine doesn't recover after warm
|
||||
* reset. In most cases this needs cold reset. In some of these
|
||||
* cases the device is in such a state that a cold reset may
|
||||
* lock up the host.
|
||||
*
|
||||
* Reading any host interest register via copy engine is
|
||||
* sufficient to verify if device is capable of booting
|
||||
* firmware blob.
|
||||
*/
|
||||
ret = ath10k_pci_init_pipes(ar);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to init copy engine: %d\n",
|
||||
ret);
|
||||
continue;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_diag_read32(ar, QCA988X_HOST_INTEREST_ADDRESS,
|
||||
&val);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to poke copy engine: %d\n",
|
||||
ret);
|
||||
continue;
|
||||
}
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip reset complete (warm)\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (ath10k_pci_reset_mode == ATH10K_PCI_RESET_WARM_ONLY) {
|
||||
ath10k_warn(ar, "refusing cold reset as requested\n");
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_cold_reset(ar);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to cold reset: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_wait_for_target_init(ar);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to wait for target after cold reset: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip reset complete (cold)\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_pci_hif_power_up(struct ath10k *ar)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n");
|
||||
|
||||
ret = ath10k_pci_wake(ar);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to wake up target: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Bring the target up cleanly.
|
||||
*
|
||||
|
@ -1810,26 +1891,16 @@ static int __ath10k_pci_hif_power_up(struct ath10k *ar, bool cold_reset)
|
|||
* is in an unexpected state. We try to catch that here in order to
|
||||
* reset the Target and retry the probe.
|
||||
*/
|
||||
if (cold_reset)
|
||||
ret = ath10k_pci_cold_reset(ar);
|
||||
else
|
||||
ret = ath10k_pci_warm_reset(ar);
|
||||
|
||||
ret = ath10k_pci_chip_reset(ar);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to reset target: %d\n", ret);
|
||||
goto err;
|
||||
ath10k_err(ar, "failed to reset chip: %d\n", ret);
|
||||
goto err_sleep;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_init_pipes(ar);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to initialize CE: %d\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_wait_for_target_init(ar);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to wait for target to init: %d\n", ret);
|
||||
goto err_ce;
|
||||
goto err_sleep;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_init_config(ar);
|
||||
|
@ -1848,73 +1919,21 @@ static int __ath10k_pci_hif_power_up(struct ath10k *ar, bool cold_reset)
|
|||
|
||||
err_ce:
|
||||
ath10k_pci_ce_deinit(ar);
|
||||
ath10k_pci_warm_reset(ar);
|
||||
err:
|
||||
|
||||
err_sleep:
|
||||
ath10k_pci_sleep(ar);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath10k_pci_hif_power_up_warm(struct ath10k *ar)
|
||||
{
|
||||
int i, ret;
|
||||
|
||||
/*
|
||||
* Sometime warm reset succeeds after retries.
|
||||
*
|
||||
* FIXME: It might be possible to tune ath10k_pci_warm_reset() to work
|
||||
* at first try.
|
||||
*/
|
||||
for (i = 0; i < ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS; i++) {
|
||||
ret = __ath10k_pci_hif_power_up(ar, false);
|
||||
if (ret == 0)
|
||||
break;
|
||||
|
||||
ath10k_warn(ar, "failed to warm reset (attempt %d out of %d): %d\n",
|
||||
i + 1, ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS, ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath10k_pci_hif_power_up(struct ath10k *ar)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n");
|
||||
|
||||
/*
|
||||
* Hardware CUS232 version 2 has some issues with cold reset and the
|
||||
* preferred (and safer) way to perform a device reset is through a
|
||||
* warm reset.
|
||||
*
|
||||
* Warm reset doesn't always work though so fall back to cold reset may
|
||||
* be necessary.
|
||||
*/
|
||||
ret = ath10k_pci_hif_power_up_warm(ar);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to power up target using warm reset: %d\n",
|
||||
ret);
|
||||
|
||||
if (ath10k_pci_reset_mode == ATH10K_PCI_RESET_WARM_ONLY)
|
||||
return ret;
|
||||
|
||||
ath10k_warn(ar, "trying cold reset\n");
|
||||
|
||||
ret = __ath10k_pci_hif_power_up(ar, true);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to power up target using cold reset too (%d)\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ath10k_pci_hif_power_down(struct ath10k *ar)
|
||||
{
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power down\n");
|
||||
|
||||
ath10k_pci_warm_reset(ar);
|
||||
/* Currently hif_power_up performs effectively a reset and hif_stop
|
||||
* resets the chip as well so there's no point in resetting here.
|
||||
*/
|
||||
|
||||
ath10k_pci_sleep(ar);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
@ -2516,6 +2535,8 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
|||
goto err_deinit_irq;
|
||||
}
|
||||
|
||||
ath10k_pci_sleep(ar);
|
||||
|
||||
ret = ath10k_core_register(ar, chip_id);
|
||||
if (ret) {
|
||||
ath10k_err(ar, "failed to register driver core: %d\n", ret);
|
||||
|
@ -2567,7 +2588,6 @@ static void ath10k_pci_remove(struct pci_dev *pdev)
|
|||
ath10k_pci_deinit_irq(ar);
|
||||
ath10k_pci_ce_deinit(ar);
|
||||
ath10k_pci_free_pipes(ar);
|
||||
ath10k_pci_sleep(ar);
|
||||
ath10k_pci_release(ar);
|
||||
ath10k_core_destroy(ar);
|
||||
}
|
||||
|
|
|
@ -20,6 +20,13 @@
|
|||
#include <linux/tracepoint.h>
|
||||
#include "core.h"
|
||||
|
||||
#if !defined(_TRACE_H_)
|
||||
static inline u32 ath10k_frm_hdr_len(void *buf)
|
||||
{
|
||||
return ieee80211_hdrlen(((struct ieee80211_hdr *)buf)->frame_control);
|
||||
}
|
||||
#endif
|
||||
|
||||
#define _TRACE_H_
|
||||
|
||||
/* create empty functions when tracing is disabled */
|
||||
|
@ -281,36 +288,6 @@ TRACE_EVENT(ath10k_htt_pktlog,
|
|||
)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath10k_htt_rx_desc,
|
||||
TP_PROTO(struct ath10k *ar, u32 tsf, void *rxdesc, u16 len),
|
||||
|
||||
TP_ARGS(ar, tsf, rxdesc, len),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ar->dev))
|
||||
__string(driver, dev_driver_string(ar->dev))
|
||||
__field(u32, tsf)
|
||||
__field(u16, len)
|
||||
__dynamic_array(u8, rxdesc, len)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ar->dev));
|
||||
__assign_str(driver, dev_driver_string(ar->dev));
|
||||
__entry->tsf = tsf;
|
||||
__entry->len = len;
|
||||
memcpy(__get_dynamic_array(rxdesc), rxdesc, len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s %u len %hu",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__entry->tsf,
|
||||
__entry->len
|
||||
)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath10k_htt_tx,
|
||||
TP_PROTO(struct ath10k *ar, u16 msdu_id, u16 msdu_len,
|
||||
u8 vdev_id, u8 tid),
|
||||
|
@ -371,7 +348,7 @@ TRACE_EVENT(ath10k_txrx_tx_unref,
|
|||
)
|
||||
);
|
||||
|
||||
DECLARE_EVENT_CLASS(ath10k_data_event,
|
||||
DECLARE_EVENT_CLASS(ath10k_hdr_event,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
|
||||
TP_ARGS(ar, data, len),
|
||||
|
@ -380,14 +357,14 @@ DECLARE_EVENT_CLASS(ath10k_data_event,
|
|||
__string(device, dev_name(ar->dev))
|
||||
__string(driver, dev_driver_string(ar->dev))
|
||||
__field(size_t, len)
|
||||
__dynamic_array(u8, data, len)
|
||||
__dynamic_array(u8, data, ath10k_frm_hdr_len(data))
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ar->dev));
|
||||
__assign_str(driver, dev_driver_string(ar->dev));
|
||||
__entry->len = len;
|
||||
memcpy(__get_dynamic_array(data), data, len);
|
||||
__entry->len = ath10k_frm_hdr_len(data);
|
||||
memcpy(__get_dynamic_array(data), data, __entry->len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
|
@ -398,25 +375,81 @@ DECLARE_EVENT_CLASS(ath10k_data_event,
|
|||
)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath10k_data_event, ath10k_htt_tx_msdu,
|
||||
DECLARE_EVENT_CLASS(ath10k_payload_event,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
|
||||
TP_ARGS(ar, data, len),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ar->dev))
|
||||
__string(driver, dev_driver_string(ar->dev))
|
||||
__field(size_t, len)
|
||||
__dynamic_array(u8, payload, (len - ath10k_frm_hdr_len(data)))
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ar->dev));
|
||||
__assign_str(driver, dev_driver_string(ar->dev));
|
||||
__entry->len = len - ath10k_frm_hdr_len(data);
|
||||
memcpy(__get_dynamic_array(payload),
|
||||
data + ath10k_frm_hdr_len(data), __entry->len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s len %zu\n",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__entry->len
|
||||
)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath10k_hdr_event, ath10k_tx_hdr,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
TP_ARGS(ar, data, len)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath10k_data_event, ath10k_htt_rx_pop_msdu,
|
||||
DEFINE_EVENT(ath10k_payload_event, ath10k_tx_payload,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
TP_ARGS(ar, data, len)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath10k_data_event, ath10k_wmi_mgmt_tx,
|
||||
DEFINE_EVENT(ath10k_hdr_event, ath10k_rx_hdr,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
TP_ARGS(ar, data, len)
|
||||
);
|
||||
|
||||
DEFINE_EVENT(ath10k_data_event, ath10k_wmi_bcn_tx,
|
||||
DEFINE_EVENT(ath10k_payload_event, ath10k_rx_payload,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
TP_ARGS(ar, data, len)
|
||||
);
|
||||
|
||||
TRACE_EVENT(ath10k_htt_rx_desc,
|
||||
TP_PROTO(struct ath10k *ar, void *data, size_t len),
|
||||
|
||||
TP_ARGS(ar, data, len),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__string(device, dev_name(ar->dev))
|
||||
__string(driver, dev_driver_string(ar->dev))
|
||||
__field(u16, len)
|
||||
__dynamic_array(u8, rxdesc, len)
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__assign_str(device, dev_name(ar->dev));
|
||||
__assign_str(driver, dev_driver_string(ar->dev));
|
||||
__entry->len = len;
|
||||
memcpy(__get_dynamic_array(rxdesc), data, len);
|
||||
),
|
||||
|
||||
TP_printk(
|
||||
"%s %s rxdesc len %d",
|
||||
__get_str(driver),
|
||||
__get_str(device),
|
||||
__entry->len
|
||||
)
|
||||
);
|
||||
|
||||
#endif /* _TRACE_H_ || TRACE_HEADER_MULTI_READ*/
|
||||
|
||||
/* we don't want to use include/trace/events */
|
||||
|
|
|
@ -146,7 +146,8 @@ static int ath10k_wait_for_peer_common(struct ath10k *ar, int vdev_id,
|
|||
mapped = !!ath10k_peer_find(ar, vdev_id, addr);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
mapped == expect_mapped;
|
||||
(mapped == expect_mapped ||
|
||||
test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags));
|
||||
}), 3*HZ);
|
||||
|
||||
if (ret <= 0)
|
||||
|
|
|
@ -779,6 +779,10 @@ int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
|
|||
ath10k_wmi_tx_beacons_nowait(ar);
|
||||
|
||||
ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
|
||||
|
||||
if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
|
||||
ret = -ESHUTDOWN;
|
||||
|
||||
(ret != -EAGAIN);
|
||||
}), 3*HZ);
|
||||
|
||||
|
@ -834,7 +838,8 @@ int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
|
|||
ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
|
||||
wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
|
||||
fc & IEEE80211_FCTL_STYPE);
|
||||
trace_ath10k_wmi_mgmt_tx(ar, skb->data, skb->len);
|
||||
trace_ath10k_tx_hdr(ar, skb->data, skb->len);
|
||||
trace_ath10k_tx_payload(ar, skb->data, skb->len);
|
||||
|
||||
/* Send the management frame buffer to the target */
|
||||
ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
|
||||
|
@ -1893,7 +1898,9 @@ static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
|
|||
arvif->beacon = bcn;
|
||||
arvif->beacon_sent = false;
|
||||
|
||||
trace_ath10k_wmi_bcn_tx(ar, bcn->data, bcn->len);
|
||||
trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
|
||||
trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
|
||||
|
||||
ath10k_wmi_tx_beacon_nowait(arvif);
|
||||
skip:
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
@ -4187,9 +4194,9 @@ int ath10k_wmi_peer_assoc(struct ath10k *ar,
|
|||
|
||||
if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
|
||||
if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
|
||||
ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
|
||||
else
|
||||
ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
|
||||
else
|
||||
ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
|
||||
} else {
|
||||
ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
|
||||
}
|
||||
|
@ -4398,7 +4405,6 @@ int ath10k_wmi_attach(struct ath10k *ar)
|
|||
|
||||
init_completion(&ar->wmi.service_ready);
|
||||
init_completion(&ar->wmi.unified_ready);
|
||||
init_waitqueue_head(&ar->wmi.tx_credits_wq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -547,7 +547,9 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
|||
|
||||
|
||||
static void
|
||||
ath5k_sw_scan_start(struct ieee80211_hw *hw)
|
||||
ath5k_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct ath5k_hw *ah = hw->priv;
|
||||
if (!ah->assoc)
|
||||
|
@ -556,7 +558,7 @@ ath5k_sw_scan_start(struct ieee80211_hw *hw)
|
|||
|
||||
|
||||
static void
|
||||
ath5k_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
ath5k_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
|
||||
{
|
||||
struct ath5k_hw *ah = hw->priv;
|
||||
ath5k_hw_set_ledstate(ah, ah->assoc ?
|
||||
|
|
|
@ -1193,18 +1193,10 @@ static int ath6kl_usb_pm_resume(struct usb_interface *interface)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_pm_reset_resume(struct usb_interface *intf)
|
||||
{
|
||||
if (usb_get_intfdata(intf))
|
||||
ath6kl_usb_remove(intf);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define ath6kl_usb_pm_suspend NULL
|
||||
#define ath6kl_usb_pm_resume NULL
|
||||
#define ath6kl_usb_pm_reset_resume NULL
|
||||
|
||||
#endif
|
||||
|
||||
|
@ -1222,7 +1214,6 @@ static struct usb_driver ath6kl_usb_driver = {
|
|||
.probe = ath6kl_usb_probe,
|
||||
.suspend = ath6kl_usb_pm_suspend,
|
||||
.resume = ath6kl_usb_pm_resume,
|
||||
.reset_resume = ath6kl_usb_pm_reset_resume,
|
||||
.disconnect = ath6kl_usb_remove,
|
||||
.id_table = ath6kl_usb_ids,
|
||||
.supports_autosuspend = true,
|
||||
|
|
|
@ -3,6 +3,8 @@ config ATH9K_HW
|
|||
config ATH9K_COMMON
|
||||
tristate
|
||||
select ATH_COMMON
|
||||
select DEBUG_FS
|
||||
select RELAY
|
||||
config ATH9K_DFS_DEBUGFS
|
||||
def_bool y
|
||||
depends on ATH9K_DEBUGFS && ATH9K_DFS_CERTIFIED
|
||||
|
|
|
@ -16,8 +16,7 @@ ath9k-$(CONFIG_ATH9K_DFS_CERTIFIED) += dfs.o
|
|||
ath9k-$(CONFIG_ATH9K_TX99) += tx99.o
|
||||
ath9k-$(CONFIG_ATH9K_WOW) += wow.o
|
||||
|
||||
ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o \
|
||||
spectral.o
|
||||
ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o
|
||||
|
||||
ath9k-$(CONFIG_ATH9K_STATION_STATISTICS) += debug_sta.o
|
||||
|
||||
|
@ -59,7 +58,8 @@ obj-$(CONFIG_ATH9K_COMMON) += ath9k_common.o
|
|||
ath9k_common-y:= common.o \
|
||||
common-init.o \
|
||||
common-beacon.o \
|
||||
common-debug.o
|
||||
common-debug.o \
|
||||
common-spectral.o
|
||||
|
||||
ath9k_htc-y += htc_hst.o \
|
||||
hif_usb.o \
|
||||
|
|
|
@ -643,9 +643,12 @@ static void ar9002_hw_spectral_scan_config(struct ath_hw *ah,
|
|||
* and fix otherwise.
|
||||
*/
|
||||
count = param->count;
|
||||
if (param->endless)
|
||||
if (param->endless) {
|
||||
if (AR_SREV_9271(ah))
|
||||
count = 0;
|
||||
else
|
||||
count = 0x80;
|
||||
else if (count & 0x80)
|
||||
} else if (count & 0x80)
|
||||
count = 0x7f;
|
||||
|
||||
REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
|
||||
|
|
|
@ -4079,27 +4079,28 @@ static int ar9003_hw_get_thermometer(struct ath_hw *ah)
|
|||
|
||||
static void ar9003_hw_thermometer_apply(struct ath_hw *ah)
|
||||
{
|
||||
struct ath9k_hw_capabilities *pCap = &ah->caps;
|
||||
int thermometer = ar9003_hw_get_thermometer(ah);
|
||||
u8 therm_on = (thermometer < 0) ? 0 : 1;
|
||||
|
||||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4,
|
||||
AR_PHY_65NM_CH0_RXTX4_THERM_ON_OVR, therm_on);
|
||||
if (ah->caps.tx_chainmask & BIT(1))
|
||||
if (pCap->chip_chainmask & BIT(1))
|
||||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4,
|
||||
AR_PHY_65NM_CH0_RXTX4_THERM_ON_OVR, therm_on);
|
||||
if (ah->caps.tx_chainmask & BIT(2))
|
||||
if (pCap->chip_chainmask & BIT(2))
|
||||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4,
|
||||
AR_PHY_65NM_CH0_RXTX4_THERM_ON_OVR, therm_on);
|
||||
|
||||
therm_on = (thermometer < 0) ? 0 : (thermometer == 0);
|
||||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4,
|
||||
AR_PHY_65NM_CH0_RXTX4_THERM_ON, therm_on);
|
||||
if (ah->caps.tx_chainmask & BIT(1)) {
|
||||
if (pCap->chip_chainmask & BIT(1)) {
|
||||
therm_on = (thermometer < 0) ? 0 : (thermometer == 1);
|
||||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4,
|
||||
AR_PHY_65NM_CH0_RXTX4_THERM_ON, therm_on);
|
||||
}
|
||||
if (ah->caps.tx_chainmask & BIT(2)) {
|
||||
if (pCap->chip_chainmask & BIT(2)) {
|
||||
therm_on = (thermometer < 0) ? 0 : (thermometer == 2);
|
||||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4,
|
||||
AR_PHY_65NM_CH0_RXTX4_THERM_ON, therm_on);
|
||||
|
|
|
@ -333,12 +333,29 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
|
|||
qca953x_1p0_soc_preamble);
|
||||
INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
|
||||
qca953x_1p0_soc_postamble);
|
||||
|
||||
if (AR_SREV_9531_20(ah)) {
|
||||
INIT_INI_ARRAY(&ah->iniModesRxGain,
|
||||
qca953x_2p0_common_wo_xlna_rx_gain_table);
|
||||
INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
|
||||
qca953x_2p0_common_wo_xlna_rx_gain_bounds);
|
||||
} else {
|
||||
INIT_INI_ARRAY(&ah->iniModesRxGain,
|
||||
qca953x_1p0_common_wo_xlna_rx_gain_table);
|
||||
INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
|
||||
qca953x_1p0_common_wo_xlna_rx_gain_bounds);
|
||||
}
|
||||
|
||||
if (AR_SREV_9531_20(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_2p0_modes_no_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9531_11(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_1p1_modes_no_xpa_tx_gain_table);
|
||||
else
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_1p0_modes_no_xpa_tx_gain_table);
|
||||
|
||||
INIT_INI_ARRAY(&ah->iniModesFastClock,
|
||||
qca953x_1p0_modes_fast_clock);
|
||||
} else if (AR_SREV_9580(ah)) {
|
||||
|
@ -518,9 +535,15 @@ static void ar9003_tx_gain_table_mode0(struct ath_hw *ah)
|
|||
else if (AR_SREV_9550(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
ar955x_1p0_modes_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9531(ah))
|
||||
else if (AR_SREV_9531_10(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_1p0_modes_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9531_11(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_1p1_modes_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9531_20(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_2p0_modes_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9580(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
ar9580_1p0_lowest_ob_db_tx_gain_table);
|
||||
|
@ -562,7 +585,10 @@ static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
|
|||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
ar955x_1p0_modes_no_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9531(ah)) {
|
||||
if (AR_SREV_9531_11(ah))
|
||||
if (AR_SREV_9531_20(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_2p0_modes_no_xpa_tx_gain_table);
|
||||
else if (AR_SREV_9531_11(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesTxGain,
|
||||
qca953x_1p1_modes_no_xpa_tx_gain_table);
|
||||
else
|
||||
|
@ -789,11 +815,16 @@ static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
|
|||
ar955x_1p0_common_wo_xlna_rx_gain_table);
|
||||
INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
|
||||
ar955x_1p0_common_wo_xlna_rx_gain_bounds);
|
||||
} else if (AR_SREV_9531(ah)) {
|
||||
} else if (AR_SREV_9531_10(ah) || AR_SREV_9531_11(ah)) {
|
||||
INIT_INI_ARRAY(&ah->iniModesRxGain,
|
||||
qca953x_1p0_common_wo_xlna_rx_gain_table);
|
||||
INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
|
||||
qca953x_1p0_common_wo_xlna_rx_gain_bounds);
|
||||
} else if (AR_SREV_9531_20(ah)) {
|
||||
INIT_INI_ARRAY(&ah->iniModesRxGain,
|
||||
qca953x_2p0_common_wo_xlna_rx_gain_table);
|
||||
INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
|
||||
qca953x_2p0_common_wo_xlna_rx_gain_bounds);
|
||||
} else if (AR_SREV_9580(ah))
|
||||
INIT_INI_ARRAY(&ah->iniModesRxGain,
|
||||
ar9580_1p0_wo_xlna_rx_gain_table);
|
||||
|
|
|
@ -664,6 +664,19 @@ static void ar9003_hw_override_ini(struct ath_hw *ah)
|
|||
ah->enabled_cals |= TX_CL_CAL;
|
||||
else
|
||||
ah->enabled_cals &= ~TX_CL_CAL;
|
||||
|
||||
if (AR_SREV_9340(ah) || AR_SREV_9531(ah) || AR_SREV_9550(ah)) {
|
||||
if (ah->is_clk_25mhz) {
|
||||
REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
|
||||
REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
|
||||
REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae);
|
||||
} else {
|
||||
REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1);
|
||||
REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400);
|
||||
REG_WRITE(ah, AR_SLP32_INC, 0x0001e800);
|
||||
}
|
||||
udelay(100);
|
||||
}
|
||||
}
|
||||
|
||||
static void ar9003_hw_prog_ini(struct ath_hw *ah,
|
||||
|
|
|
@ -20,6 +20,8 @@
|
|||
|
||||
#define qca953x_1p0_mac_postamble ar9300_2p2_mac_postamble
|
||||
|
||||
#define qca953x_1p0_soc_preamble ar955x_1p0_soc_preamble
|
||||
|
||||
#define qca953x_1p0_soc_postamble ar9300_2p2_soc_postamble
|
||||
|
||||
#define qca953x_1p0_common_rx_gain_table ar9300Common_rx_gain_table_2p2
|
||||
|
@ -28,6 +30,10 @@
|
|||
|
||||
#define qca953x_1p0_modes_fast_clock ar9300Modes_fast_clock_2p2
|
||||
|
||||
#define qca953x_1p0_common_wo_xlna_rx_gain_bounds ar955x_1p0_common_wo_xlna_rx_gain_bounds
|
||||
|
||||
#define qca953x_1p0_common_rx_gain_bounds ar955x_1p0_common_rx_gain_bounds
|
||||
|
||||
static const u32 qca953x_1p0_mac_core[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x00000008, 0x00000000},
|
||||
|
@ -490,35 +496,6 @@ static const u32 qca953x_1p0_radio_postamble[][5] = {
|
|||
{0x00016540, 0x10804008, 0x10804008, 0x50804000, 0x50804000},
|
||||
};
|
||||
|
||||
static const u32 qca953x_1p0_soc_preamble[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x00007000, 0x00000000},
|
||||
{0x00007004, 0x00000000},
|
||||
{0x00007008, 0x00000000},
|
||||
{0x0000700c, 0x00000000},
|
||||
{0x0000701c, 0x00000000},
|
||||
{0x00007020, 0x00000000},
|
||||
{0x00007024, 0x00000000},
|
||||
{0x00007028, 0x00000000},
|
||||
{0x0000702c, 0x00000000},
|
||||
{0x00007030, 0x00000000},
|
||||
{0x00007034, 0x00000002},
|
||||
{0x00007038, 0x000004c2},
|
||||
{0x00007048, 0x00000000},
|
||||
};
|
||||
|
||||
static const u32 qca953x_1p0_common_rx_gain_bounds[][5] = {
|
||||
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
|
||||
{0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
|
||||
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302018, 0x50302018},
|
||||
};
|
||||
|
||||
static const u32 qca953x_1p0_common_wo_xlna_rx_gain_bounds[][5] = {
|
||||
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
|
||||
{0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
|
||||
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
|
||||
};
|
||||
|
||||
static const u32 qca953x_1p0_modes_xpa_tx_gain_table[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x0000a2dc, 0xfffd5aaa},
|
||||
|
@ -715,6 +692,71 @@ static const u32 qca953x_1p1_modes_no_xpa_tx_gain_table[][2] = {
|
|||
{0x00016448, 0x6c927a70},
|
||||
};
|
||||
|
||||
static const u32 qca953x_1p1_modes_xpa_tx_gain_table[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x0000a2dc, 0xfffb52aa},
|
||||
{0x0000a2e0, 0xfffd64cc},
|
||||
{0x0000a2e4, 0xfffe80f0},
|
||||
{0x0000a2e8, 0xffffff00},
|
||||
{0x0000a410, 0x000050d5},
|
||||
{0x0000a500, 0x00000000},
|
||||
{0x0000a504, 0x04000002},
|
||||
{0x0000a508, 0x08000004},
|
||||
{0x0000a50c, 0x0c000006},
|
||||
{0x0000a510, 0x1000000a},
|
||||
{0x0000a514, 0x1400000c},
|
||||
{0x0000a518, 0x1800000e},
|
||||
{0x0000a51c, 0x1c000048},
|
||||
{0x0000a520, 0x2000004a},
|
||||
{0x0000a524, 0x2400004c},
|
||||
{0x0000a528, 0x2800004e},
|
||||
{0x0000a52c, 0x2b00024a},
|
||||
{0x0000a530, 0x2f00024c},
|
||||
{0x0000a534, 0x3300024e},
|
||||
{0x0000a538, 0x36000668},
|
||||
{0x0000a53c, 0x38000669},
|
||||
{0x0000a540, 0x3a000868},
|
||||
{0x0000a544, 0x3d00086a},
|
||||
{0x0000a548, 0x4000086c},
|
||||
{0x0000a54c, 0x4200086e},
|
||||
{0x0000a550, 0x43000a6e},
|
||||
{0x0000a554, 0x43000a6e},
|
||||
{0x0000a558, 0x43000a6e},
|
||||
{0x0000a55c, 0x43000a6e},
|
||||
{0x0000a560, 0x43000a6e},
|
||||
{0x0000a564, 0x43000a6e},
|
||||
{0x0000a568, 0x43000a6e},
|
||||
{0x0000a56c, 0x43000a6e},
|
||||
{0x0000a570, 0x43000a6e},
|
||||
{0x0000a574, 0x43000a6e},
|
||||
{0x0000a578, 0x43000a6e},
|
||||
{0x0000a57c, 0x43000a6e},
|
||||
{0x0000a600, 0x00000000},
|
||||
{0x0000a604, 0x00000000},
|
||||
{0x0000a608, 0x00000000},
|
||||
{0x0000a60c, 0x03804000},
|
||||
{0x0000a610, 0x03804e01},
|
||||
{0x0000a614, 0x03804e01},
|
||||
{0x0000a618, 0x03804e01},
|
||||
{0x0000a61c, 0x04009002},
|
||||
{0x0000a620, 0x04009002},
|
||||
{0x0000a624, 0x04009002},
|
||||
{0x0000a628, 0x04009002},
|
||||
{0x0000a62c, 0x04009002},
|
||||
{0x0000a630, 0x04009002},
|
||||
{0x0000a634, 0x04009002},
|
||||
{0x0000a638, 0x04009002},
|
||||
{0x0000a63c, 0x04009002},
|
||||
{0x0000b2dc, 0xfffb52aa},
|
||||
{0x0000b2e0, 0xfffd64cc},
|
||||
{0x0000b2e4, 0xfffe80f0},
|
||||
{0x0000b2e8, 0xffffff00},
|
||||
{0x00016044, 0x024922db},
|
||||
{0x00016048, 0x6c927a70},
|
||||
{0x00016444, 0x024922db},
|
||||
{0x00016448, 0x6c927a70},
|
||||
};
|
||||
|
||||
static const u32 qca953x_2p0_baseband_core[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x00009800, 0xafe68e30},
|
||||
|
@ -914,4 +956,400 @@ static const u32 qca953x_2p0_baseband_postamble[][5] = {
|
|||
{0x0000b284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
|
||||
};
|
||||
|
||||
static const u32 qca953x_2p0_common_wo_xlna_rx_gain_table[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x0000a000, 0x00010000},
|
||||
{0x0000a004, 0x00030002},
|
||||
{0x0000a008, 0x00050004},
|
||||
{0x0000a00c, 0x00810080},
|
||||
{0x0000a010, 0x00830082},
|
||||
{0x0000a014, 0x01810180},
|
||||
{0x0000a018, 0x01830182},
|
||||
{0x0000a01c, 0x01850184},
|
||||
{0x0000a020, 0x01890188},
|
||||
{0x0000a024, 0x018b018a},
|
||||
{0x0000a028, 0x018d018c},
|
||||
{0x0000a02c, 0x03820190},
|
||||
{0x0000a030, 0x03840383},
|
||||
{0x0000a034, 0x03880385},
|
||||
{0x0000a038, 0x038a0389},
|
||||
{0x0000a03c, 0x038c038b},
|
||||
{0x0000a040, 0x0390038d},
|
||||
{0x0000a044, 0x03920391},
|
||||
{0x0000a048, 0x03940393},
|
||||
{0x0000a04c, 0x03960395},
|
||||
{0x0000a050, 0x00000000},
|
||||
{0x0000a054, 0x00000000},
|
||||
{0x0000a058, 0x00000000},
|
||||
{0x0000a05c, 0x00000000},
|
||||
{0x0000a060, 0x00000000},
|
||||
{0x0000a064, 0x00000000},
|
||||
{0x0000a068, 0x00000000},
|
||||
{0x0000a06c, 0x00000000},
|
||||
{0x0000a070, 0x00000000},
|
||||
{0x0000a074, 0x00000000},
|
||||
{0x0000a078, 0x00000000},
|
||||
{0x0000a07c, 0x00000000},
|
||||
{0x0000a080, 0x29292929},
|
||||
{0x0000a084, 0x29292929},
|
||||
{0x0000a088, 0x29292929},
|
||||
{0x0000a08c, 0x29292929},
|
||||
{0x0000a090, 0x22292929},
|
||||
{0x0000a094, 0x1d1d2222},
|
||||
{0x0000a098, 0x0c111117},
|
||||
{0x0000a09c, 0x00030303},
|
||||
{0x0000a0a0, 0x00000000},
|
||||
{0x0000a0a4, 0x00000000},
|
||||
{0x0000a0a8, 0x00000000},
|
||||
{0x0000a0ac, 0x00000000},
|
||||
{0x0000a0b0, 0x00000000},
|
||||
{0x0000a0b4, 0x00000000},
|
||||
{0x0000a0b8, 0x00000000},
|
||||
{0x0000a0bc, 0x00000000},
|
||||
{0x0000a0c0, 0x001f0000},
|
||||
{0x0000a0c4, 0x01000101},
|
||||
{0x0000a0c8, 0x011e011f},
|
||||
{0x0000a0cc, 0x011c011d},
|
||||
{0x0000a0d0, 0x02030204},
|
||||
{0x0000a0d4, 0x02010202},
|
||||
{0x0000a0d8, 0x021f0200},
|
||||
{0x0000a0dc, 0x0302021e},
|
||||
{0x0000a0e0, 0x03000301},
|
||||
{0x0000a0e4, 0x031e031f},
|
||||
{0x0000a0e8, 0x0402031d},
|
||||
{0x0000a0ec, 0x04000401},
|
||||
{0x0000a0f0, 0x041e041f},
|
||||
{0x0000a0f4, 0x0502041d},
|
||||
{0x0000a0f8, 0x05000501},
|
||||
{0x0000a0fc, 0x051e051f},
|
||||
{0x0000a100, 0x06010602},
|
||||
{0x0000a104, 0x061f0600},
|
||||
{0x0000a108, 0x061d061e},
|
||||
{0x0000a10c, 0x07020703},
|
||||
{0x0000a110, 0x07000701},
|
||||
{0x0000a114, 0x00000000},
|
||||
{0x0000a118, 0x00000000},
|
||||
{0x0000a11c, 0x00000000},
|
||||
{0x0000a120, 0x00000000},
|
||||
{0x0000a124, 0x00000000},
|
||||
{0x0000a128, 0x00000000},
|
||||
{0x0000a12c, 0x00000000},
|
||||
{0x0000a130, 0x00000000},
|
||||
{0x0000a134, 0x00000000},
|
||||
{0x0000a138, 0x00000000},
|
||||
{0x0000a13c, 0x00000000},
|
||||
{0x0000a140, 0x001f0000},
|
||||
{0x0000a144, 0x01000101},
|
||||
{0x0000a148, 0x011e011f},
|
||||
{0x0000a14c, 0x011c011d},
|
||||
{0x0000a150, 0x02030204},
|
||||
{0x0000a154, 0x02010202},
|
||||
{0x0000a158, 0x021f0200},
|
||||
{0x0000a15c, 0x0302021e},
|
||||
{0x0000a160, 0x03000301},
|
||||
{0x0000a164, 0x031e031f},
|
||||
{0x0000a168, 0x0402031d},
|
||||
{0x0000a16c, 0x04000401},
|
||||
{0x0000a170, 0x041e041f},
|
||||
{0x0000a174, 0x0502041d},
|
||||
{0x0000a178, 0x05000501},
|
||||
{0x0000a17c, 0x051e051f},
|
||||
{0x0000a180, 0x06010602},
|
||||
{0x0000a184, 0x061f0600},
|
||||
{0x0000a188, 0x061d061e},
|
||||
{0x0000a18c, 0x07020703},
|
||||
{0x0000a190, 0x07000701},
|
||||
{0x0000a194, 0x00000000},
|
||||
{0x0000a198, 0x00000000},
|
||||
{0x0000a19c, 0x00000000},
|
||||
{0x0000a1a0, 0x00000000},
|
||||
{0x0000a1a4, 0x00000000},
|
||||
{0x0000a1a8, 0x00000000},
|
||||
{0x0000a1ac, 0x00000000},
|
||||
{0x0000a1b0, 0x00000000},
|
||||
{0x0000a1b4, 0x00000000},
|
||||
{0x0000a1b8, 0x00000000},
|
||||
{0x0000a1bc, 0x00000000},
|
||||
{0x0000a1c0, 0x00000000},
|
||||
{0x0000a1c4, 0x00000000},
|
||||
{0x0000a1c8, 0x00000000},
|
||||
{0x0000a1cc, 0x00000000},
|
||||
{0x0000a1d0, 0x00000000},
|
||||
{0x0000a1d4, 0x00000000},
|
||||
{0x0000a1d8, 0x00000000},
|
||||
{0x0000a1dc, 0x00000000},
|
||||
{0x0000a1e0, 0x00000000},
|
||||
{0x0000a1e4, 0x00000000},
|
||||
{0x0000a1e8, 0x00000000},
|
||||
{0x0000a1ec, 0x00000000},
|
||||
{0x0000a1f0, 0x00000396},
|
||||
{0x0000a1f4, 0x00000396},
|
||||
{0x0000a1f8, 0x00000396},
|
||||
{0x0000a1fc, 0x00000196},
|
||||
{0x0000b000, 0x00010000},
|
||||
{0x0000b004, 0x00030002},
|
||||
{0x0000b008, 0x00050004},
|
||||
{0x0000b00c, 0x00810080},
|
||||
{0x0000b010, 0x00830082},
|
||||
{0x0000b014, 0x01810180},
|
||||
{0x0000b018, 0x01830182},
|
||||
{0x0000b01c, 0x01850184},
|
||||
{0x0000b020, 0x02810280},
|
||||
{0x0000b024, 0x02830282},
|
||||
{0x0000b028, 0x02850284},
|
||||
{0x0000b02c, 0x02890288},
|
||||
{0x0000b030, 0x028b028a},
|
||||
{0x0000b034, 0x0388028c},
|
||||
{0x0000b038, 0x038a0389},
|
||||
{0x0000b03c, 0x038c038b},
|
||||
{0x0000b040, 0x0390038d},
|
||||
{0x0000b044, 0x03920391},
|
||||
{0x0000b048, 0x03940393},
|
||||
{0x0000b04c, 0x03960395},
|
||||
{0x0000b050, 0x00000000},
|
||||
{0x0000b054, 0x00000000},
|
||||
{0x0000b058, 0x00000000},
|
||||
{0x0000b05c, 0x00000000},
|
||||
{0x0000b060, 0x00000000},
|
||||
{0x0000b064, 0x00000000},
|
||||
{0x0000b068, 0x00000000},
|
||||
{0x0000b06c, 0x00000000},
|
||||
{0x0000b070, 0x00000000},
|
||||
{0x0000b074, 0x00000000},
|
||||
{0x0000b078, 0x00000000},
|
||||
{0x0000b07c, 0x00000000},
|
||||
{0x0000b080, 0x32323232},
|
||||
{0x0000b084, 0x2f2f3232},
|
||||
{0x0000b088, 0x23282a2d},
|
||||
{0x0000b08c, 0x1c1e2123},
|
||||
{0x0000b090, 0x14171919},
|
||||
{0x0000b094, 0x0e0e1214},
|
||||
{0x0000b098, 0x03050707},
|
||||
{0x0000b09c, 0x00030303},
|
||||
{0x0000b0a0, 0x00000000},
|
||||
{0x0000b0a4, 0x00000000},
|
||||
{0x0000b0a8, 0x00000000},
|
||||
{0x0000b0ac, 0x00000000},
|
||||
{0x0000b0b0, 0x00000000},
|
||||
{0x0000b0b4, 0x00000000},
|
||||
{0x0000b0b8, 0x00000000},
|
||||
{0x0000b0bc, 0x00000000},
|
||||
{0x0000b0c0, 0x003f0020},
|
||||
{0x0000b0c4, 0x00400041},
|
||||
{0x0000b0c8, 0x0140005f},
|
||||
{0x0000b0cc, 0x0160015f},
|
||||
{0x0000b0d0, 0x017e017f},
|
||||
{0x0000b0d4, 0x02410242},
|
||||
{0x0000b0d8, 0x025f0240},
|
||||
{0x0000b0dc, 0x027f0260},
|
||||
{0x0000b0e0, 0x0341027e},
|
||||
{0x0000b0e4, 0x035f0340},
|
||||
{0x0000b0e8, 0x037f0360},
|
||||
{0x0000b0ec, 0x04400441},
|
||||
{0x0000b0f0, 0x0460045f},
|
||||
{0x0000b0f4, 0x0541047f},
|
||||
{0x0000b0f8, 0x055f0540},
|
||||
{0x0000b0fc, 0x057f0560},
|
||||
{0x0000b100, 0x06400641},
|
||||
{0x0000b104, 0x0660065f},
|
||||
{0x0000b108, 0x067e067f},
|
||||
{0x0000b10c, 0x07410742},
|
||||
{0x0000b110, 0x075f0740},
|
||||
{0x0000b114, 0x077f0760},
|
||||
{0x0000b118, 0x07800781},
|
||||
{0x0000b11c, 0x07a0079f},
|
||||
{0x0000b120, 0x07c107bf},
|
||||
{0x0000b124, 0x000007c0},
|
||||
{0x0000b128, 0x00000000},
|
||||
{0x0000b12c, 0x00000000},
|
||||
{0x0000b130, 0x00000000},
|
||||
{0x0000b134, 0x00000000},
|
||||
{0x0000b138, 0x00000000},
|
||||
{0x0000b13c, 0x00000000},
|
||||
{0x0000b140, 0x003f0020},
|
||||
{0x0000b144, 0x00400041},
|
||||
{0x0000b148, 0x0140005f},
|
||||
{0x0000b14c, 0x0160015f},
|
||||
{0x0000b150, 0x017e017f},
|
||||
{0x0000b154, 0x02410242},
|
||||
{0x0000b158, 0x025f0240},
|
||||
{0x0000b15c, 0x027f0260},
|
||||
{0x0000b160, 0x0341027e},
|
||||
{0x0000b164, 0x035f0340},
|
||||
{0x0000b168, 0x037f0360},
|
||||
{0x0000b16c, 0x04400441},
|
||||
{0x0000b170, 0x0460045f},
|
||||
{0x0000b174, 0x0541047f},
|
||||
{0x0000b178, 0x055f0540},
|
||||
{0x0000b17c, 0x057f0560},
|
||||
{0x0000b180, 0x06400641},
|
||||
{0x0000b184, 0x0660065f},
|
||||
{0x0000b188, 0x067e067f},
|
||||
{0x0000b18c, 0x07410742},
|
||||
{0x0000b190, 0x075f0740},
|
||||
{0x0000b194, 0x077f0760},
|
||||
{0x0000b198, 0x07800781},
|
||||
{0x0000b19c, 0x07a0079f},
|
||||
{0x0000b1a0, 0x07c107bf},
|
||||
{0x0000b1a4, 0x000007c0},
|
||||
{0x0000b1a8, 0x00000000},
|
||||
{0x0000b1ac, 0x00000000},
|
||||
{0x0000b1b0, 0x00000000},
|
||||
{0x0000b1b4, 0x00000000},
|
||||
{0x0000b1b8, 0x00000000},
|
||||
{0x0000b1bc, 0x00000000},
|
||||
{0x0000b1c0, 0x00000000},
|
||||
{0x0000b1c4, 0x00000000},
|
||||
{0x0000b1c8, 0x00000000},
|
||||
{0x0000b1cc, 0x00000000},
|
||||
{0x0000b1d0, 0x00000000},
|
||||
{0x0000b1d4, 0x00000000},
|
||||
{0x0000b1d8, 0x00000000},
|
||||
{0x0000b1dc, 0x00000000},
|
||||
{0x0000b1e0, 0x00000000},
|
||||
{0x0000b1e4, 0x00000000},
|
||||
{0x0000b1e8, 0x00000000},
|
||||
{0x0000b1ec, 0x00000000},
|
||||
{0x0000b1f0, 0x00000396},
|
||||
{0x0000b1f4, 0x00000396},
|
||||
{0x0000b1f8, 0x00000396},
|
||||
{0x0000b1fc, 0x00000196},
|
||||
};
|
||||
|
||||
static const u32 qca953x_2p0_common_wo_xlna_rx_gain_bounds[][5] = {
|
||||
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
|
||||
{0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
|
||||
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
|
||||
};
|
||||
|
||||
static const u32 qca953x_2p0_modes_xpa_tx_gain_table[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x0000a2dc, 0xfffb52aa},
|
||||
{0x0000a2e0, 0xfffd64cc},
|
||||
{0x0000a2e4, 0xfffe80f0},
|
||||
{0x0000a2e8, 0xffffff00},
|
||||
{0x0000a410, 0x000050d5},
|
||||
{0x0000a500, 0x00000000},
|
||||
{0x0000a504, 0x04000002},
|
||||
{0x0000a508, 0x08000004},
|
||||
{0x0000a50c, 0x0c000006},
|
||||
{0x0000a510, 0x1000000a},
|
||||
{0x0000a514, 0x1400000c},
|
||||
{0x0000a518, 0x1800000e},
|
||||
{0x0000a51c, 0x1c000048},
|
||||
{0x0000a520, 0x2000004a},
|
||||
{0x0000a524, 0x2400004c},
|
||||
{0x0000a528, 0x2800004e},
|
||||
{0x0000a52c, 0x2b00024a},
|
||||
{0x0000a530, 0x2f00024c},
|
||||
{0x0000a534, 0x3300024e},
|
||||
{0x0000a538, 0x36000668},
|
||||
{0x0000a53c, 0x38000669},
|
||||
{0x0000a540, 0x3a000868},
|
||||
{0x0000a544, 0x3d00086a},
|
||||
{0x0000a548, 0x4000086c},
|
||||
{0x0000a54c, 0x4200086e},
|
||||
{0x0000a550, 0x43000a6e},
|
||||
{0x0000a554, 0x43000a6e},
|
||||
{0x0000a558, 0x43000a6e},
|
||||
{0x0000a55c, 0x43000a6e},
|
||||
{0x0000a560, 0x43000a6e},
|
||||
{0x0000a564, 0x43000a6e},
|
||||
{0x0000a568, 0x43000a6e},
|
||||
{0x0000a56c, 0x43000a6e},
|
||||
{0x0000a570, 0x43000a6e},
|
||||
{0x0000a574, 0x43000a6e},
|
||||
{0x0000a578, 0x43000a6e},
|
||||
{0x0000a57c, 0x43000a6e},
|
||||
{0x0000a600, 0x00000000},
|
||||
{0x0000a604, 0x00000000},
|
||||
{0x0000a608, 0x00000000},
|
||||
{0x0000a60c, 0x03804000},
|
||||
{0x0000a610, 0x03804e01},
|
||||
{0x0000a614, 0x03804e01},
|
||||
{0x0000a618, 0x03804e01},
|
||||
{0x0000a61c, 0x04009002},
|
||||
{0x0000a620, 0x04009002},
|
||||
{0x0000a624, 0x04009002},
|
||||
{0x0000a628, 0x04009002},
|
||||
{0x0000a62c, 0x04009002},
|
||||
{0x0000a630, 0x04009002},
|
||||
{0x0000a634, 0x04009002},
|
||||
{0x0000a638, 0x04009002},
|
||||
{0x0000a63c, 0x04009002},
|
||||
{0x0000b2dc, 0xfffb52aa},
|
||||
{0x0000b2e0, 0xfffd64cc},
|
||||
{0x0000b2e4, 0xfffe80f0},
|
||||
{0x0000b2e8, 0xffffff00},
|
||||
{0x00016044, 0x024922db},
|
||||
{0x00016048, 0x6c927a70},
|
||||
{0x00016444, 0x024922db},
|
||||
{0x00016448, 0x6c927a70},
|
||||
};
|
||||
|
||||
static const u32 qca953x_2p0_modes_no_xpa_tx_gain_table[][2] = {
|
||||
/* Addr allmodes */
|
||||
{0x0000a2dc, 0xffd5f552},
|
||||
{0x0000a2e0, 0xffe60664},
|
||||
{0x0000a2e4, 0xfff80780},
|
||||
{0x0000a2e8, 0xfffff800},
|
||||
{0x0000a410, 0x000050de},
|
||||
{0x0000a500, 0x00000061},
|
||||
{0x0000a504, 0x04000063},
|
||||
{0x0000a508, 0x08000065},
|
||||
{0x0000a50c, 0x0c000261},
|
||||
{0x0000a510, 0x10000263},
|
||||
{0x0000a514, 0x14000265},
|
||||
{0x0000a518, 0x18000482},
|
||||
{0x0000a51c, 0x1b000484},
|
||||
{0x0000a520, 0x1f000486},
|
||||
{0x0000a524, 0x240008c2},
|
||||
{0x0000a528, 0x28000cc1},
|
||||
{0x0000a52c, 0x2d000ce3},
|
||||
{0x0000a530, 0x31000ce5},
|
||||
{0x0000a534, 0x350010e5},
|
||||
{0x0000a538, 0x360012e5},
|
||||
{0x0000a53c, 0x380014e5},
|
||||
{0x0000a540, 0x3b0018e5},
|
||||
{0x0000a544, 0x3d001d04},
|
||||
{0x0000a548, 0x3e001d05},
|
||||
{0x0000a54c, 0x40001d07},
|
||||
{0x0000a550, 0x42001f27},
|
||||
{0x0000a554, 0x43001f67},
|
||||
{0x0000a558, 0x46001fe7},
|
||||
{0x0000a55c, 0x47001f2b},
|
||||
{0x0000a560, 0x49001f0d},
|
||||
{0x0000a564, 0x4b001ed2},
|
||||
{0x0000a568, 0x4c001ed4},
|
||||
{0x0000a56c, 0x4e001f15},
|
||||
{0x0000a570, 0x4f001ff6},
|
||||
{0x0000a574, 0x4f001ff6},
|
||||
{0x0000a578, 0x4f001ff6},
|
||||
{0x0000a57c, 0x4f001ff6},
|
||||
{0x0000a600, 0x00000000},
|
||||
{0x0000a604, 0x00000000},
|
||||
{0x0000a608, 0x00000000},
|
||||
{0x0000a60c, 0x00804201},
|
||||
{0x0000a610, 0x01008201},
|
||||
{0x0000a614, 0x0180c402},
|
||||
{0x0000a618, 0x0180c603},
|
||||
{0x0000a61c, 0x0180c603},
|
||||
{0x0000a620, 0x01c10603},
|
||||
{0x0000a624, 0x01c10704},
|
||||
{0x0000a628, 0x02c18b05},
|
||||
{0x0000a62c, 0x02c14c07},
|
||||
{0x0000a630, 0x01008704},
|
||||
{0x0000a634, 0x01c10402},
|
||||
{0x0000a638, 0x0301cc07},
|
||||
{0x0000a63c, 0x0301cc07},
|
||||
{0x0000b2dc, 0xffd5f552},
|
||||
{0x0000b2e0, 0xffe60664},
|
||||
{0x0000b2e4, 0xfff80780},
|
||||
{0x0000b2e8, 0xfffff800},
|
||||
{0x00016044, 0x049242db},
|
||||
{0x00016048, 0x6c927a70},
|
||||
{0x00016444, 0x049242db},
|
||||
{0x00016448, 0x6c927a70},
|
||||
};
|
||||
|
||||
#endif /* INITVALS_953X_H */
|
||||
|
|
|
@ -28,7 +28,6 @@
|
|||
#include "debug.h"
|
||||
#include "mci.h"
|
||||
#include "dfs.h"
|
||||
#include "spectral.h"
|
||||
|
||||
struct ath_node;
|
||||
struct ath_vif;
|
||||
|
@ -347,6 +346,7 @@ struct ath_chanctx {
|
|||
|
||||
int flush_timeout;
|
||||
u16 txpower;
|
||||
u16 cur_txpower;
|
||||
bool offchannel;
|
||||
bool stopped;
|
||||
bool active;
|
||||
|
@ -381,6 +381,7 @@ enum ath_chanctx_state {
|
|||
|
||||
struct ath_chanctx_sched {
|
||||
bool beacon_pending;
|
||||
bool beacon_adjust;
|
||||
bool offchannel_pending;
|
||||
bool wait_switch;
|
||||
bool force_noa_update;
|
||||
|
@ -931,6 +932,7 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
|
|||
#define ATH9K_PCI_AR9565_2ANT 0x0100
|
||||
#define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
|
||||
#define ATH9K_PCI_KILLER 0x0400
|
||||
#define ATH9K_PCI_LED_ACT_HI 0x0800
|
||||
|
||||
/*
|
||||
* Default cache line size, in bytes.
|
||||
|
@ -987,7 +989,6 @@ struct ath_softc {
|
|||
u8 gtt_cnt;
|
||||
u32 intrstatus;
|
||||
u16 ps_flags; /* PS_* */
|
||||
u16 curtxpow;
|
||||
bool ps_enabled;
|
||||
bool ps_idle;
|
||||
short nbcnvifs;
|
||||
|
@ -1028,10 +1029,8 @@ struct ath_softc {
|
|||
struct dfs_pattern_detector *dfs_detector;
|
||||
u64 dfs_prev_pulse_ts;
|
||||
u32 wow_enabled;
|
||||
/* relay(fs) channel for spectral scan */
|
||||
struct rchan *rfs_chan_spec_scan;
|
||||
enum spectral_mode spectral_mode;
|
||||
struct ath_spec_scan spec_config;
|
||||
|
||||
struct ath_spec_scan_priv spec_priv;
|
||||
|
||||
struct ieee80211_vif *tx99_vif;
|
||||
struct sk_buff *tx99_skb;
|
||||
|
|
|
@ -92,8 +92,8 @@ static int ath_set_channel(struct ath_softc *sc)
|
|||
} else {
|
||||
/* perform spectral scan if requested. */
|
||||
if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
|
||||
sc->spectral_mode == SPECTRAL_CHANSCAN)
|
||||
ath9k_spectral_scan_trigger(hw);
|
||||
sc->spec_priv.spectral_mode == SPECTRAL_CHANSCAN)
|
||||
ath9k_cmn_spectral_scan_trigger(common, &sc->spec_priv);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -659,6 +659,7 @@ void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
|
|||
sc->sched.beacon_miss = 0;
|
||||
|
||||
if (sc->sched.state == ATH_CHANCTX_STATE_FORCE_ACTIVE ||
|
||||
!sc->sched.beacon_adjust ||
|
||||
!sc->cur_chan->tsf_val)
|
||||
break;
|
||||
|
||||
|
@ -672,7 +673,7 @@ void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
|
|||
ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
|
||||
tsf_time += ath9k_hw_gettsf32(ah);
|
||||
|
||||
|
||||
sc->sched.beacon_adjust = false;
|
||||
ath_chanctx_setup_timer(sc, tsf_time);
|
||||
break;
|
||||
case ATH_CHANCTX_EVENT_AUTHORIZED:
|
||||
|
@ -717,6 +718,7 @@ void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
|
|||
|
||||
ath_chanctx_setup_timer(sc, tsf_time);
|
||||
sc->sched.beacon_pending = true;
|
||||
sc->sched.beacon_adjust = true;
|
||||
break;
|
||||
case ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL:
|
||||
if (sc->cur_chan == &sc->offchannel.chan ||
|
||||
|
@ -900,6 +902,11 @@ void ath_offchannel_next(struct ath_softc *sc)
|
|||
sc->offchannel.state = ATH_OFFCHANNEL_ROC_START;
|
||||
ath_chanctx_offchan_switch(sc, sc->offchannel.roc_chan);
|
||||
} else {
|
||||
spin_lock_bh(&sc->chan_lock);
|
||||
sc->sched.offchannel_pending = false;
|
||||
sc->sched.wait_switch = false;
|
||||
spin_unlock_bh(&sc->chan_lock);
|
||||
|
||||
ath_chanctx_switch(sc, ath_chanctx_get_oper_chan(sc, false),
|
||||
NULL);
|
||||
sc->offchannel.state = ATH_OFFCHANNEL_IDLE;
|
||||
|
@ -919,7 +926,6 @@ void ath_roc_complete(struct ath_softc *sc, bool abort)
|
|||
|
||||
sc->offchannel.roc_vif = NULL;
|
||||
sc->offchannel.roc_chan = NULL;
|
||||
if (abort)
|
||||
ieee80211_remain_on_channel_expired(sc->hw);
|
||||
ath_offchannel_next(sc);
|
||||
ath9k_ps_restore(sc);
|
||||
|
@ -957,7 +963,7 @@ static void ath_scan_send_probe(struct ath_softc *sc,
|
|||
struct ieee80211_tx_info *info;
|
||||
int band = sc->offchannel.chan.chandef.chan->band;
|
||||
|
||||
skb = ieee80211_probereq_get(sc->hw, vif,
|
||||
skb = ieee80211_probereq_get(sc->hw, vif->addr,
|
||||
ssid->ssid, ssid->ssid_len, req->ie_len);
|
||||
if (!skb)
|
||||
return;
|
||||
|
@ -1051,10 +1057,8 @@ static void ath_offchannel_timer(unsigned long data)
|
|||
break;
|
||||
case ATH_OFFCHANNEL_ROC_START:
|
||||
case ATH_OFFCHANNEL_ROC_WAIT:
|
||||
ctx = ath_chanctx_get_oper_chan(sc, false);
|
||||
sc->offchannel.state = ATH_OFFCHANNEL_ROC_DONE;
|
||||
ieee80211_remain_on_channel_expired(sc->hw);
|
||||
ath_chanctx_switch(sc, ctx, NULL);
|
||||
ath_roc_complete(sc, false);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -1184,7 +1188,6 @@ static void ath_offchannel_channel_change(struct ath_softc *sc)
|
|||
ieee80211_ready_on_channel(sc->hw);
|
||||
break;
|
||||
case ATH_OFFCHANNEL_ROC_DONE:
|
||||
ath_roc_complete(sc, false);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
@ -24,23 +24,24 @@ static s8 fix_rssi_inv_only(u8 rssi_val)
|
|||
return (s8) rssi_val;
|
||||
}
|
||||
|
||||
static void ath_debug_send_fft_sample(struct ath_softc *sc,
|
||||
static void ath_debug_send_fft_sample(struct ath_spec_scan_priv *spec_priv,
|
||||
struct fft_sample_tlv *fft_sample_tlv)
|
||||
{
|
||||
int length;
|
||||
if (!sc->rfs_chan_spec_scan)
|
||||
if (!spec_priv->rfs_chan_spec_scan)
|
||||
return;
|
||||
|
||||
length = __be16_to_cpu(fft_sample_tlv->length) +
|
||||
sizeof(*fft_sample_tlv);
|
||||
relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv, length);
|
||||
relay_write(spec_priv->rfs_chan_spec_scan, fft_sample_tlv, length);
|
||||
}
|
||||
|
||||
/* returns 1 if this was a spectral frame, even if not handled. */
|
||||
int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
int ath_cmn_process_fft(struct ath_spec_scan_priv *spec_priv, struct ieee80211_hdr *hdr,
|
||||
struct ath_rx_status *rs, u64 tsf)
|
||||
{
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_hw *ah = spec_priv->ah;
|
||||
struct ath_common *common = ath9k_hw_common(spec_priv->ah);
|
||||
u8 num_bins, *bins, *vdata = (u8 *)hdr;
|
||||
struct fft_sample_ht20 fft_sample_20;
|
||||
struct fft_sample_ht20_40 fft_sample_40;
|
||||
|
@ -67,7 +68,7 @@ int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
|||
if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
|
||||
return 0;
|
||||
|
||||
chan_type = cfg80211_get_chandef_type(&sc->hw->conf.chandef);
|
||||
chan_type = cfg80211_get_chandef_type(&common->hw->conf.chandef);
|
||||
if ((chan_type == NL80211_CHAN_HT40MINUS) ||
|
||||
(chan_type == NL80211_CHAN_HT40PLUS)) {
|
||||
fft_len = SPECTRAL_HT20_40_TOTAL_DATA_LEN;
|
||||
|
@ -199,10 +200,11 @@ int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
|||
tlv = (struct fft_sample_tlv *)&fft_sample_20;
|
||||
}
|
||||
|
||||
ath_debug_send_fft_sample(sc, tlv);
|
||||
ath_debug_send_fft_sample(spec_priv, tlv);
|
||||
|
||||
return 1;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_cmn_process_fft);
|
||||
|
||||
/*********************/
|
||||
/* spectral_scan_ctl */
|
||||
|
@ -211,11 +213,11 @@ int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
|||
static ssize_t read_file_spec_scan_ctl(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
char *mode = "";
|
||||
unsigned int len;
|
||||
|
||||
switch (sc->spectral_mode) {
|
||||
switch (spec_priv->spectral_mode) {
|
||||
case SPECTRAL_DISABLED:
|
||||
mode = "disable";
|
||||
break;
|
||||
|
@ -233,12 +235,84 @@ static ssize_t read_file_spec_scan_ctl(struct file *file, char __user *user_buf,
|
|||
return simple_read_from_buffer(user_buf, count, ppos, mode, len);
|
||||
}
|
||||
|
||||
void ath9k_cmn_spectral_scan_trigger(struct ath_common *common,
|
||||
struct ath_spec_scan_priv *spec_priv)
|
||||
{
|
||||
struct ath_hw *ah = spec_priv->ah;
|
||||
u32 rxfilter;
|
||||
|
||||
if (config_enabled(CONFIG_ATH9K_TX99))
|
||||
return;
|
||||
|
||||
if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
|
||||
ath_err(common, "spectrum analyzer not implemented on this hardware\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ath_ps_ops(common)->wakeup(common);
|
||||
rxfilter = ath9k_hw_getrxfilter(ah);
|
||||
ath9k_hw_setrxfilter(ah, rxfilter |
|
||||
ATH9K_RX_FILTER_PHYRADAR |
|
||||
ATH9K_RX_FILTER_PHYERR);
|
||||
|
||||
/* TODO: usually this should not be neccesary, but for some reason
|
||||
* (or in some mode?) the trigger must be called after the
|
||||
* configuration, otherwise the register will have its values reset
|
||||
* (on my ar9220 to value 0x01002310)
|
||||
*/
|
||||
ath9k_cmn_spectral_scan_config(common, spec_priv, spec_priv->spectral_mode);
|
||||
ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
|
||||
ath_ps_ops(common)->restore(common);
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_cmn_spectral_scan_trigger);
|
||||
|
||||
int ath9k_cmn_spectral_scan_config(struct ath_common *common,
|
||||
struct ath_spec_scan_priv *spec_priv,
|
||||
enum spectral_mode spectral_mode)
|
||||
{
|
||||
struct ath_hw *ah = spec_priv->ah;
|
||||
|
||||
if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
|
||||
ath_err(common, "spectrum analyzer not implemented on this hardware\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
switch (spectral_mode) {
|
||||
case SPECTRAL_DISABLED:
|
||||
spec_priv->spec_config.enabled = 0;
|
||||
break;
|
||||
case SPECTRAL_BACKGROUND:
|
||||
/* send endless samples.
|
||||
* TODO: is this really useful for "background"?
|
||||
*/
|
||||
spec_priv->spec_config.endless = 1;
|
||||
spec_priv->spec_config.enabled = 1;
|
||||
break;
|
||||
case SPECTRAL_CHANSCAN:
|
||||
case SPECTRAL_MANUAL:
|
||||
spec_priv->spec_config.endless = 0;
|
||||
spec_priv->spec_config.enabled = 1;
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
ath_ps_ops(common)->wakeup(common);
|
||||
ath9k_hw_ops(ah)->spectral_scan_config(ah, &spec_priv->spec_config);
|
||||
ath_ps_ops(common)->restore(common);
|
||||
|
||||
spec_priv->spectral_mode = spectral_mode;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_cmn_spectral_scan_config);
|
||||
|
||||
static ssize_t write_file_spec_scan_ctl(struct file *file,
|
||||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
struct ath_common *common = ath9k_hw_common(spec_priv->ah);
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
||||
|
@ -252,18 +326,18 @@ static ssize_t write_file_spec_scan_ctl(struct file *file,
|
|||
buf[len] = '\0';
|
||||
|
||||
if (strncmp("trigger", buf, 7) == 0) {
|
||||
ath9k_spectral_scan_trigger(sc->hw);
|
||||
ath9k_cmn_spectral_scan_trigger(common, spec_priv);
|
||||
} else if (strncmp("background", buf, 10) == 0) {
|
||||
ath9k_spectral_scan_config(sc->hw, SPECTRAL_BACKGROUND);
|
||||
ath9k_cmn_spectral_scan_config(common, spec_priv, SPECTRAL_BACKGROUND);
|
||||
ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n");
|
||||
} else if (strncmp("chanscan", buf, 8) == 0) {
|
||||
ath9k_spectral_scan_config(sc->hw, SPECTRAL_CHANSCAN);
|
||||
ath9k_cmn_spectral_scan_config(common, spec_priv, SPECTRAL_CHANSCAN);
|
||||
ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n");
|
||||
} else if (strncmp("manual", buf, 6) == 0) {
|
||||
ath9k_spectral_scan_config(sc->hw, SPECTRAL_MANUAL);
|
||||
ath9k_cmn_spectral_scan_config(common, spec_priv, SPECTRAL_MANUAL);
|
||||
ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n");
|
||||
} else if (strncmp("disable", buf, 7) == 0) {
|
||||
ath9k_spectral_scan_config(sc->hw, SPECTRAL_DISABLED);
|
||||
ath9k_cmn_spectral_scan_config(common, spec_priv, SPECTRAL_DISABLED);
|
||||
ath_dbg(common, CONFIG, "spectral scan: disabled\n");
|
||||
} else {
|
||||
return -EINVAL;
|
||||
|
@ -288,11 +362,11 @@ static ssize_t read_file_spectral_short_repeat(struct file *file,
|
|||
char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = sprintf(buf, "%d\n", sc->spec_config.short_repeat);
|
||||
len = sprintf(buf, "%d\n", spec_priv->spec_config.short_repeat);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
|
@ -300,7 +374,7 @@ static ssize_t write_file_spectral_short_repeat(struct file *file,
|
|||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
unsigned long val;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
@ -316,7 +390,7 @@ static ssize_t write_file_spectral_short_repeat(struct file *file,
|
|||
if (val > 1)
|
||||
return -EINVAL;
|
||||
|
||||
sc->spec_config.short_repeat = val;
|
||||
spec_priv->spec_config.short_repeat = val;
|
||||
return count;
|
||||
}
|
||||
|
||||
|
@ -336,11 +410,11 @@ static ssize_t read_file_spectral_count(struct file *file,
|
|||
char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = sprintf(buf, "%d\n", sc->spec_config.count);
|
||||
len = sprintf(buf, "%d\n", spec_priv->spec_config.count);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
|
@ -348,7 +422,7 @@ static ssize_t write_file_spectral_count(struct file *file,
|
|||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
unsigned long val;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
@ -364,7 +438,7 @@ static ssize_t write_file_spectral_count(struct file *file,
|
|||
if (val > 255)
|
||||
return -EINVAL;
|
||||
|
||||
sc->spec_config.count = val;
|
||||
spec_priv->spec_config.count = val;
|
||||
return count;
|
||||
}
|
||||
|
||||
|
@ -384,11 +458,11 @@ static ssize_t read_file_spectral_period(struct file *file,
|
|||
char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = sprintf(buf, "%d\n", sc->spec_config.period);
|
||||
len = sprintf(buf, "%d\n", spec_priv->spec_config.period);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
|
@ -396,7 +470,7 @@ static ssize_t write_file_spectral_period(struct file *file,
|
|||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
unsigned long val;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
@ -412,7 +486,7 @@ static ssize_t write_file_spectral_period(struct file *file,
|
|||
if (val > 255)
|
||||
return -EINVAL;
|
||||
|
||||
sc->spec_config.period = val;
|
||||
spec_priv->spec_config.period = val;
|
||||
return count;
|
||||
}
|
||||
|
||||
|
@ -432,11 +506,11 @@ static ssize_t read_file_spectral_fft_period(struct file *file,
|
|||
char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
char buf[32];
|
||||
unsigned int len;
|
||||
|
||||
len = sprintf(buf, "%d\n", sc->spec_config.fft_period);
|
||||
len = sprintf(buf, "%d\n", spec_priv->spec_config.fft_period);
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
}
|
||||
|
||||
|
@ -444,7 +518,7 @@ static ssize_t write_file_spectral_fft_period(struct file *file,
|
|||
const char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath_softc *sc = file->private_data;
|
||||
struct ath_spec_scan_priv *spec_priv = file->private_data;
|
||||
unsigned long val;
|
||||
char buf[32];
|
||||
ssize_t len;
|
||||
|
@ -460,7 +534,7 @@ static ssize_t write_file_spectral_fft_period(struct file *file,
|
|||
if (val > 15)
|
||||
return -EINVAL;
|
||||
|
||||
sc->spec_config.fft_period = val;
|
||||
spec_priv->spec_config.fft_period = val;
|
||||
return count;
|
||||
}
|
||||
|
||||
|
@ -506,38 +580,41 @@ static struct rchan_callbacks rfs_spec_scan_cb = {
|
|||
/* Debug Init/Deinit */
|
||||
/*********************/
|
||||
|
||||
void ath9k_spectral_deinit_debug(struct ath_softc *sc)
|
||||
void ath9k_cmn_spectral_deinit_debug(struct ath_spec_scan_priv *spec_priv)
|
||||
{
|
||||
if (config_enabled(CONFIG_ATH9K_DEBUGFS) && sc->rfs_chan_spec_scan) {
|
||||
relay_close(sc->rfs_chan_spec_scan);
|
||||
sc->rfs_chan_spec_scan = NULL;
|
||||
if (config_enabled(CONFIG_ATH9K_DEBUGFS) && spec_priv->rfs_chan_spec_scan) {
|
||||
relay_close(spec_priv->rfs_chan_spec_scan);
|
||||
spec_priv->rfs_chan_spec_scan = NULL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_cmn_spectral_deinit_debug);
|
||||
|
||||
void ath9k_spectral_init_debug(struct ath_softc *sc)
|
||||
void ath9k_cmn_spectral_init_debug(struct ath_spec_scan_priv *spec_priv,
|
||||
struct dentry *debugfs_phy)
|
||||
{
|
||||
sc->rfs_chan_spec_scan = relay_open("spectral_scan",
|
||||
sc->debug.debugfs_phy,
|
||||
spec_priv->rfs_chan_spec_scan = relay_open("spectral_scan",
|
||||
debugfs_phy,
|
||||
1024, 256, &rfs_spec_scan_cb,
|
||||
NULL);
|
||||
debugfs_create_file("spectral_scan_ctl",
|
||||
S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
debugfs_phy, spec_priv,
|
||||
&fops_spec_scan_ctl);
|
||||
debugfs_create_file("spectral_short_repeat",
|
||||
S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
debugfs_phy, spec_priv,
|
||||
&fops_spectral_short_repeat);
|
||||
debugfs_create_file("spectral_count",
|
||||
S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
debugfs_phy, spec_priv,
|
||||
&fops_spectral_count);
|
||||
debugfs_create_file("spectral_period",
|
||||
S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
debugfs_phy, spec_priv,
|
||||
&fops_spectral_period);
|
||||
debugfs_create_file("spectral_fft_period",
|
||||
S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc,
|
||||
debugfs_phy, spec_priv,
|
||||
&fops_spectral_fft_period);
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_cmn_spectral_init_debug);
|
|
@ -92,6 +92,13 @@ struct ath_ht20_40_fft_packet {
|
|||
struct ath_radar_info radar_info;
|
||||
} __packed;
|
||||
|
||||
struct ath_spec_scan_priv {
|
||||
struct ath_hw *ah;
|
||||
/* relay(fs) channel for spectral scan */
|
||||
struct rchan *rfs_chan_spec_scan;
|
||||
enum spectral_mode spectral_mode;
|
||||
struct ath_spec_scan spec_config;
|
||||
};
|
||||
|
||||
#define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
|
||||
|
||||
|
@ -123,23 +130,15 @@ static inline u8 spectral_bitmap_weight(u8 *bins)
|
|||
return bins[0] & 0x3f;
|
||||
}
|
||||
|
||||
void ath9k_spectral_init_debug(struct ath_softc *sc);
|
||||
void ath9k_spectral_deinit_debug(struct ath_softc *sc);
|
||||
void ath9k_cmn_spectral_init_debug(struct ath_spec_scan_priv *spec_priv, struct dentry *debugfs_phy);
|
||||
void ath9k_cmn_spectral_deinit_debug(struct ath_spec_scan_priv *spec_priv);
|
||||
|
||||
void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw);
|
||||
int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
|
||||
void ath9k_cmn_spectral_scan_trigger(struct ath_common *common,
|
||||
struct ath_spec_scan_priv *spec_priv);
|
||||
int ath9k_cmn_spectral_scan_config(struct ath_common *common,
|
||||
struct ath_spec_scan_priv *spec_priv,
|
||||
enum spectral_mode spectral_mode);
|
||||
|
||||
#ifdef CONFIG_ATH9K_DEBUGFS
|
||||
int ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
|
||||
int ath_cmn_process_fft(struct ath_spec_scan_priv *spec_priv, struct ieee80211_hdr *hdr,
|
||||
struct ath_rx_status *rs, u64 tsf);
|
||||
#else
|
||||
static inline int ath_process_fft(struct ath_softc *sc,
|
||||
struct ieee80211_hdr *hdr,
|
||||
struct ath_rx_status *rs, u64 tsf)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_ATH9K_DEBUGFS */
|
||||
|
||||
#endif /* SPECTRAL_H */
|
|
@ -159,7 +159,7 @@ void ath9k_cmn_rx_skb_postprocess(struct ath_common *common,
|
|||
if (test_bit(keyix, common->keymap))
|
||||
rxs->flag |= RX_FLAG_DECRYPTED;
|
||||
}
|
||||
if (ah->sw_mgmt_crypto &&
|
||||
if (ah->sw_mgmt_crypto_rx &&
|
||||
(rxs->flag & RX_FLAG_DECRYPTED) &&
|
||||
ieee80211_is_mgmt(fc))
|
||||
/* Use software decrypt for management frames. */
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#include "common-init.h"
|
||||
#include "common-beacon.h"
|
||||
#include "common-debug.h"
|
||||
#include "common-spectral.h"
|
||||
|
||||
/* Common header for Atheros 802.11n base driver cores */
|
||||
|
||||
|
|
|
@ -828,13 +828,14 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
|
|||
|
||||
i = 0;
|
||||
ath_for_each_chanctx(sc, ctx) {
|
||||
if (!ctx->assigned || list_empty(&ctx->vifs))
|
||||
if (list_empty(&ctx->vifs))
|
||||
continue;
|
||||
ath9k_calculate_iter_data(sc, ctx, &iter_data);
|
||||
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
"VIF-COUNTS: CTX %i AP: %i STA: %i MESH: %i WDS: %i",
|
||||
i++, iter_data.naps, iter_data.nstations,
|
||||
"VIFS: CTX %i(%i) AP: %i STA: %i MESH: %i WDS: %i",
|
||||
i++, (int)(ctx->assigned), iter_data.naps,
|
||||
iter_data.nstations,
|
||||
iter_data.nmeshes, iter_data.nwds);
|
||||
len += scnprintf(buf + len, sizeof(buf) - len,
|
||||
" ADHOC: %i TOTAL: %hi BEACON-VIF: %hi\n",
|
||||
|
@ -1310,7 +1311,7 @@ void ath9k_get_et_stats(struct ieee80211_hw *hw,
|
|||
|
||||
void ath9k_deinit_debug(struct ath_softc *sc)
|
||||
{
|
||||
ath9k_spectral_deinit_debug(sc);
|
||||
ath9k_cmn_spectral_deinit_debug(&sc->spec_priv);
|
||||
}
|
||||
|
||||
int ath9k_init_debug(struct ath_hw *ah)
|
||||
|
@ -1330,7 +1331,7 @@ int ath9k_init_debug(struct ath_hw *ah)
|
|||
|
||||
ath9k_dfs_init_debug(sc);
|
||||
ath9k_tx99_init_debug(sc);
|
||||
ath9k_spectral_init_debug(sc);
|
||||
ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy);
|
||||
|
||||
debugfs_create_file("dma", S_IRUSR, sc->debug.debugfs_phy, sc,
|
||||
&fops_dma);
|
||||
|
|
|
@ -25,7 +25,12 @@ static void ath_led_brightness(struct led_classdev *led_cdev,
|
|||
enum led_brightness brightness)
|
||||
{
|
||||
struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
|
||||
ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, (brightness == LED_OFF));
|
||||
u32 val = (brightness == LED_OFF);
|
||||
|
||||
if (sc->sc_ah->config.led_active_high)
|
||||
val = !val;
|
||||
|
||||
ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val);
|
||||
}
|
||||
|
||||
void ath_deinit_leds(struct ath_softc *sc)
|
||||
|
@ -82,7 +87,7 @@ void ath_fill_led_pin(struct ath_softc *sc)
|
|||
ath9k_hw_cfg_output(ah, ah->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
|
||||
|
||||
/* LED off, active low */
|
||||
ath9k_hw_set_gpio(ah, ah->led_pin, 1);
|
||||
ath9k_hw_set_gpio(ah, ah->led_pin, (ah->config.led_active_high) ? 0 : 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -481,6 +481,7 @@ struct ath9k_htc_priv {
|
|||
unsigned long op_flags;
|
||||
|
||||
struct ath9k_hw_cal_data caldata;
|
||||
struct ath_spec_scan_priv spec_priv;
|
||||
|
||||
spinlock_t beacon_lock;
|
||||
struct ath_beacon_config cur_beacon_conf;
|
||||
|
@ -625,8 +626,12 @@ int ath9k_htc_resume(struct htc_target *htc_handle);
|
|||
#endif
|
||||
#ifdef CONFIG_ATH9K_HTC_DEBUGFS
|
||||
int ath9k_htc_init_debug(struct ath_hw *ah);
|
||||
void ath9k_htc_deinit_debug(struct ath9k_htc_priv *priv);
|
||||
#else
|
||||
static inline int ath9k_htc_init_debug(struct ath_hw *ah) { return 0; };
|
||||
static inline void ath9k_htc_deinit_debug(struct ath9k_htc_priv *priv)
|
||||
{
|
||||
}
|
||||
#endif /* CONFIG_ATH9K_HTC_DEBUGFS */
|
||||
|
||||
#endif /* HTC_H */
|
||||
|
|
|
@ -490,6 +490,10 @@ void ath9k_htc_get_et_stats(struct ieee80211_hw *hw,
|
|||
WARN_ON(i != ATH9K_HTC_SSTATS_LEN);
|
||||
}
|
||||
|
||||
void ath9k_htc_deinit_debug(struct ath9k_htc_priv *priv)
|
||||
{
|
||||
ath9k_cmn_spectral_deinit_debug(&priv->spec_priv);
|
||||
}
|
||||
|
||||
int ath9k_htc_init_debug(struct ath_hw *ah)
|
||||
{
|
||||
|
@ -501,6 +505,8 @@ int ath9k_htc_init_debug(struct ath_hw *ah)
|
|||
if (!priv->debug.debugfs_phy)
|
||||
return -ENOMEM;
|
||||
|
||||
ath9k_cmn_spectral_init_debug(&priv->spec_priv, priv->debug.debugfs_phy);
|
||||
|
||||
debugfs_create_file("tgt_int_stats", S_IRUSR, priv->debug.debugfs_phy,
|
||||
priv, &fops_tgt_int_stats);
|
||||
debugfs_create_file("tgt_tx_stats", S_IRUSR, priv->debug.debugfs_phy,
|
||||
|
|
|
@ -53,6 +53,21 @@ static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
|
|||
};
|
||||
#endif
|
||||
|
||||
static void ath9k_htc_op_ps_wakeup(struct ath_common *common)
|
||||
{
|
||||
ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv);
|
||||
}
|
||||
|
||||
static void ath9k_htc_op_ps_restore(struct ath_common *common)
|
||||
{
|
||||
ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv);
|
||||
}
|
||||
|
||||
static struct ath_ps_ops ath9k_htc_ps_ops = {
|
||||
.wakeup = ath9k_htc_op_ps_wakeup,
|
||||
.restore = ath9k_htc_op_ps_restore,
|
||||
};
|
||||
|
||||
static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
|
||||
{
|
||||
int time_left;
|
||||
|
@ -87,6 +102,7 @@ static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
|
|||
|
||||
wiphy_rfkill_stop_polling(hw->wiphy);
|
||||
ath9k_deinit_leds(priv);
|
||||
ath9k_htc_deinit_debug(priv);
|
||||
ieee80211_unregister_hw(hw);
|
||||
ath9k_rx_cleanup(priv);
|
||||
ath9k_tx_cleanup(priv);
|
||||
|
@ -449,6 +465,14 @@ static void ath9k_init_misc(struct ath9k_htc_priv *priv)
|
|||
|
||||
common->last_rssi = ATH_RSSI_DUMMY_MARKER;
|
||||
priv->ah->opmode = NL80211_IFTYPE_STATION;
|
||||
|
||||
priv->spec_priv.ah = priv->ah;
|
||||
priv->spec_priv.spec_config.enabled = 0;
|
||||
priv->spec_priv.spec_config.short_repeat = false;
|
||||
priv->spec_priv.spec_config.count = 8;
|
||||
priv->spec_priv.spec_config.endless = false;
|
||||
priv->spec_priv.spec_config.period = 0x12;
|
||||
priv->spec_priv.spec_config.fft_period = 0x02;
|
||||
}
|
||||
|
||||
static int ath9k_init_priv(struct ath9k_htc_priv *priv,
|
||||
|
@ -478,6 +502,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv,
|
|||
|
||||
common = ath9k_hw_common(ah);
|
||||
common->ops = &ah->reg_ops;
|
||||
common->ps_ops = &ath9k_htc_ps_ops;
|
||||
common->bus_ops = &ath9k_usb_bus_ops;
|
||||
common->ah = ah;
|
||||
common->hw = priv->hw;
|
||||
|
|
|
@ -314,6 +314,10 @@ static int ath9k_htc_set_channel(struct ath9k_htc_priv *priv,
|
|||
mod_timer(&priv->tx.cleanup_timer,
|
||||
jiffies + msecs_to_jiffies(ATH9K_HTC_TX_CLEANUP_INTERVAL));
|
||||
|
||||
/* perform spectral scan if requested. */
|
||||
if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
|
||||
priv->spec_priv.spectral_mode == SPECTRAL_CHANSCAN)
|
||||
ath9k_cmn_spectral_scan_trigger(common, &priv->spec_priv);
|
||||
err:
|
||||
ath9k_htc_ps_restore(priv);
|
||||
return ret;
|
||||
|
@ -1443,7 +1447,7 @@ static int ath9k_htc_set_key(struct ieee80211_hw *hw,
|
|||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
|
||||
if (priv->ah->sw_mgmt_crypto &&
|
||||
if (priv->ah->sw_mgmt_crypto_tx &&
|
||||
key->cipher == WLAN_CIPHER_SUITE_CCMP)
|
||||
key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
|
||||
ret = 0;
|
||||
|
@ -1687,7 +1691,9 @@ static int ath9k_htc_ampdu_action(struct ieee80211_hw *hw,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void ath9k_htc_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void ath9k_htc_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct ath9k_htc_priv *priv = hw->priv;
|
||||
struct ath_common *common = ath9k_hw_common(priv->ah);
|
||||
|
@ -1701,7 +1707,8 @@ static void ath9k_htc_sw_scan_start(struct ieee80211_hw *hw)
|
|||
mutex_unlock(&priv->mutex);
|
||||
}
|
||||
|
||||
static void ath9k_htc_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void ath9k_htc_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct ath9k_htc_priv *priv = hw->priv;
|
||||
struct ath_common *common = ath9k_hw_common(priv->ah);
|
||||
|
|
|
@ -946,7 +946,7 @@ static inline void convert_htc_flag(struct ath_rx_status *rx_stats,
|
|||
static void rx_status_htc_to_ath(struct ath_rx_status *rx_stats,
|
||||
struct ath_htc_rx_status *rxstatus)
|
||||
{
|
||||
rx_stats->rs_datalen = rxstatus->rs_datalen;
|
||||
rx_stats->rs_datalen = be16_to_cpu(rxstatus->rs_datalen);
|
||||
rx_stats->rs_status = rxstatus->rs_status;
|
||||
rx_stats->rs_phyerr = rxstatus->rs_phyerr;
|
||||
rx_stats->rs_rssi = rxstatus->rs_rssi;
|
||||
|
@ -1012,6 +1012,20 @@ static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv,
|
|||
* separately to avoid doing two lookups for a rate for each frame.
|
||||
*/
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
|
||||
/*
|
||||
* Process PHY errors and return so that the packet
|
||||
* can be dropped.
|
||||
*/
|
||||
if (rx_stats.rs_status & ATH9K_RXERR_PHY) {
|
||||
/* TODO: Not using DFS processing now. */
|
||||
if (ath_cmn_process_fft(&priv->spec_priv, hdr,
|
||||
&rx_stats, rx_status->mactime)) {
|
||||
/* TODO: Code to collect spectral scan statistics */
|
||||
}
|
||||
goto rx_next;
|
||||
}
|
||||
|
||||
if (!ath9k_cmn_rx_accept(common, hdr, rx_status, &rx_stats,
|
||||
&decrypt_error, priv->rxfilter))
|
||||
goto rx_next;
|
||||
|
|
|
@ -870,19 +870,6 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
|
|||
udelay(RTC_PLL_SETTLE_DELAY);
|
||||
|
||||
REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
|
||||
|
||||
if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
|
||||
if (ah->is_clk_25mhz) {
|
||||
REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
|
||||
REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
|
||||
REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae);
|
||||
} else {
|
||||
REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1);
|
||||
REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400);
|
||||
REG_WRITE(ah, AR_SLP32_INC, 0x0001e800);
|
||||
}
|
||||
udelay(100);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
|
||||
|
@ -1598,16 +1585,22 @@ static void ath9k_hw_init_mfp(struct ath_hw *ah)
|
|||
* frames when constructing CCMP AAD. */
|
||||
REG_RMW_FIELD(ah, AR_AES_MUTE_MASK1, AR_AES_MUTE_MASK1_FC_MGMT,
|
||||
0xc7ff);
|
||||
ah->sw_mgmt_crypto = false;
|
||||
if (AR_SREV_9271(ah) || AR_DEVID_7010(ah))
|
||||
ah->sw_mgmt_crypto_tx = true;
|
||||
else
|
||||
ah->sw_mgmt_crypto_tx = false;
|
||||
ah->sw_mgmt_crypto_rx = false;
|
||||
} else if (AR_SREV_9160_10_OR_LATER(ah)) {
|
||||
/* Disable hardware crypto for management frames */
|
||||
REG_CLR_BIT(ah, AR_PCU_MISC_MODE2,
|
||||
AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE);
|
||||
REG_SET_BIT(ah, AR_PCU_MISC_MODE2,
|
||||
AR_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT);
|
||||
ah->sw_mgmt_crypto = true;
|
||||
ah->sw_mgmt_crypto_tx = true;
|
||||
ah->sw_mgmt_crypto_rx = true;
|
||||
} else {
|
||||
ah->sw_mgmt_crypto = true;
|
||||
ah->sw_mgmt_crypto_tx = true;
|
||||
ah->sw_mgmt_crypto_rx = true;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1954,6 +1947,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
|
||||
REGWRITE_BUFFER_FLUSH(ah);
|
||||
|
||||
ath9k_hw_gen_timer_start_tsf2(ah);
|
||||
|
||||
ath9k_hw_init_desc(ah);
|
||||
|
||||
if (ath9k_hw_btcoex_is_enabled(ah))
|
||||
|
@ -2333,7 +2328,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
|
|||
struct ath9k_hw_capabilities *pCap = &ah->caps;
|
||||
struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
unsigned int chip_chainmask;
|
||||
|
||||
u16 eeval;
|
||||
u8 ant_div_ctl1, tx_chainmask, rx_chainmask;
|
||||
|
@ -2377,15 +2371,16 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
|
|||
AR_SREV_9285(ah) ||
|
||||
AR_SREV_9330(ah) ||
|
||||
AR_SREV_9565(ah))
|
||||
chip_chainmask = 1;
|
||||
else if (AR_SREV_9462(ah))
|
||||
chip_chainmask = 3;
|
||||
pCap->chip_chainmask = 1;
|
||||
else if (!AR_SREV_9280_20_OR_LATER(ah))
|
||||
chip_chainmask = 7;
|
||||
else if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9340(ah))
|
||||
chip_chainmask = 3;
|
||||
pCap->chip_chainmask = 7;
|
||||
else if (!AR_SREV_9300_20_OR_LATER(ah) ||
|
||||
AR_SREV_9340(ah) ||
|
||||
AR_SREV_9462(ah) ||
|
||||
AR_SREV_9531(ah))
|
||||
pCap->chip_chainmask = 3;
|
||||
else
|
||||
chip_chainmask = 7;
|
||||
pCap->chip_chainmask = 7;
|
||||
|
||||
pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK);
|
||||
/*
|
||||
|
@ -2403,8 +2398,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
|
|||
/* Use rx_chainmask from EEPROM. */
|
||||
pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK);
|
||||
|
||||
pCap->tx_chainmask = fixup_chainmask(chip_chainmask, pCap->tx_chainmask);
|
||||
pCap->rx_chainmask = fixup_chainmask(chip_chainmask, pCap->rx_chainmask);
|
||||
pCap->tx_chainmask = fixup_chainmask(pCap->chip_chainmask, pCap->tx_chainmask);
|
||||
pCap->rx_chainmask = fixup_chainmask(pCap->chip_chainmask, pCap->rx_chainmask);
|
||||
ah->txchainmask = pCap->tx_chainmask;
|
||||
ah->rxchainmask = pCap->rx_chainmask;
|
||||
|
||||
|
@ -2918,6 +2913,16 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
|
|||
}
|
||||
EXPORT_SYMBOL(ath9k_hw_gettsf32);
|
||||
|
||||
void ath9k_hw_gen_timer_start_tsf2(struct ath_hw *ah)
|
||||
{
|
||||
struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
|
||||
|
||||
if (timer_table->tsf2_enabled) {
|
||||
REG_SET_BIT(ah, AR_DIRECT_CONNECT, AR_DC_AP_STA_EN);
|
||||
REG_SET_BIT(ah, AR_RESET_TSF, AR_RESET_TSF2_ONCE);
|
||||
}
|
||||
}
|
||||
|
||||
struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
|
||||
void (*trigger)(void *),
|
||||
void (*overflow)(void *),
|
||||
|
@ -2931,6 +2936,10 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
|
|||
(timer_index >= ATH_MAX_GEN_TIMER))
|
||||
return NULL;
|
||||
|
||||
if ((timer_index > AR_FIRST_NDP_TIMER) &&
|
||||
!AR_SREV_9300_20_OR_LATER(ah))
|
||||
return NULL;
|
||||
|
||||
timer = kzalloc(sizeof(struct ath_gen_timer), GFP_KERNEL);
|
||||
if (timer == NULL)
|
||||
return NULL;
|
||||
|
@ -2942,6 +2951,11 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
|
|||
timer->overflow = overflow;
|
||||
timer->arg = arg;
|
||||
|
||||
if ((timer_index > AR_FIRST_NDP_TIMER) && !timer_table->tsf2_enabled) {
|
||||
timer_table->tsf2_enabled = true;
|
||||
ath9k_hw_gen_timer_start_tsf2(ah);
|
||||
}
|
||||
|
||||
return timer;
|
||||
}
|
||||
EXPORT_SYMBOL(ath_gen_timer_alloc);
|
||||
|
|
|
@ -276,6 +276,7 @@ struct ath9k_hw_capabilities {
|
|||
u16 rts_aggr_limit;
|
||||
u8 tx_chainmask;
|
||||
u8 rx_chainmask;
|
||||
u8 chip_chainmask;
|
||||
u8 max_txchains;
|
||||
u8 max_rxchains;
|
||||
u8 num_gpio_pins;
|
||||
|
@ -329,6 +330,7 @@ struct ath9k_ops_config {
|
|||
bool alt_mingainidx;
|
||||
bool no_pll_pwrsave;
|
||||
bool tx_gain_buffalo;
|
||||
bool led_active_high;
|
||||
};
|
||||
|
||||
enum ath9k_int {
|
||||
|
@ -524,6 +526,7 @@ struct ath_gen_timer {
|
|||
struct ath_gen_timer_table {
|
||||
struct ath_gen_timer *timers[ATH_MAX_GEN_TIMER];
|
||||
u16 timer_mask;
|
||||
bool tsf2_enabled;
|
||||
};
|
||||
|
||||
struct ath_hw_antcomb_conf {
|
||||
|
@ -753,7 +756,8 @@ struct ath_hw {
|
|||
} eeprom;
|
||||
const struct eeprom_ops *eep_ops;
|
||||
|
||||
bool sw_mgmt_crypto;
|
||||
bool sw_mgmt_crypto_tx;
|
||||
bool sw_mgmt_crypto_rx;
|
||||
bool is_pciexpress;
|
||||
bool aspm_enabled;
|
||||
bool is_monitoring;
|
||||
|
@ -1035,6 +1039,7 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
|
|||
struct ath_gen_timer *timer,
|
||||
u32 timer_next,
|
||||
u32 timer_period);
|
||||
void ath9k_hw_gen_timer_start_tsf2(struct ath_hw *ah);
|
||||
void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer);
|
||||
|
||||
void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer);
|
||||
|
|
|
@ -88,6 +88,21 @@ static const struct ieee80211_tpt_blink ath9k_tpt_blink[] = {
|
|||
|
||||
static void ath9k_deinit_softc(struct ath_softc *sc);
|
||||
|
||||
static void ath9k_op_ps_wakeup(struct ath_common *common)
|
||||
{
|
||||
ath9k_ps_wakeup((struct ath_softc *) common->priv);
|
||||
}
|
||||
|
||||
static void ath9k_op_ps_restore(struct ath_common *common)
|
||||
{
|
||||
ath9k_ps_restore((struct ath_softc *) common->priv);
|
||||
}
|
||||
|
||||
static struct ath_ps_ops ath9k_ps_ops = {
|
||||
.wakeup = ath9k_op_ps_wakeup,
|
||||
.restore = ath9k_op_ps_restore,
|
||||
};
|
||||
|
||||
/*
|
||||
* Read and write, they both share the same lock. We do this to serialize
|
||||
* reads and writes on Atheros 802.11n PCI devices only. This is required
|
||||
|
@ -172,17 +187,20 @@ static void ath9k_reg_notifier(struct wiphy *wiphy,
|
|||
ath_reg_notifier_apply(wiphy, request, reg);
|
||||
|
||||
/* Set tx power */
|
||||
if (ah->curchan) {
|
||||
if (!ah->curchan)
|
||||
return;
|
||||
|
||||
sc->cur_chan->txpower = 2 * ah->curchan->chan->max_power;
|
||||
ath9k_ps_wakeup(sc);
|
||||
ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
|
||||
sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
|
||||
ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
|
||||
sc->cur_chan->txpower,
|
||||
&sc->cur_chan->cur_txpower);
|
||||
/* synchronize DFS detector if regulatory domain changed */
|
||||
if (sc->dfs_detector != NULL)
|
||||
sc->dfs_detector->set_dfs_domain(sc->dfs_detector,
|
||||
request->dfs_region);
|
||||
ath9k_ps_restore(sc);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -348,12 +366,13 @@ static void ath9k_init_misc(struct ath_softc *sc)
|
|||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
|
||||
sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT;
|
||||
|
||||
sc->spec_config.enabled = 0;
|
||||
sc->spec_config.short_repeat = true;
|
||||
sc->spec_config.count = 8;
|
||||
sc->spec_config.endless = false;
|
||||
sc->spec_config.period = 0xFF;
|
||||
sc->spec_config.fft_period = 0xF;
|
||||
sc->spec_priv.ah = sc->sc_ah;
|
||||
sc->spec_priv.spec_config.enabled = 0;
|
||||
sc->spec_priv.spec_config.short_repeat = true;
|
||||
sc->spec_priv.spec_config.count = 8;
|
||||
sc->spec_priv.spec_config.endless = false;
|
||||
sc->spec_priv.spec_config.period = 0xFF;
|
||||
sc->spec_priv.spec_config.fft_period = 0xF;
|
||||
}
|
||||
|
||||
static void ath9k_init_pcoem_platform(struct ath_softc *sc)
|
||||
|
@ -422,6 +441,9 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc)
|
|||
ah->config.no_pll_pwrsave = true;
|
||||
ath_info(common, "Disable PLL PowerSave\n");
|
||||
}
|
||||
|
||||
if (sc->driver_data & ATH9K_PCI_LED_ACT_HI)
|
||||
ah->config.led_active_high = true;
|
||||
}
|
||||
|
||||
static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
|
||||
|
@ -539,6 +561,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
|
|||
|
||||
common->ops = &ah->reg_ops;
|
||||
common->bus_ops = bus_ops;
|
||||
common->ps_ops = &ath9k_ps_ops;
|
||||
common->ah = ah;
|
||||
common->hw = sc->hw;
|
||||
common->priv = sc;
|
||||
|
|
|
@ -233,8 +233,9 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)
|
|||
|
||||
ath9k_calculate_summary_state(sc, sc->cur_chan);
|
||||
ath_startrecv(sc);
|
||||
ath9k_cmn_update_txpow(ah, sc->curtxpow,
|
||||
sc->cur_chan->txpower, &sc->curtxpow);
|
||||
ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
|
||||
sc->cur_chan->txpower,
|
||||
&sc->cur_chan->cur_txpower);
|
||||
clear_bit(ATH_OP_HW_RESET, &common->op_flags);
|
||||
|
||||
if (!sc->cur_chan->offchannel && start) {
|
||||
|
@ -726,7 +727,8 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
if (ah->led_pin >= 0) {
|
||||
ath9k_hw_cfg_output(ah, ah->led_pin,
|
||||
AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
|
||||
ath9k_hw_set_gpio(ah, ah->led_pin, 0);
|
||||
ath9k_hw_set_gpio(ah, ah->led_pin,
|
||||
(ah->config.led_active_high) ? 1 : 0);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -868,7 +870,8 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
spin_lock_bh(&sc->sc_pcu_lock);
|
||||
|
||||
if (ah->led_pin >= 0) {
|
||||
ath9k_hw_set_gpio(ah, ah->led_pin, 1);
|
||||
ath9k_hw_set_gpio(ah, ah->led_pin,
|
||||
(ah->config.led_active_high) ? 0 : 1);
|
||||
ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
|
||||
}
|
||||
|
||||
|
@ -1187,7 +1190,8 @@ static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
|
|||
for (i = 0; i < IEEE80211_NUM_ACS; i++)
|
||||
vif->hw_queue[i] = i;
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_AP)
|
||||
if (vif->type == NL80211_IFTYPE_AP ||
|
||||
vif->type == NL80211_IFTYPE_MESH_POINT)
|
||||
vif->cab_queue = hw->queues - 2;
|
||||
else
|
||||
vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
|
||||
|
@ -1339,78 +1343,6 @@ static void ath9k_disable_ps(struct ath_softc *sc)
|
|||
ath_dbg(common, PS, "PowerSave disabled\n");
|
||||
}
|
||||
|
||||
void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
u32 rxfilter;
|
||||
|
||||
if (config_enabled(CONFIG_ATH9K_TX99))
|
||||
return;
|
||||
|
||||
if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
|
||||
ath_err(common, "spectrum analyzer not implemented on this hardware\n");
|
||||
return;
|
||||
}
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
rxfilter = ath9k_hw_getrxfilter(ah);
|
||||
ath9k_hw_setrxfilter(ah, rxfilter |
|
||||
ATH9K_RX_FILTER_PHYRADAR |
|
||||
ATH9K_RX_FILTER_PHYERR);
|
||||
|
||||
/* TODO: usually this should not be neccesary, but for some reason
|
||||
* (or in some mode?) the trigger must be called after the
|
||||
* configuration, otherwise the register will have its values reset
|
||||
* (on my ar9220 to value 0x01002310)
|
||||
*/
|
||||
ath9k_spectral_scan_config(hw, sc->spectral_mode);
|
||||
ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
|
||||
ath9k_ps_restore(sc);
|
||||
}
|
||||
|
||||
int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
|
||||
enum spectral_mode spectral_mode)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
|
||||
ath_err(common, "spectrum analyzer not implemented on this hardware\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
switch (spectral_mode) {
|
||||
case SPECTRAL_DISABLED:
|
||||
sc->spec_config.enabled = 0;
|
||||
break;
|
||||
case SPECTRAL_BACKGROUND:
|
||||
/* send endless samples.
|
||||
* TODO: is this really useful for "background"?
|
||||
*/
|
||||
sc->spec_config.endless = 1;
|
||||
sc->spec_config.enabled = 1;
|
||||
break;
|
||||
case SPECTRAL_CHANSCAN:
|
||||
case SPECTRAL_MANUAL:
|
||||
sc->spec_config.endless = 0;
|
||||
sc->spec_config.enabled = 1;
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
sc->spectral_mode = spectral_mode;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
|
@ -1471,8 +1403,9 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
|||
if (changed & IEEE80211_CONF_CHANGE_POWER) {
|
||||
ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
|
||||
sc->cur_chan->txpower = 2 * conf->power_level;
|
||||
ath9k_cmn_update_txpow(ah, sc->curtxpow,
|
||||
sc->cur_chan->txpower, &sc->curtxpow);
|
||||
ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
|
||||
sc->cur_chan->txpower,
|
||||
&sc->cur_chan->cur_txpower);
|
||||
}
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
@ -1727,7 +1660,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
|||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
|
||||
if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
|
||||
key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
|
||||
if (sc->sc_ah->sw_mgmt_crypto &&
|
||||
if (sc->sc_ah->sw_mgmt_crypto_tx &&
|
||||
key->cipher == WLAN_CIPHER_SUITE_CCMP)
|
||||
key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
|
||||
ret = 0;
|
||||
|
@ -2250,14 +2183,17 @@ static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
set_bit(ATH_OP_SCANNING, &common->op_flags);
|
||||
}
|
||||
|
||||
static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
|
@ -2266,6 +2202,28 @@ static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
|
|||
|
||||
#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
|
||||
|
||||
static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
|
||||
if (sc->offchannel.roc_vif) {
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
"%s: Aborting RoC\n", __func__);
|
||||
|
||||
del_timer_sync(&sc->offchannel.timer);
|
||||
if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
|
||||
ath_roc_complete(sc, true);
|
||||
}
|
||||
|
||||
if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
"%s: Aborting HW scan\n", __func__);
|
||||
|
||||
del_timer_sync(&sc->offchannel.timer);
|
||||
ath_scan_complete(sc, true);
|
||||
}
|
||||
}
|
||||
|
||||
static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_scan_request *hw_req)
|
||||
{
|
||||
|
@ -2452,6 +2410,8 @@ static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
|
|||
struct ath_chanctx *ctx = ath_chanctx_get(conf);
|
||||
int i;
|
||||
|
||||
ath9k_cancel_pending_offchannel(sc);
|
||||
|
||||
mutex_lock(&sc->mutex);
|
||||
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
|
@ -2481,6 +2441,8 @@ static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
|
|||
struct ath_chanctx *ctx = ath_chanctx_get(conf);
|
||||
int ac;
|
||||
|
||||
ath9k_cancel_pending_offchannel(sc);
|
||||
|
||||
mutex_lock(&sc->mutex);
|
||||
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
|
@ -2526,18 +2488,7 @@ static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
|
|||
if (!changed)
|
||||
goto out;
|
||||
|
||||
if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
"%s: Aborting HW scan\n", __func__);
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
||||
del_timer_sync(&sc->offchannel.timer);
|
||||
ath_scan_complete(sc, true);
|
||||
flush_work(&sc->chanctx_work);
|
||||
|
||||
mutex_lock(&sc->mutex);
|
||||
}
|
||||
ath9k_cancel_pending_offchannel(sc);
|
||||
|
||||
go_ctx = ath_is_go_chanctx_present(sc);
|
||||
|
||||
|
@ -2552,13 +2503,22 @@ static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
|
|||
beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
|
||||
spin_unlock_bh(&sc->chan_lock);
|
||||
|
||||
timeout = usecs_to_jiffies(beacon_int);
|
||||
timeout = usecs_to_jiffies(beacon_int * 2);
|
||||
init_completion(&sc->go_beacon);
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
||||
if (wait_for_completion_timeout(&sc->go_beacon,
|
||||
timeout) == 0)
|
||||
timeout) == 0) {
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
"Failed to send new NoA\n");
|
||||
|
||||
spin_lock_bh(&sc->chan_lock);
|
||||
sc->sched.mgd_prepare_tx = false;
|
||||
spin_unlock_bh(&sc->chan_lock);
|
||||
}
|
||||
|
||||
mutex_lock(&sc->mutex);
|
||||
}
|
||||
|
||||
ath_dbg(common, CHAN_CTX,
|
||||
|
@ -2594,6 +2554,24 @@ void ath9k_fill_chanctx_ops(void)
|
|||
|
||||
#endif
|
||||
|
||||
static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
int *dbm)
|
||||
{
|
||||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_vif *avp = (void *)vif->drv_priv;
|
||||
|
||||
mutex_lock(&sc->mutex);
|
||||
if (avp->chanctx)
|
||||
*dbm = avp->chanctx->cur_txpower;
|
||||
else
|
||||
*dbm = sc->cur_chan->cur_txpower;
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
||||
*dbm /= 2;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct ieee80211_ops ath9k_ops = {
|
||||
.tx = ath9k_tx,
|
||||
.start = ath9k_start,
|
||||
|
@ -2640,4 +2618,5 @@ struct ieee80211_ops ath9k_ops = {
|
|||
#endif
|
||||
.sw_scan_start = ath9k_sw_scan_start,
|
||||
.sw_scan_complete = ath9k_sw_scan_complete,
|
||||
.get_txpower = ath9k_get_txpower,
|
||||
};
|
||||
|
|
|
@ -657,7 +657,9 @@ static const struct pci_device_id ath_pci_id_table[] = {
|
|||
0x0036,
|
||||
PCI_VENDOR_ID_DELL,
|
||||
0x020E),
|
||||
.driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
|
||||
.driver_data = ATH9K_PCI_AR9565_2ANT |
|
||||
ATH9K_PCI_BT_ANT_DIV |
|
||||
ATH9K_PCI_LED_ACT_HI},
|
||||
|
||||
/* PCI-E AR9565 (WB335) */
|
||||
{ PCI_VDEVICE(ATHEROS, 0x0036),
|
||||
|
|
|
@ -870,7 +870,7 @@ static int ath9k_rx_skb_preprocess(struct ath_softc *sc,
|
|||
*/
|
||||
if (rx_stats->rs_status & ATH9K_RXERR_PHY) {
|
||||
ath9k_dfs_process_phyerr(sc, hdr, rx_stats, rx_status->mactime);
|
||||
if (ath_process_fft(sc, hdr, rx_stats, rx_status->mactime))
|
||||
if (ath_cmn_process_fft(&sc->spec_priv, hdr, rx_stats, rx_status->mactime))
|
||||
RX_STAT_INC(rx_spectral);
|
||||
|
||||
return -EINVAL;
|
||||
|
|
|
@ -1605,6 +1605,7 @@ enum {
|
|||
|
||||
#define AR_RESET_TSF 0x8020
|
||||
#define AR_RESET_TSF_ONCE 0x01000000
|
||||
#define AR_RESET_TSF2_ONCE 0x02000000
|
||||
|
||||
#define AR_MAX_CFP_DUR 0x8038
|
||||
#define AR_CFP_VAL 0x0000FFFF
|
||||
|
@ -1966,6 +1967,8 @@ enum {
|
|||
#define AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET 0x80000000
|
||||
#define AR_MAC_PCU_GEN_TIMER_TSF_SEL 0x83d8
|
||||
|
||||
#define AR_DIRECT_CONNECT 0x83a0
|
||||
#define AR_DC_AP_STA_EN 0x00000001
|
||||
|
||||
#define AR_AES_MUTE_MASK0 0x805c
|
||||
#define AR_AES_MUTE_MASK0_FC 0x0000FFFF
|
||||
|
|
|
@ -494,7 +494,9 @@ out:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void wcn36xx_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void wcn36xx_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct wcn36xx *wcn = hw->priv;
|
||||
|
||||
|
@ -502,7 +504,8 @@ static void wcn36xx_sw_scan_start(struct ieee80211_hw *hw)
|
|||
wcn36xx_smd_start_scan(wcn);
|
||||
}
|
||||
|
||||
static void wcn36xx_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void wcn36xx_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct wcn36xx *wcn = hw->priv;
|
||||
|
||||
|
|
|
@ -5110,7 +5110,9 @@ static void b43_op_sta_notify(struct ieee80211_hw *hw,
|
|||
B43_WARN_ON(!vif || wl->vif != vif);
|
||||
}
|
||||
|
||||
static void b43_op_sw_scan_start_notifier(struct ieee80211_hw *hw)
|
||||
static void b43_op_sw_scan_start_notifier(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct b43_wl *wl = hw_to_b43_wl(hw);
|
||||
struct b43_wldev *dev;
|
||||
|
@ -5124,7 +5126,8 @@ static void b43_op_sw_scan_start_notifier(struct ieee80211_hw *hw)
|
|||
mutex_unlock(&wl->mutex);
|
||||
}
|
||||
|
||||
static void b43_op_sw_scan_complete_notifier(struct ieee80211_hw *hw)
|
||||
static void b43_op_sw_scan_complete_notifier(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct b43_wl *wl = hw_to_b43_wl(hw);
|
||||
struct b43_wldev *dev;
|
||||
|
|
|
@ -300,9 +300,7 @@ void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value)
|
|||
|
||||
void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
|
||||
{
|
||||
assert_mac_suspended(dev);
|
||||
dev->phy.ops->phy_write(dev, destreg,
|
||||
dev->phy.ops->phy_read(dev, srcreg));
|
||||
b43_phy_write(dev, destreg, b43_phy_read(dev, srcreg));
|
||||
}
|
||||
|
||||
void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)
|
||||
|
|
|
@ -299,6 +299,7 @@ static u16 chandef_to_chanspec(struct brcmu_d11inf *d11inf,
|
|||
primary_offset = ch->center_freq1 - ch->chan->center_freq;
|
||||
switch (ch->width) {
|
||||
case NL80211_CHAN_WIDTH_20:
|
||||
case NL80211_CHAN_WIDTH_20_NOHT:
|
||||
ch_inf.bw = BRCMU_CHAN_BW_20;
|
||||
WARN_ON(primary_offset != 0);
|
||||
break;
|
||||
|
@ -323,6 +324,10 @@ static u16 chandef_to_chanspec(struct brcmu_d11inf *d11inf,
|
|||
ch_inf.sb = BRCMU_CHAN_SB_LU;
|
||||
}
|
||||
break;
|
||||
case NL80211_CHAN_WIDTH_80P80:
|
||||
case NL80211_CHAN_WIDTH_160:
|
||||
case NL80211_CHAN_WIDTH_5:
|
||||
case NL80211_CHAN_WIDTH_10:
|
||||
default:
|
||||
WARN_ON_ONCE(1);
|
||||
}
|
||||
|
@ -333,6 +338,7 @@ static u16 chandef_to_chanspec(struct brcmu_d11inf *d11inf,
|
|||
case IEEE80211_BAND_5GHZ:
|
||||
ch_inf.band = BRCMU_CHAN_BAND_5G;
|
||||
break;
|
||||
case IEEE80211_BAND_60GHZ:
|
||||
default:
|
||||
WARN_ON_ONCE(1);
|
||||
}
|
||||
|
|
|
@ -262,7 +262,6 @@ static void brcmf_fw_request_nvram_done(const struct firmware *fw, void *ctx)
|
|||
|
||||
fail:
|
||||
brcmf_dbg(TRACE, "failed: dev=%s\n", dev_name(fwctx->dev));
|
||||
if (fwctx->code)
|
||||
release_firmware(fwctx->code);
|
||||
device_release_driver(fwctx->dev);
|
||||
kfree(fwctx);
|
||||
|
|
|
@ -518,7 +518,6 @@ static int brcmf_msgbuf_query_dcmd(struct brcmf_pub *drvr, int ifidx,
|
|||
memcpy(buf, skb->data, (len < msgbuf->ioctl_resp_ret_len) ?
|
||||
len : msgbuf->ioctl_resp_ret_len);
|
||||
}
|
||||
if (skb)
|
||||
brcmu_pkt_buf_free_skb(skb);
|
||||
|
||||
return msgbuf->ioctl_resp_status;
|
||||
|
|
|
@ -764,7 +764,9 @@ brcms_ops_configure_filter(struct ieee80211_hw *hw,
|
|||
return;
|
||||
}
|
||||
|
||||
static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct brcms_info *wl = hw->priv;
|
||||
spin_lock_bh(&wl->lock);
|
||||
|
@ -773,7 +775,8 @@ static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw)
|
|||
return;
|
||||
}
|
||||
|
||||
static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct brcms_info *wl = hw->priv;
|
||||
spin_lock_bh(&wl->lock);
|
||||
|
|
|
@ -1009,7 +1009,6 @@ brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
|
|||
if (txh)
|
||||
trace_brcms_txdesc(&wlc->hw->d11core->dev, txh,
|
||||
sizeof(*txh));
|
||||
if (p)
|
||||
brcmu_pkt_buf_free_skb(p);
|
||||
}
|
||||
|
||||
|
|
|
@ -78,7 +78,7 @@ int cw1200_hw_scan(struct ieee80211_hw *hw,
|
|||
if (req->n_ssids > WSM_SCAN_MAX_NUM_OF_SSIDS)
|
||||
return -EINVAL;
|
||||
|
||||
frame.skb = ieee80211_probereq_get(hw, priv->vif, NULL, 0,
|
||||
frame.skb = ieee80211_probereq_get(hw, priv->vif->addr, NULL, 0,
|
||||
req->ie_len);
|
||||
if (!frame.skb)
|
||||
return -ENOMEM;
|
||||
|
|
|
@ -603,16 +603,6 @@ static int iwl_mvm_cancel_regular_scan(struct iwl_mvm *mvm)
|
|||
SCAN_COMPLETE_NOTIFICATION };
|
||||
int ret;
|
||||
|
||||
if (mvm->scan_status == IWL_MVM_SCAN_NONE)
|
||||
return 0;
|
||||
|
||||
if (iwl_mvm_is_radio_killed(mvm)) {
|
||||
ieee80211_scan_completed(mvm->hw, true);
|
||||
iwl_mvm_unref(mvm, IWL_MVM_REF_SCAN);
|
||||
mvm->scan_status = IWL_MVM_SCAN_NONE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
iwl_init_notification_wait(&mvm->notif_wait, &wait_scan_abort,
|
||||
scan_abort_notif,
|
||||
ARRAY_SIZE(scan_abort_notif),
|
||||
|
@ -1431,6 +1421,16 @@ int iwl_mvm_unified_sched_scan_lmac(struct iwl_mvm *mvm,
|
|||
|
||||
int iwl_mvm_cancel_scan(struct iwl_mvm *mvm)
|
||||
{
|
||||
if (mvm->scan_status == IWL_MVM_SCAN_NONE)
|
||||
return 0;
|
||||
|
||||
if (iwl_mvm_is_radio_killed(mvm)) {
|
||||
ieee80211_scan_completed(mvm->hw, true);
|
||||
iwl_mvm_unref(mvm, IWL_MVM_REF_SCAN);
|
||||
mvm->scan_status = IWL_MVM_SCAN_NONE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_LMAC_SCAN)
|
||||
return iwl_mvm_scan_offload_stop(mvm, true);
|
||||
return iwl_mvm_cancel_regular_scan(mvm);
|
||||
|
|
|
@ -1898,8 +1898,7 @@ static u32 iwl_trans_pcie_dump_prph(struct iwl_trans *trans,
|
|||
int reg;
|
||||
__le32 *val;
|
||||
|
||||
prph_len += sizeof(*data) + sizeof(*prph) +
|
||||
num_bytes_in_chunk;
|
||||
prph_len += sizeof(**data) + sizeof(*prph) + num_bytes_in_chunk;
|
||||
|
||||
(*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
|
||||
(*data)->len = cpu_to_le32(sizeof(*prph) +
|
||||
|
|
|
@ -415,6 +415,8 @@ struct mac80211_hwsim_data {
|
|||
bool destroy_on_close;
|
||||
struct work_struct destroy_work;
|
||||
u32 portid;
|
||||
char alpha2[2];
|
||||
const struct ieee80211_regdomain *regd;
|
||||
|
||||
struct ieee80211_channel *tmp_chan;
|
||||
struct delayed_work roc_done;
|
||||
|
@ -422,6 +424,7 @@ struct mac80211_hwsim_data {
|
|||
struct cfg80211_scan_request *hw_scan_request;
|
||||
struct ieee80211_vif *hw_scan_vif;
|
||||
int scan_chan_idx;
|
||||
u8 scan_addr[ETH_ALEN];
|
||||
|
||||
struct ieee80211_channel *channel;
|
||||
u64 beacon_int /* beacon interval in us */;
|
||||
|
@ -830,6 +833,9 @@ static bool mac80211_hwsim_addr_match(struct mac80211_hwsim_data *data,
|
|||
.ret = false,
|
||||
};
|
||||
|
||||
if (data->scanning && memcmp(addr, data->scan_addr, ETH_ALEN) == 0)
|
||||
return true;
|
||||
|
||||
memcpy(md.addr, addr, ETH_ALEN);
|
||||
|
||||
ieee80211_iterate_active_interfaces_atomic(data->hw,
|
||||
|
@ -984,6 +990,53 @@ static void mac80211_hwsim_tx_iter(void *_data, u8 *addr,
|
|||
data->receive = true;
|
||||
}
|
||||
|
||||
static void mac80211_hwsim_add_vendor_rtap(struct sk_buff *skb)
|
||||
{
|
||||
/*
|
||||
* To enable this code, #define the HWSIM_RADIOTAP_OUI,
|
||||
* e.g. like this:
|
||||
* #define HWSIM_RADIOTAP_OUI "\x02\x00\x00"
|
||||
* (but you should use a valid OUI, not that)
|
||||
*
|
||||
* If anyone wants to 'donate' a radiotap OUI/subns code
|
||||
* please send a patch removing this #ifdef and changing
|
||||
* the values accordingly.
|
||||
*/
|
||||
#ifdef HWSIM_RADIOTAP_OUI
|
||||
struct ieee80211_vendor_radiotap *rtap;
|
||||
|
||||
/*
|
||||
* Note that this code requires the headroom in the SKB
|
||||
* that was allocated earlier.
|
||||
*/
|
||||
rtap = (void *)skb_push(skb, sizeof(*rtap) + 8 + 4);
|
||||
rtap->oui[0] = HWSIM_RADIOTAP_OUI[0];
|
||||
rtap->oui[1] = HWSIM_RADIOTAP_OUI[1];
|
||||
rtap->oui[2] = HWSIM_RADIOTAP_OUI[2];
|
||||
rtap->subns = 127;
|
||||
|
||||
/*
|
||||
* Radiotap vendor namespaces can (and should) also be
|
||||
* split into fields by using the standard radiotap
|
||||
* presence bitmap mechanism. Use just BIT(0) here for
|
||||
* the presence bitmap.
|
||||
*/
|
||||
rtap->present = BIT(0);
|
||||
/* We have 8 bytes of (dummy) data */
|
||||
rtap->len = 8;
|
||||
/* For testing, also require it to be aligned */
|
||||
rtap->align = 8;
|
||||
/* And also test that padding works, 4 bytes */
|
||||
rtap->pad = 4;
|
||||
/* push the data */
|
||||
memcpy(rtap->data, "ABCDEFGH", 8);
|
||||
/* make sure to clear padding, mac80211 doesn't */
|
||||
memset(rtap->data + 8, 0, 4);
|
||||
|
||||
IEEE80211_SKB_RXCB(skb)->flag |= RX_FLAG_RADIOTAP_VENDOR_DATA;
|
||||
#endif
|
||||
}
|
||||
|
||||
static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw,
|
||||
struct sk_buff *skb,
|
||||
struct ieee80211_channel *chan)
|
||||
|
@ -1098,6 +1151,9 @@ static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw,
|
|||
rx_status.mactime = now + data2->tsf_offset;
|
||||
|
||||
memcpy(IEEE80211_SKB_RXCB(nskb), &rx_status, sizeof(rx_status));
|
||||
|
||||
mac80211_hwsim_add_vendor_rtap(nskb);
|
||||
|
||||
data2->rx_pkts++;
|
||||
data2->rx_bytes += nskb->len;
|
||||
ieee80211_rx_irqsafe(data2->hw, nskb);
|
||||
|
@ -1752,7 +1808,7 @@ static void hw_scan_work(struct work_struct *work)
|
|||
struct sk_buff *probe;
|
||||
|
||||
probe = ieee80211_probereq_get(hwsim->hw,
|
||||
hwsim->hw_scan_vif,
|
||||
hwsim->scan_addr,
|
||||
req->ssids[i].ssid,
|
||||
req->ssids[i].ssid_len,
|
||||
req->ie_len);
|
||||
|
@ -1790,6 +1846,12 @@ static int mac80211_hwsim_hw_scan(struct ieee80211_hw *hw,
|
|||
hwsim->hw_scan_request = req;
|
||||
hwsim->hw_scan_vif = vif;
|
||||
hwsim->scan_chan_idx = 0;
|
||||
if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR)
|
||||
get_random_mask_addr(hwsim->scan_addr,
|
||||
hw_req->req.mac_addr,
|
||||
hw_req->req.mac_addr_mask);
|
||||
else
|
||||
memcpy(hwsim->scan_addr, vif->addr, ETH_ALEN);
|
||||
mutex_unlock(&hwsim->mutex);
|
||||
|
||||
wiphy_debug(hw->wiphy, "hwsim hw_scan request\n");
|
||||
|
@ -1816,7 +1878,9 @@ static void mac80211_hwsim_cancel_hw_scan(struct ieee80211_hw *hw,
|
|||
mutex_unlock(&hwsim->mutex);
|
||||
}
|
||||
|
||||
static void mac80211_hwsim_sw_scan(struct ieee80211_hw *hw)
|
||||
static void mac80211_hwsim_sw_scan(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct mac80211_hwsim_data *hwsim = hw->priv;
|
||||
|
||||
|
@ -1828,13 +1892,16 @@ static void mac80211_hwsim_sw_scan(struct ieee80211_hw *hw)
|
|||
}
|
||||
|
||||
printk(KERN_DEBUG "hwsim sw_scan request, prepping stuff\n");
|
||||
|
||||
memcpy(hwsim->scan_addr, mac_addr, ETH_ALEN);
|
||||
hwsim->scanning = true;
|
||||
|
||||
out:
|
||||
mutex_unlock(&hwsim->mutex);
|
||||
}
|
||||
|
||||
static void mac80211_hwsim_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void mac80211_hwsim_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct mac80211_hwsim_data *hwsim = hw->priv;
|
||||
|
||||
|
@ -1842,6 +1909,7 @@ static void mac80211_hwsim_sw_scan_complete(struct ieee80211_hw *hw)
|
|||
|
||||
printk(KERN_DEBUG "hwsim sw_scan_complete\n");
|
||||
hwsim->scanning = false;
|
||||
memset(hwsim->scan_addr, 0, ETH_ALEN);
|
||||
|
||||
mutex_unlock(&hwsim->mutex);
|
||||
}
|
||||
|
@ -2057,36 +2125,26 @@ static void hwsim_mcast_config_msg(struct sk_buff *mcast_skb,
|
|||
HWSIM_MCGRP_CONFIG, GFP_KERNEL);
|
||||
}
|
||||
|
||||
static struct sk_buff *build_radio_msg(int cmd, int id,
|
||||
static int append_radio_msg(struct sk_buff *skb, int id,
|
||||
struct hwsim_new_radio_params *param)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
void *data;
|
||||
int ret;
|
||||
|
||||
skb = genlmsg_new(GENLMSG_DEFAULT_SIZE, GFP_KERNEL);
|
||||
if (!skb)
|
||||
return NULL;
|
||||
|
||||
data = genlmsg_put(skb, 0, 0, &hwsim_genl_family, 0, cmd);
|
||||
if (!data)
|
||||
goto error;
|
||||
|
||||
ret = nla_put_u32(skb, HWSIM_ATTR_RADIO_ID, id);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
|
||||
if (param->channels) {
|
||||
ret = nla_put_u32(skb, HWSIM_ATTR_CHANNELS, param->channels);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (param->reg_alpha2) {
|
||||
ret = nla_put(skb, HWSIM_ATTR_REG_HINT_ALPHA2, 2,
|
||||
param->reg_alpha2);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (param->regd) {
|
||||
|
@ -2099,54 +2157,64 @@ static struct sk_buff *build_radio_msg(int cmd, int id,
|
|||
if (i < ARRAY_SIZE(hwsim_world_regdom_custom)) {
|
||||
ret = nla_put_u32(skb, HWSIM_ATTR_REG_CUSTOM_REG, i);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
if (param->reg_strict) {
|
||||
ret = nla_put_flag(skb, HWSIM_ATTR_REG_STRICT_REG);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (param->p2p_device) {
|
||||
ret = nla_put_flag(skb, HWSIM_ATTR_SUPPORT_P2P_DEVICE);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (param->use_chanctx) {
|
||||
ret = nla_put_flag(skb, HWSIM_ATTR_USE_CHANCTX);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (param->hwname) {
|
||||
ret = nla_put(skb, HWSIM_ATTR_RADIO_NAME,
|
||||
strlen(param->hwname), param->hwname);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
return ret;
|
||||
}
|
||||
|
||||
genlmsg_end(skb, data);
|
||||
|
||||
return skb;
|
||||
|
||||
error:
|
||||
nlmsg_free(skb);
|
||||
return NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void hswim_mcast_new_radio(int id, struct genl_info *info,
|
||||
static void hwsim_mcast_new_radio(int id, struct genl_info *info,
|
||||
struct hwsim_new_radio_params *param)
|
||||
{
|
||||
struct sk_buff *mcast_skb;
|
||||
void *data;
|
||||
|
||||
mcast_skb = build_radio_msg(HWSIM_CMD_NEW_RADIO, id, param);
|
||||
mcast_skb = genlmsg_new(GENLMSG_DEFAULT_SIZE, GFP_KERNEL);
|
||||
if (!mcast_skb)
|
||||
return;
|
||||
|
||||
data = genlmsg_put(mcast_skb, 0, 0, &hwsim_genl_family, 0,
|
||||
HWSIM_CMD_NEW_RADIO);
|
||||
if (!data)
|
||||
goto out_err;
|
||||
|
||||
if (append_radio_msg(mcast_skb, id, param) < 0)
|
||||
goto out_err;
|
||||
|
||||
genlmsg_end(mcast_skb, data);
|
||||
|
||||
hwsim_mcast_config_msg(mcast_skb, info);
|
||||
return;
|
||||
|
||||
out_err:
|
||||
genlmsg_cancel(mcast_skb, data);
|
||||
nlmsg_free(mcast_skb);
|
||||
}
|
||||
|
||||
static int mac80211_hwsim_new_radio(struct genl_info *info,
|
||||
|
@ -2267,7 +2335,8 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
|
|||
hw->wiphy->features |= NL80211_FEATURE_ACTIVE_MONITOR |
|
||||
NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE |
|
||||
NL80211_FEATURE_STATIC_SMPS |
|
||||
NL80211_FEATURE_DYNAMIC_SMPS;
|
||||
NL80211_FEATURE_DYNAMIC_SMPS |
|
||||
NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
|
||||
|
||||
/* ask mac80211 to reserve space for magic */
|
||||
hw->vif_data_size = sizeof(struct hwsim_vif_priv);
|
||||
|
@ -2353,6 +2422,7 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
|
|||
if (param->reg_strict)
|
||||
hw->wiphy->regulatory_flags |= REGULATORY_STRICT_REG;
|
||||
if (param->regd) {
|
||||
data->regd = param->regd;
|
||||
hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG;
|
||||
wiphy_apply_custom_regulatory(hw->wiphy, param->regd);
|
||||
/* give the regulatory workqueue a chance to run */
|
||||
|
@ -2371,8 +2441,11 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
|
|||
|
||||
wiphy_debug(hw->wiphy, "hwaddr %pM registered\n", hw->wiphy->perm_addr);
|
||||
|
||||
if (param->reg_alpha2)
|
||||
if (param->reg_alpha2) {
|
||||
data->alpha2[0] = param->reg_alpha2[0];
|
||||
data->alpha2[1] = param->reg_alpha2[1];
|
||||
regulatory_hint(hw->wiphy, param->reg_alpha2);
|
||||
}
|
||||
|
||||
data->debugfs = debugfs_create_dir("hwsim", hw->wiphy->debugfsdir);
|
||||
debugfs_create_file("ps", 0666, data->debugfs, data, &hwsim_fops_ps);
|
||||
|
@ -2392,7 +2465,7 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
|
|||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
|
||||
if (idx > 0)
|
||||
hswim_mcast_new_radio(idx, info, param);
|
||||
hwsim_mcast_new_radio(idx, info, param);
|
||||
|
||||
return idx;
|
||||
|
||||
|
@ -2426,12 +2499,10 @@ static void hwsim_mcast_del_radio(int id, const char *hwname,
|
|||
if (ret < 0)
|
||||
goto error;
|
||||
|
||||
if (hwname) {
|
||||
ret = nla_put(skb, HWSIM_ATTR_RADIO_NAME, strlen(hwname),
|
||||
hwname);
|
||||
if (ret < 0)
|
||||
goto error;
|
||||
}
|
||||
|
||||
genlmsg_end(skb, data);
|
||||
|
||||
|
@ -2455,6 +2526,44 @@ static void mac80211_hwsim_del_radio(struct mac80211_hwsim_data *data,
|
|||
ieee80211_free_hw(data->hw);
|
||||
}
|
||||
|
||||
static int mac80211_hwsim_get_radio(struct sk_buff *skb,
|
||||
struct mac80211_hwsim_data *data,
|
||||
u32 portid, u32 seq,
|
||||
struct netlink_callback *cb, int flags)
|
||||
{
|
||||
void *hdr;
|
||||
struct hwsim_new_radio_params param = { };
|
||||
int res = -EMSGSIZE;
|
||||
|
||||
hdr = genlmsg_put(skb, portid, seq, &hwsim_genl_family, flags,
|
||||
HWSIM_CMD_GET_RADIO);
|
||||
if (!hdr)
|
||||
return -EMSGSIZE;
|
||||
|
||||
if (cb)
|
||||
genl_dump_check_consistent(cb, hdr, &hwsim_genl_family);
|
||||
|
||||
param.reg_alpha2 = data->alpha2;
|
||||
param.reg_strict = !!(data->hw->wiphy->regulatory_flags &
|
||||
REGULATORY_STRICT_REG);
|
||||
param.p2p_device = !!(data->hw->wiphy->interface_modes &
|
||||
BIT(NL80211_IFTYPE_P2P_DEVICE));
|
||||
param.use_chanctx = data->use_chanctx;
|
||||
param.regd = data->regd;
|
||||
param.channels = data->channels;
|
||||
param.hwname = wiphy_name(data->hw->wiphy);
|
||||
|
||||
res = append_radio_msg(skb, data->idx, ¶m);
|
||||
if (res < 0)
|
||||
goto out_err;
|
||||
|
||||
return genlmsg_end(skb, hdr);
|
||||
|
||||
out_err:
|
||||
genlmsg_cancel(skb, hdr);
|
||||
return res;
|
||||
}
|
||||
|
||||
static void mac80211_hwsim_free(void)
|
||||
{
|
||||
struct mac80211_hwsim_data *data;
|
||||
|
@ -2465,7 +2574,8 @@ static void mac80211_hwsim_free(void)
|
|||
list))) {
|
||||
list_del(&data->list);
|
||||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
mac80211_hwsim_del_radio(data, NULL, NULL);
|
||||
mac80211_hwsim_del_radio(data, wiphy_name(data->hw->wiphy),
|
||||
NULL);
|
||||
spin_lock_bh(&hwsim_radio_lock);
|
||||
}
|
||||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
|
@ -2744,14 +2854,14 @@ static int hwsim_del_radio_nl(struct sk_buff *msg, struct genl_info *info)
|
|||
if (data->idx != idx)
|
||||
continue;
|
||||
} else {
|
||||
if (hwname &&
|
||||
strcmp(hwname, wiphy_name(data->hw->wiphy)))
|
||||
if (strcmp(hwname, wiphy_name(data->hw->wiphy)))
|
||||
continue;
|
||||
}
|
||||
|
||||
list_del(&data->list);
|
||||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
mac80211_hwsim_del_radio(data, hwname, info);
|
||||
mac80211_hwsim_del_radio(data, wiphy_name(data->hw->wiphy),
|
||||
info);
|
||||
return 0;
|
||||
}
|
||||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
|
@ -2759,6 +2869,77 @@ static int hwsim_del_radio_nl(struct sk_buff *msg, struct genl_info *info)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int hwsim_get_radio_nl(struct sk_buff *msg, struct genl_info *info)
|
||||
{
|
||||
struct mac80211_hwsim_data *data;
|
||||
struct sk_buff *skb;
|
||||
int idx, res = -ENODEV;
|
||||
|
||||
if (!info->attrs[HWSIM_ATTR_RADIO_ID])
|
||||
return -EINVAL;
|
||||
idx = nla_get_u32(info->attrs[HWSIM_ATTR_RADIO_ID]);
|
||||
|
||||
spin_lock_bh(&hwsim_radio_lock);
|
||||
list_for_each_entry(data, &hwsim_radios, list) {
|
||||
if (data->idx != idx)
|
||||
continue;
|
||||
|
||||
skb = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
|
||||
if (!skb) {
|
||||
res = -ENOMEM;
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
res = mac80211_hwsim_get_radio(skb, data, info->snd_portid,
|
||||
info->snd_seq, NULL, 0);
|
||||
if (res < 0) {
|
||||
nlmsg_free(skb);
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
genlmsg_reply(skb, info);
|
||||
break;
|
||||
}
|
||||
|
||||
out_err:
|
||||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static int hwsim_dump_radio_nl(struct sk_buff *skb,
|
||||
struct netlink_callback *cb)
|
||||
{
|
||||
int idx = cb->args[0];
|
||||
struct mac80211_hwsim_data *data = NULL;
|
||||
int res;
|
||||
|
||||
spin_lock_bh(&hwsim_radio_lock);
|
||||
|
||||
if (idx == hwsim_radio_idx)
|
||||
goto done;
|
||||
|
||||
list_for_each_entry(data, &hwsim_radios, list) {
|
||||
if (data->idx < idx)
|
||||
continue;
|
||||
|
||||
res = mac80211_hwsim_get_radio(skb, data,
|
||||
NETLINK_CB(cb->skb).portid,
|
||||
cb->nlh->nlmsg_seq, cb,
|
||||
NLM_F_MULTI);
|
||||
if (res < 0)
|
||||
break;
|
||||
|
||||
idx = data->idx + 1;
|
||||
}
|
||||
|
||||
cb->args[0] = idx;
|
||||
|
||||
done:
|
||||
spin_unlock_bh(&hwsim_radio_lock);
|
||||
return skb->len;
|
||||
}
|
||||
|
||||
/* Generic Netlink operations array */
|
||||
static const struct genl_ops hwsim_ops[] = {
|
||||
{
|
||||
|
@ -2789,6 +2970,12 @@ static const struct genl_ops hwsim_ops[] = {
|
|||
.doit = hwsim_del_radio_nl,
|
||||
.flags = GENL_ADMIN_PERM,
|
||||
},
|
||||
{
|
||||
.cmd = HWSIM_CMD_GET_RADIO,
|
||||
.policy = hwsim_genl_policy,
|
||||
.doit = hwsim_get_radio_nl,
|
||||
.dumpit = hwsim_dump_radio_nl,
|
||||
},
|
||||
};
|
||||
|
||||
static void destroy_radio(struct work_struct *work)
|
||||
|
@ -2796,7 +2983,7 @@ static void destroy_radio(struct work_struct *work)
|
|||
struct mac80211_hwsim_data *data =
|
||||
container_of(work, struct mac80211_hwsim_data, destroy_work);
|
||||
|
||||
mac80211_hwsim_del_radio(data, NULL, NULL);
|
||||
mac80211_hwsim_del_radio(data, wiphy_name(data->hw->wiphy), NULL);
|
||||
}
|
||||
|
||||
static void remove_user_radios(u32 portid)
|
||||
|
|
|
@ -69,6 +69,8 @@ enum hwsim_tx_control_flags {
|
|||
* returns the radio ID (>= 0) or negative on errors, if successful
|
||||
* then multicast the result
|
||||
* @HWSIM_CMD_DEL_RADIO: destroy a radio, reply is multicasted
|
||||
* @HWSIM_CMD_GET_RADIO: fetch information about existing radios, uses:
|
||||
* %HWSIM_ATTR_RADIO_ID
|
||||
* @__HWSIM_CMD_MAX: enum limit
|
||||
*/
|
||||
enum {
|
||||
|
@ -78,6 +80,7 @@ enum {
|
|||
HWSIM_CMD_TX_INFO_FRAME,
|
||||
HWSIM_CMD_NEW_RADIO,
|
||||
HWSIM_CMD_DEL_RADIO,
|
||||
HWSIM_CMD_GET_RADIO,
|
||||
__HWSIM_CMD_MAX,
|
||||
};
|
||||
#define HWSIM_CMD_MAX (_HWSIM_CMD_MAX - 1)
|
||||
|
|
|
@ -84,6 +84,8 @@ mwifiex_is_amsdu_in_ampdu_allowed(struct mwifiex_private *priv,
|
|||
{
|
||||
struct mwifiex_tx_ba_stream_tbl *tx_tbl;
|
||||
|
||||
if (is_broadcast_ether_addr(ptr->ra))
|
||||
return false;
|
||||
tx_tbl = mwifiex_get_ba_tbl(priv, tid, ptr->ra);
|
||||
if (tx_tbl)
|
||||
return tx_tbl->amsdu;
|
||||
|
@ -96,6 +98,8 @@ static inline u8
|
|||
mwifiex_is_ampdu_allowed(struct mwifiex_private *priv,
|
||||
struct mwifiex_ra_list_tbl *ptr, int tid)
|
||||
{
|
||||
if (is_broadcast_ether_addr(ptr->ra))
|
||||
return false;
|
||||
if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) {
|
||||
return mwifiex_is_station_ampdu_allowed(priv, ptr, tid);
|
||||
} else {
|
||||
|
|
|
@ -31,7 +31,7 @@ config MWIFIEX_PCIE
|
|||
mwifiex_pcie.
|
||||
|
||||
config MWIFIEX_USB
|
||||
tristate "Marvell WiFi-Ex Driver for USB8797/8897"
|
||||
tristate "Marvell WiFi-Ex Driver for USB8766/8797/8897"
|
||||
depends on MWIFIEX && USB
|
||||
select FW_LOADER
|
||||
---help---
|
||||
|
|
|
@ -1806,6 +1806,10 @@ mwifiex_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
|
|||
dev_dbg(priv->adapter->dev,
|
||||
"info: associated to bssid %pM successfully\n",
|
||||
priv->cfg_bssid);
|
||||
if (ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
|
||||
priv->adapter->auto_tdls &&
|
||||
priv->bss_type == MWIFIEX_BSS_TYPE_STA)
|
||||
mwifiex_setup_auto_tdls_timer(priv);
|
||||
} else {
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"info: association to bssid %pM failed\n",
|
||||
|
@ -2677,11 +2681,13 @@ mwifiex_cfg80211_tdls_mgmt(struct wiphy *wiphy, struct net_device *dev,
|
|||
dev_dbg(priv->adapter->dev,
|
||||
"Send TDLS Setup Request to %pM status_code=%d\n", peer,
|
||||
status_code);
|
||||
mwifiex_add_auto_tdls_peer(priv, peer);
|
||||
ret = mwifiex_send_tdls_data_frame(priv, peer, action_code,
|
||||
dialog_token, status_code,
|
||||
extra_ies, extra_ies_len);
|
||||
break;
|
||||
case WLAN_TDLS_SETUP_RESPONSE:
|
||||
mwifiex_add_auto_tdls_peer(priv, peer);
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"Send TDLS Setup Response to %pM status_code=%d\n",
|
||||
peer, status_code);
|
||||
|
|
|
@ -85,6 +85,11 @@
|
|||
#define MWIFIEX_TDLS_CREATE_LINK 0x02
|
||||
#define MWIFIEX_TDLS_CONFIG_LINK 0x03
|
||||
|
||||
#define MWIFIEX_TDLS_RSSI_HIGH 50
|
||||
#define MWIFIEX_TDLS_RSSI_LOW 55
|
||||
#define MWIFIEX_TDLS_MAX_FAIL_COUNT 4
|
||||
#define MWIFIEX_AUTO_TDLS_IDLE_TIME 10
|
||||
|
||||
enum mwifiex_bss_type {
|
||||
MWIFIEX_BSS_TYPE_STA = 0,
|
||||
MWIFIEX_BSS_TYPE_UAP = 1,
|
||||
|
|
|
@ -584,6 +584,7 @@ struct rxpd {
|
|||
* [Bit 7] Reserved
|
||||
*/
|
||||
u8 ht_info;
|
||||
u8 reserved[3];
|
||||
u8 flags;
|
||||
} __packed;
|
||||
|
||||
|
|
|
@ -137,6 +137,7 @@ int mwifiex_init_priv(struct mwifiex_private *priv)
|
|||
priv->csa_expire_time = 0;
|
||||
priv->del_list_idx = 0;
|
||||
priv->hs2_enabled = false;
|
||||
priv->check_tdls_tx = false;
|
||||
memcpy(priv->tos_to_tid_inv, tos_to_tid_inv, MAX_NUM_TID);
|
||||
|
||||
return mwifiex_add_bss_prio_tbl(priv);
|
||||
|
@ -366,6 +367,7 @@ static void mwifiex_free_lock_list(struct mwifiex_adapter *adapter)
|
|||
list_del(&priv->tx_ba_stream_tbl_ptr);
|
||||
list_del(&priv->rx_reorder_tbl_ptr);
|
||||
list_del(&priv->sta_list);
|
||||
list_del(&priv->auto_tdls_list);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -434,6 +436,7 @@ int mwifiex_init_lock_list(struct mwifiex_adapter *adapter)
|
|||
spin_lock_init(&priv->wmm.ra_list_spinlock);
|
||||
spin_lock_init(&priv->curr_bcn_buf_lock);
|
||||
spin_lock_init(&priv->sta_list_spinlock);
|
||||
spin_lock_init(&priv->auto_tdls_lock);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -449,7 +452,6 @@ int mwifiex_init_lock_list(struct mwifiex_adapter *adapter)
|
|||
spin_lock_init(&adapter->scan_pending_q_lock);
|
||||
spin_lock_init(&adapter->rx_proc_lock);
|
||||
|
||||
skb_queue_head_init(&adapter->usb_rx_data_q);
|
||||
skb_queue_head_init(&adapter->rx_data_q);
|
||||
|
||||
for (i = 0; i < adapter->priv_num; ++i) {
|
||||
|
@ -466,6 +468,7 @@ int mwifiex_init_lock_list(struct mwifiex_adapter *adapter)
|
|||
INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
|
||||
INIT_LIST_HEAD(&priv->rx_reorder_tbl_ptr);
|
||||
INIT_LIST_HEAD(&priv->sta_list);
|
||||
INIT_LIST_HEAD(&priv->auto_tdls_list);
|
||||
skb_queue_head_init(&priv->tdls_txq);
|
||||
|
||||
spin_lock_init(&priv->tx_ba_stream_tbl_lock);
|
||||
|
@ -646,6 +649,7 @@ mwifiex_shutdown_drv(struct mwifiex_adapter *adapter)
|
|||
if (adapter->priv[i]) {
|
||||
priv = adapter->priv[i];
|
||||
|
||||
mwifiex_clean_auto_tdls(priv);
|
||||
mwifiex_clean_txrx(priv);
|
||||
mwifiex_delete_bss_prio_tbl(priv);
|
||||
}
|
||||
|
@ -668,19 +672,6 @@ mwifiex_shutdown_drv(struct mwifiex_adapter *adapter)
|
|||
|
||||
spin_lock(&adapter->mwifiex_lock);
|
||||
|
||||
if (adapter->if_ops.data_complete) {
|
||||
while ((skb = skb_dequeue(&adapter->usb_rx_data_q))) {
|
||||
struct mwifiex_rxinfo *rx_info = MWIFIEX_SKB_RXCB(skb);
|
||||
|
||||
priv = adapter->priv[rx_info->bss_num];
|
||||
if (priv)
|
||||
priv->stats.rx_dropped++;
|
||||
|
||||
dev_kfree_skb_any(skb);
|
||||
adapter->if_ops.data_complete(adapter);
|
||||
}
|
||||
}
|
||||
|
||||
mwifiex_adapter_cleanup(adapter);
|
||||
|
||||
spin_unlock(&adapter->mwifiex_lock);
|
||||
|
|
|
@ -880,9 +880,7 @@ mwifiex_cmd_802_11_ad_hoc_start(struct mwifiex_private *priv,
|
|||
|
||||
/* Set Capability info */
|
||||
bss_desc->cap_info_bitmap |= WLAN_CAPABILITY_IBSS;
|
||||
tmp_cap = le16_to_cpu(adhoc_start->cap_info_bitmap);
|
||||
tmp_cap &= ~WLAN_CAPABILITY_ESS;
|
||||
tmp_cap |= WLAN_CAPABILITY_IBSS;
|
||||
tmp_cap = WLAN_CAPABILITY_IBSS;
|
||||
|
||||
/* Set up privacy in bss_desc */
|
||||
if (priv->sec_info.encryption_mode) {
|
||||
|
|
|
@ -28,6 +28,11 @@ const char driver_version[] = "mwifiex " VERSION " (%s) ";
|
|||
static char *cal_data_cfg;
|
||||
module_param(cal_data_cfg, charp, 0);
|
||||
|
||||
static unsigned short driver_mode;
|
||||
module_param(driver_mode, ushort, 0);
|
||||
MODULE_PARM_DESC(driver_mode,
|
||||
"station=0x1(default), ap-sta=0x3, station-p2p=0x5, ap-sta-p2p=0x7");
|
||||
|
||||
/*
|
||||
* This function registers the device and performs all the necessary
|
||||
* initializations.
|
||||
|
@ -146,6 +151,8 @@ static int mwifiex_process_rx(struct mwifiex_adapter *adapter)
|
|||
atomic_dec(&adapter->rx_pending);
|
||||
if (adapter->delay_main_work &&
|
||||
(atomic_read(&adapter->rx_pending) < LOW_RX_PENDING)) {
|
||||
if (adapter->if_ops.submit_rem_rx_urbs)
|
||||
adapter->if_ops.submit_rem_rx_urbs(adapter);
|
||||
adapter->delay_main_work = false;
|
||||
queue_work(adapter->workqueue, &adapter->main_work);
|
||||
}
|
||||
|
@ -178,7 +185,6 @@ int mwifiex_main_process(struct mwifiex_adapter *adapter)
|
|||
{
|
||||
int ret = 0;
|
||||
unsigned long flags;
|
||||
struct sk_buff *skb;
|
||||
|
||||
spin_lock_irqsave(&adapter->main_proc_lock, flags);
|
||||
|
||||
|
@ -253,11 +259,6 @@ process_start:
|
|||
}
|
||||
}
|
||||
|
||||
/* Check Rx data for USB */
|
||||
if (adapter->iface_type == MWIFIEX_USB)
|
||||
while ((skb = skb_dequeue(&adapter->usb_rx_data_q)))
|
||||
mwifiex_handle_rx_packet(adapter, skb);
|
||||
|
||||
/* Check for event */
|
||||
if (adapter->event_received) {
|
||||
adapter->event_received = false;
|
||||
|
@ -453,6 +454,11 @@ static void mwifiex_fw_dpc(const struct firmware *firmware, void *context)
|
|||
goto err_init_fw;
|
||||
}
|
||||
|
||||
if (driver_mode) {
|
||||
driver_mode &= MWIFIEX_DRIVER_MODE_BITMASK;
|
||||
driver_mode |= MWIFIEX_DRIVER_MODE_STA;
|
||||
}
|
||||
|
||||
rtnl_lock();
|
||||
/* Create station interface by default */
|
||||
wdev = mwifiex_add_virtual_intf(adapter->wiphy, "mlan%d",
|
||||
|
@ -462,6 +468,28 @@ static void mwifiex_fw_dpc(const struct firmware *firmware, void *context)
|
|||
rtnl_unlock();
|
||||
goto err_add_intf;
|
||||
}
|
||||
|
||||
if (driver_mode & MWIFIEX_DRIVER_MODE_UAP) {
|
||||
wdev = mwifiex_add_virtual_intf(adapter->wiphy, "uap%d",
|
||||
NL80211_IFTYPE_AP, NULL, NULL);
|
||||
if (IS_ERR(wdev)) {
|
||||
dev_err(adapter->dev, "cannot create AP interface\n");
|
||||
rtnl_unlock();
|
||||
goto err_add_intf;
|
||||
}
|
||||
}
|
||||
|
||||
if (driver_mode & MWIFIEX_DRIVER_MODE_P2P) {
|
||||
wdev = mwifiex_add_virtual_intf(adapter->wiphy, "p2p%d",
|
||||
NL80211_IFTYPE_P2P_CLIENT, NULL,
|
||||
NULL);
|
||||
if (IS_ERR(wdev)) {
|
||||
dev_err(adapter->dev,
|
||||
"cannot create p2p client interface\n");
|
||||
rtnl_unlock();
|
||||
goto err_add_intf;
|
||||
}
|
||||
}
|
||||
rtnl_unlock();
|
||||
|
||||
mwifiex_drv_get_driver_version(adapter, fmt, sizeof(fmt) - 1);
|
||||
|
@ -634,6 +662,13 @@ mwifiex_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
*/
|
||||
__net_timestamp(skb);
|
||||
|
||||
if (ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
|
||||
priv->bss_type == MWIFIEX_BSS_TYPE_STA &&
|
||||
!ether_addr_equal_unaligned(priv->cfg_bssid, skb->data)) {
|
||||
if (priv->adapter->auto_tdls && priv->check_tdls_tx)
|
||||
mwifiex_tdls_check_tx(priv, skb);
|
||||
}
|
||||
|
||||
mwifiex_queue_tx_pkt(priv, skb);
|
||||
|
||||
return 0;
|
||||
|
@ -864,7 +899,7 @@ mwifiex_add_card(void *card, struct semaphore *sem,
|
|||
adapter->cmd_wait_q.status = 0;
|
||||
adapter->scan_wait_q_woken = false;
|
||||
|
||||
if (num_possible_cpus() > 1) {
|
||||
if ((num_possible_cpus() > 1) || adapter->iface_type == MWIFIEX_USB) {
|
||||
adapter->rx_work_enabled = true;
|
||||
pr_notice("rx work enabled, cpus %d\n", num_possible_cpus());
|
||||
}
|
||||
|
|
|
@ -48,6 +48,11 @@ enum {
|
|||
MWIFIEX_SYNC_CMD
|
||||
};
|
||||
|
||||
#define MWIFIEX_DRIVER_MODE_STA BIT(0)
|
||||
#define MWIFIEX_DRIVER_MODE_UAP BIT(1)
|
||||
#define MWIFIEX_DRIVER_MODE_P2P BIT(2)
|
||||
#define MWIFIEX_DRIVER_MODE_BITMASK (BIT(0) | BIT(1) | BIT(2))
|
||||
|
||||
#define MWIFIEX_MAX_AP 64
|
||||
|
||||
#define MWIFIEX_DEFAULT_WATCHDOG_TIMEOUT (5 * HZ)
|
||||
|
@ -106,10 +111,7 @@ enum {
|
|||
*/
|
||||
#define IS_CARD_RX_RCVD(adapter) (adapter->cmd_resp_received || \
|
||||
adapter->event_received || \
|
||||
((adapter->iface_type != MWIFIEX_USB) && \
|
||||
adapter->data_received) || \
|
||||
((adapter->iface_type == MWIFIEX_USB) && \
|
||||
!skb_queue_empty(&adapter->usb_rx_data_q)))
|
||||
adapter->data_received)
|
||||
|
||||
#define MWIFIEX_TYPE_CMD 1
|
||||
#define MWIFIEX_TYPE_DATA 0
|
||||
|
@ -504,8 +506,11 @@ struct mwifiex_private {
|
|||
struct mwifiex_wmm_desc wmm;
|
||||
atomic_t wmm_tx_pending[IEEE80211_NUM_ACS];
|
||||
struct list_head sta_list;
|
||||
/* spin lock for associated station list */
|
||||
/* spin lock for associated station/TDLS peers list */
|
||||
spinlock_t sta_list_spinlock;
|
||||
struct list_head auto_tdls_list;
|
||||
/* spin lock for auto TDLS peer list */
|
||||
spinlock_t auto_tdls_lock;
|
||||
struct list_head tx_ba_stream_tbl_ptr;
|
||||
/* spin lock for tx_ba_stream_tbl_ptr queue */
|
||||
spinlock_t tx_ba_stream_tbl_lock;
|
||||
|
@ -570,6 +575,9 @@ struct mwifiex_private {
|
|||
bool hs2_enabled;
|
||||
struct station_parameters *sta_params;
|
||||
struct sk_buff_head tdls_txq;
|
||||
u8 check_tdls_tx;
|
||||
struct timer_list auto_tdls_timer;
|
||||
bool auto_tdls_timer_active;
|
||||
};
|
||||
|
||||
enum mwifiex_ba_status {
|
||||
|
@ -670,6 +678,17 @@ struct mwifiex_sta_node {
|
|||
struct mwifiex_tdls_capab tdls_cap;
|
||||
};
|
||||
|
||||
struct mwifiex_auto_tdls_peer {
|
||||
struct list_head list;
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
u8 tdls_status;
|
||||
int rssi;
|
||||
long rssi_jiffies;
|
||||
u8 failure_count;
|
||||
u8 do_discover;
|
||||
u8 do_setup;
|
||||
};
|
||||
|
||||
struct mwifiex_if_ops {
|
||||
int (*init_if) (struct mwifiex_adapter *);
|
||||
void (*cleanup_if) (struct mwifiex_adapter *);
|
||||
|
@ -690,13 +709,13 @@ struct mwifiex_if_ops {
|
|||
void (*cleanup_mpa_buf) (struct mwifiex_adapter *);
|
||||
int (*cmdrsp_complete) (struct mwifiex_adapter *, struct sk_buff *);
|
||||
int (*event_complete) (struct mwifiex_adapter *, struct sk_buff *);
|
||||
int (*data_complete) (struct mwifiex_adapter *);
|
||||
int (*init_fw_port) (struct mwifiex_adapter *);
|
||||
int (*dnld_fw) (struct mwifiex_adapter *, struct mwifiex_fw_image *);
|
||||
void (*card_reset) (struct mwifiex_adapter *);
|
||||
void (*fw_dump)(struct mwifiex_adapter *);
|
||||
int (*clean_pcie_ring) (struct mwifiex_adapter *adapter);
|
||||
void (*iface_work)(struct work_struct *work);
|
||||
void (*submit_rem_rx_urbs)(struct mwifiex_adapter *adapter);
|
||||
};
|
||||
|
||||
struct mwifiex_adapter {
|
||||
|
@ -767,7 +786,6 @@ struct mwifiex_adapter {
|
|||
spinlock_t scan_pending_q_lock;
|
||||
/* spin lock for RX processing routine */
|
||||
spinlock_t rx_proc_lock;
|
||||
struct sk_buff_head usb_rx_data_q;
|
||||
u32 scan_processing;
|
||||
u16 region_code;
|
||||
struct mwifiex_802_11d_domain_reg domain_reg;
|
||||
|
@ -848,6 +866,7 @@ struct mwifiex_adapter {
|
|||
struct mwifiex_chan_stats *chan_stats;
|
||||
u32 num_in_chan_stats;
|
||||
int survey_idx;
|
||||
bool auto_tdls;
|
||||
};
|
||||
|
||||
int mwifiex_init_lock_list(struct mwifiex_adapter *adapter);
|
||||
|
@ -1305,6 +1324,17 @@ u8 mwifiex_get_center_freq_index(struct mwifiex_private *priv, u8 band,
|
|||
u32 pri_chan, u8 chan_bw);
|
||||
int mwifiex_init_channel_scan_gap(struct mwifiex_adapter *adapter);
|
||||
|
||||
int mwifiex_tdls_check_tx(struct mwifiex_private *priv, struct sk_buff *skb);
|
||||
void mwifiex_flush_auto_tdls_list(struct mwifiex_private *priv);
|
||||
void mwifiex_auto_tdls_update_peer_status(struct mwifiex_private *priv,
|
||||
const u8 *mac, u8 link_status);
|
||||
void mwifiex_auto_tdls_update_peer_signal(struct mwifiex_private *priv,
|
||||
u8 *mac, s8 snr, s8 nflr);
|
||||
void mwifiex_check_auto_tdls(unsigned long context);
|
||||
void mwifiex_add_auto_tdls_peer(struct mwifiex_private *priv, const u8 *mac);
|
||||
void mwifiex_setup_auto_tdls_timer(struct mwifiex_private *priv);
|
||||
void mwifiex_clean_auto_tdls(struct mwifiex_private *priv);
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
void mwifiex_debugfs_init(void);
|
||||
void mwifiex_debugfs_remove(void);
|
||||
|
|
|
@ -106,6 +106,7 @@ mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id)
|
|||
card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size;
|
||||
card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size;
|
||||
card->supports_fw_dump = data->supports_fw_dump;
|
||||
card->auto_tdls = data->auto_tdls;
|
||||
}
|
||||
|
||||
sdio_claim_host(func);
|
||||
|
@ -1880,6 +1881,7 @@ static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
|
|||
return -1;
|
||||
}
|
||||
|
||||
adapter->auto_tdls = card->auto_tdls;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
@ -246,6 +246,7 @@ struct sdio_mmc_card {
|
|||
u8 curr_wr_port;
|
||||
|
||||
u8 *mp_regs;
|
||||
u8 auto_tdls;
|
||||
|
||||
struct mwifiex_sdio_mpa_tx mpa_tx;
|
||||
struct mwifiex_sdio_mpa_rx mpa_rx;
|
||||
|
@ -262,6 +263,7 @@ struct mwifiex_sdio_device {
|
|||
u16 tx_buf_size;
|
||||
u32 mp_tx_agg_buf_size;
|
||||
u32 mp_rx_agg_buf_size;
|
||||
u8 auto_tdls;
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
|
||||
|
@ -387,6 +389,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
|
|||
.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
|
||||
.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
|
||||
.supports_fw_dump = false,
|
||||
.auto_tdls = false,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
|
||||
|
@ -400,6 +403,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
|
|||
.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
|
||||
.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
|
||||
.supports_fw_dump = false,
|
||||
.auto_tdls = false,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
|
||||
|
@ -413,6 +417,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
|
|||
.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
|
||||
.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
|
||||
.supports_fw_dump = false,
|
||||
.auto_tdls = false,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
|
||||
|
@ -426,6 +431,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
|
|||
.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
|
||||
.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
|
||||
.supports_fw_dump = true,
|
||||
.auto_tdls = false,
|
||||
};
|
||||
|
||||
static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
|
||||
|
@ -439,6 +445,7 @@ static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
|
|||
.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
|
||||
.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
|
||||
.supports_fw_dump = false,
|
||||
.auto_tdls = true,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
@ -55,9 +55,13 @@ mwifiex_reset_connect_state(struct mwifiex_private *priv, u16 reason_code)
|
|||
priv->scan_block = false;
|
||||
|
||||
if ((GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) &&
|
||||
ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info))
|
||||
ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info)) {
|
||||
mwifiex_disable_all_tdls_links(priv);
|
||||
|
||||
if (priv->adapter->auto_tdls)
|
||||
mwifiex_clean_auto_tdls(priv);
|
||||
}
|
||||
|
||||
/* Free Tx and Rx packets, report disconnect to upper layer */
|
||||
mwifiex_clean_txrx(priv);
|
||||
|
||||
|
@ -163,9 +167,6 @@ static int mwifiex_parse_tdls_event(struct mwifiex_private *priv,
|
|||
NL80211_TDLS_TEARDOWN,
|
||||
le16_to_cpu(tdls_evt->u.reason_code),
|
||||
GFP_KERNEL);
|
||||
ret = mwifiex_tdls_oper(priv, tdls_evt->peer_mac,
|
||||
MWIFIEX_TDLS_DISABLE_LINK);
|
||||
queue_work(adapter->workqueue, &adapter->main_work);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
|
|
@ -1026,12 +1026,12 @@ mwifiex_drv_get_driver_version(struct mwifiex_adapter *adapter, char *version,
|
|||
int max_len)
|
||||
{
|
||||
union {
|
||||
u32 l;
|
||||
__le32 l;
|
||||
u8 c[4];
|
||||
} ver;
|
||||
char fw_ver[32];
|
||||
|
||||
ver.l = adapter->fw_release_number;
|
||||
ver.l = cpu_to_le32(adapter->fw_release_number);
|
||||
sprintf(fw_ver, "%u.%u.%u.p%u", ver.c[2], ver.c[1], ver.c[0], ver.c[3]);
|
||||
|
||||
snprintf(version, max_len, driver_version, fw_ver);
|
||||
|
|
|
@ -232,6 +232,9 @@ int mwifiex_process_sta_rx_packet(struct mwifiex_private *priv,
|
|||
if (sta_ptr)
|
||||
sta_ptr->rx_seq[local_rx_pd->priority] =
|
||||
le16_to_cpu(local_rx_pd->seq_num);
|
||||
mwifiex_auto_tdls_update_peer_signal(priv, ta,
|
||||
local_rx_pd->snr,
|
||||
local_rx_pd->nf);
|
||||
}
|
||||
} else {
|
||||
if (rx_pkt_type != PKT_TYPE_BAR)
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#define TDLS_REQ_FIX_LEN 6
|
||||
#define TDLS_RESP_FIX_LEN 8
|
||||
#define TDLS_CONFIRM_FIX_LEN 6
|
||||
#define MWIFIEX_TDLS_WMM_INFO_SIZE 7
|
||||
|
||||
static void mwifiex_restore_tdls_packets(struct mwifiex_private *priv,
|
||||
const u8 *mac, u8 status)
|
||||
|
@ -367,6 +368,55 @@ static void mwifiex_tdls_add_qos_capab(struct sk_buff *skb)
|
|||
*pos++ = MWIFIEX_TDLS_DEF_QOS_CAPAB;
|
||||
}
|
||||
|
||||
static void
|
||||
mwifiex_tdls_add_wmm_param_ie(struct mwifiex_private *priv, struct sk_buff *skb)
|
||||
{
|
||||
struct ieee80211_wmm_param_ie *wmm;
|
||||
u8 ac_vi[] = {0x42, 0x43, 0x5e, 0x00};
|
||||
u8 ac_vo[] = {0x62, 0x32, 0x2f, 0x00};
|
||||
u8 ac_be[] = {0x03, 0xa4, 0x00, 0x00};
|
||||
u8 ac_bk[] = {0x27, 0xa4, 0x00, 0x00};
|
||||
|
||||
wmm = (void *)skb_put(skb, sizeof(*wmm));
|
||||
memset(wmm, 0, sizeof(*wmm));
|
||||
|
||||
wmm->element_id = WLAN_EID_VENDOR_SPECIFIC;
|
||||
wmm->len = sizeof(*wmm) - 2;
|
||||
wmm->oui[0] = 0x00; /* Microsoft OUI 00:50:F2 */
|
||||
wmm->oui[1] = 0x50;
|
||||
wmm->oui[2] = 0xf2;
|
||||
wmm->oui_type = 2; /* WME */
|
||||
wmm->oui_subtype = 1; /* WME param */
|
||||
wmm->version = 1; /* WME ver */
|
||||
wmm->qos_info = 0; /* U-APSD not in use */
|
||||
|
||||
/* use default WMM AC parameters for TDLS link*/
|
||||
memcpy(&wmm->ac[0], ac_be, sizeof(ac_be));
|
||||
memcpy(&wmm->ac[1], ac_bk, sizeof(ac_bk));
|
||||
memcpy(&wmm->ac[2], ac_vi, sizeof(ac_vi));
|
||||
memcpy(&wmm->ac[3], ac_vo, sizeof(ac_vo));
|
||||
}
|
||||
|
||||
static void
|
||||
mwifiex_add_wmm_info_ie(struct mwifiex_private *priv, struct sk_buff *skb,
|
||||
u8 qosinfo)
|
||||
{
|
||||
u8 *buf;
|
||||
|
||||
buf = (void *)skb_put(skb, MWIFIEX_TDLS_WMM_INFO_SIZE +
|
||||
sizeof(struct ieee_types_header));
|
||||
|
||||
*buf++ = WLAN_EID_VENDOR_SPECIFIC;
|
||||
*buf++ = 7; /* len */
|
||||
*buf++ = 0x00; /* Microsoft OUI 00:50:F2 */
|
||||
*buf++ = 0x50;
|
||||
*buf++ = 0xf2;
|
||||
*buf++ = 2; /* WME */
|
||||
*buf++ = 0; /* WME info */
|
||||
*buf++ = 1; /* WME ver */
|
||||
*buf++ = qosinfo; /* U-APSD no in use */
|
||||
}
|
||||
|
||||
static int mwifiex_prep_tdls_encap_data(struct mwifiex_private *priv,
|
||||
const u8 *peer, u8 action_code,
|
||||
u8 dialog_token,
|
||||
|
@ -421,6 +471,7 @@ static int mwifiex_prep_tdls_encap_data(struct mwifiex_private *priv,
|
|||
|
||||
mwifiex_tdls_add_ext_capab(priv, skb);
|
||||
mwifiex_tdls_add_qos_capab(skb);
|
||||
mwifiex_add_wmm_info_ie(priv, skb, 0);
|
||||
break;
|
||||
|
||||
case WLAN_TDLS_SETUP_RESPONSE:
|
||||
|
@ -458,6 +509,7 @@ static int mwifiex_prep_tdls_encap_data(struct mwifiex_private *priv,
|
|||
|
||||
mwifiex_tdls_add_ext_capab(priv, skb);
|
||||
mwifiex_tdls_add_qos_capab(skb);
|
||||
mwifiex_add_wmm_info_ie(priv, skb, 0);
|
||||
break;
|
||||
|
||||
case WLAN_TDLS_SETUP_CONFIRM:
|
||||
|
@ -466,6 +518,8 @@ static int mwifiex_prep_tdls_encap_data(struct mwifiex_private *priv,
|
|||
skb_put(skb, sizeof(tf->u.setup_cfm));
|
||||
tf->u.setup_cfm.status_code = cpu_to_le16(status_code);
|
||||
tf->u.setup_cfm.dialog_token = dialog_token;
|
||||
|
||||
mwifiex_tdls_add_wmm_param_ie(priv, skb);
|
||||
if (priv->adapter->is_hw_11ac_capable) {
|
||||
ret = mwifiex_tdls_add_vht_oper(priv, peer, skb);
|
||||
if (ret) {
|
||||
|
@ -544,6 +598,7 @@ int mwifiex_send_tdls_data_frame(struct mwifiex_private *priv, const u8 *peer,
|
|||
sizeof(struct ieee_types_bss_co_2040) +
|
||||
sizeof(struct ieee80211_ht_operation) +
|
||||
sizeof(struct ieee80211_tdls_lnkie) +
|
||||
sizeof(struct ieee80211_wmm_param_ie) +
|
||||
extra_ies_len;
|
||||
|
||||
if (priv->adapter->is_hw_11ac_capable)
|
||||
|
@ -973,6 +1028,7 @@ mwifiex_tdls_process_disable_link(struct mwifiex_private *priv, const u8 *peer)
|
|||
}
|
||||
|
||||
mwifiex_restore_tdls_packets(priv, peer, TDLS_LINK_TEARDOWN);
|
||||
mwifiex_auto_tdls_update_peer_status(priv, peer, TDLS_NOT_SETUP);
|
||||
memcpy(&tdls_oper.peer_mac, peer, ETH_ALEN);
|
||||
tdls_oper.tdls_action = MWIFIEX_TDLS_DISABLE_LINK;
|
||||
return mwifiex_send_cmd(priv, HostCmd_CMD_TDLS_OPER,
|
||||
|
@ -1017,6 +1073,8 @@ mwifiex_tdls_process_enable_link(struct mwifiex_private *priv, const u8 *peer)
|
|||
|
||||
memset(sta_ptr->rx_seq, 0xff, sizeof(sta_ptr->rx_seq));
|
||||
mwifiex_restore_tdls_packets(priv, peer, TDLS_SETUP_COMPLETE);
|
||||
mwifiex_auto_tdls_update_peer_status(priv, peer,
|
||||
TDLS_SETUP_COMPLETE);
|
||||
} else {
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"tdls: enable link %pM failed\n", peer);
|
||||
|
@ -1030,6 +1088,8 @@ mwifiex_tdls_process_enable_link(struct mwifiex_private *priv, const u8 *peer)
|
|||
mwifiex_del_sta_entry(priv, peer);
|
||||
}
|
||||
mwifiex_restore_tdls_packets(priv, peer, TDLS_LINK_TEARDOWN);
|
||||
mwifiex_auto_tdls_update_peer_status(priv, peer,
|
||||
TDLS_NOT_SETUP);
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
@ -1097,3 +1157,231 @@ void mwifiex_disable_all_tdls_links(struct mwifiex_private *priv)
|
|||
|
||||
mwifiex_del_all_sta_list(priv);
|
||||
}
|
||||
|
||||
int mwifiex_tdls_check_tx(struct mwifiex_private *priv, struct sk_buff *skb)
|
||||
{
|
||||
struct mwifiex_auto_tdls_peer *peer;
|
||||
unsigned long flags;
|
||||
u8 mac[ETH_ALEN];
|
||||
|
||||
ether_addr_copy(mac, skb->data);
|
||||
|
||||
spin_lock_irqsave(&priv->auto_tdls_lock, flags);
|
||||
list_for_each_entry(peer, &priv->auto_tdls_list, list) {
|
||||
if (!memcmp(mac, peer->mac_addr, ETH_ALEN)) {
|
||||
if (peer->rssi <= MWIFIEX_TDLS_RSSI_HIGH &&
|
||||
peer->tdls_status == TDLS_NOT_SETUP &&
|
||||
(peer->failure_count <
|
||||
MWIFIEX_TDLS_MAX_FAIL_COUNT)) {
|
||||
peer->tdls_status = TDLS_SETUP_INPROGRESS;
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"setup TDLS link, peer=%pM rssi=%d\n",
|
||||
peer->mac_addr, peer->rssi);
|
||||
|
||||
cfg80211_tdls_oper_request(priv->netdev,
|
||||
peer->mac_addr,
|
||||
NL80211_TDLS_SETUP,
|
||||
0, GFP_ATOMIC);
|
||||
peer->do_setup = false;
|
||||
priv->check_tdls_tx = false;
|
||||
} else if (peer->failure_count <
|
||||
MWIFIEX_TDLS_MAX_FAIL_COUNT &&
|
||||
peer->do_discover) {
|
||||
mwifiex_send_tdls_data_frame(priv,
|
||||
peer->mac_addr,
|
||||
WLAN_TDLS_DISCOVERY_REQUEST,
|
||||
1, 0, NULL, 0);
|
||||
peer->do_discover = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void mwifiex_flush_auto_tdls_list(struct mwifiex_private *priv)
|
||||
{
|
||||
struct mwifiex_auto_tdls_peer *peer, *tmp_node;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&priv->auto_tdls_lock, flags);
|
||||
list_for_each_entry_safe(peer, tmp_node, &priv->auto_tdls_list, list) {
|
||||
list_del(&peer->list);
|
||||
kfree(peer);
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&priv->auto_tdls_list);
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
priv->check_tdls_tx = false;
|
||||
}
|
||||
|
||||
void mwifiex_add_auto_tdls_peer(struct mwifiex_private *priv, const u8 *mac)
|
||||
{
|
||||
struct mwifiex_auto_tdls_peer *tdls_peer;
|
||||
unsigned long flags;
|
||||
|
||||
if (!priv->adapter->auto_tdls)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&priv->auto_tdls_lock, flags);
|
||||
list_for_each_entry(tdls_peer, &priv->auto_tdls_list, list) {
|
||||
if (!memcmp(tdls_peer->mac_addr, mac, ETH_ALEN)) {
|
||||
tdls_peer->tdls_status = TDLS_SETUP_INPROGRESS;
|
||||
tdls_peer->rssi_jiffies = jiffies;
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/* create new TDLS peer */
|
||||
tdls_peer = kzalloc(sizeof(*tdls_peer), GFP_ATOMIC);
|
||||
if (tdls_peer) {
|
||||
ether_addr_copy(tdls_peer->mac_addr, mac);
|
||||
tdls_peer->tdls_status = TDLS_SETUP_INPROGRESS;
|
||||
tdls_peer->rssi_jiffies = jiffies;
|
||||
INIT_LIST_HEAD(&tdls_peer->list);
|
||||
list_add_tail(&tdls_peer->list, &priv->auto_tdls_list);
|
||||
dev_dbg(priv->adapter->dev, "Add auto TDLS peer= %pM to list\n",
|
||||
mac);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
}
|
||||
|
||||
void mwifiex_auto_tdls_update_peer_status(struct mwifiex_private *priv,
|
||||
const u8 *mac, u8 link_status)
|
||||
{
|
||||
struct mwifiex_auto_tdls_peer *peer;
|
||||
unsigned long flags;
|
||||
|
||||
if (!priv->adapter->auto_tdls)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&priv->auto_tdls_lock, flags);
|
||||
list_for_each_entry(peer, &priv->auto_tdls_list, list) {
|
||||
if (!memcmp(peer->mac_addr, mac, ETH_ALEN)) {
|
||||
if ((link_status == TDLS_NOT_SETUP) &&
|
||||
(peer->tdls_status == TDLS_SETUP_INPROGRESS))
|
||||
peer->failure_count++;
|
||||
else if (link_status == TDLS_SETUP_COMPLETE)
|
||||
peer->failure_count = 0;
|
||||
|
||||
peer->tdls_status = link_status;
|
||||
break;
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
}
|
||||
|
||||
void mwifiex_auto_tdls_update_peer_signal(struct mwifiex_private *priv,
|
||||
u8 *mac, s8 snr, s8 nflr)
|
||||
{
|
||||
struct mwifiex_auto_tdls_peer *peer;
|
||||
unsigned long flags;
|
||||
|
||||
if (!priv->adapter->auto_tdls)
|
||||
return;
|
||||
|
||||
spin_lock_irqsave(&priv->auto_tdls_lock, flags);
|
||||
list_for_each_entry(peer, &priv->auto_tdls_list, list) {
|
||||
if (!memcmp(peer->mac_addr, mac, ETH_ALEN)) {
|
||||
peer->rssi = nflr - snr;
|
||||
peer->rssi_jiffies = jiffies;
|
||||
break;
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
}
|
||||
|
||||
void mwifiex_check_auto_tdls(unsigned long context)
|
||||
{
|
||||
struct mwifiex_private *priv = (struct mwifiex_private *)context;
|
||||
struct mwifiex_auto_tdls_peer *tdls_peer;
|
||||
unsigned long flags;
|
||||
u16 reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
|
||||
|
||||
if (WARN_ON_ONCE(!priv || !priv->adapter)) {
|
||||
pr_err("mwifiex: %s: adapter or private structure is NULL\n",
|
||||
__func__);
|
||||
return;
|
||||
}
|
||||
|
||||
if (unlikely(!priv->adapter->auto_tdls))
|
||||
return;
|
||||
|
||||
if (!priv->auto_tdls_timer_active) {
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"auto TDLS timer inactive; return");
|
||||
return;
|
||||
}
|
||||
|
||||
priv->check_tdls_tx = false;
|
||||
|
||||
if (list_empty(&priv->auto_tdls_list)) {
|
||||
mod_timer(&priv->auto_tdls_timer,
|
||||
jiffies +
|
||||
msecs_to_jiffies(MWIFIEX_TIMER_10S));
|
||||
return;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&priv->auto_tdls_lock, flags);
|
||||
list_for_each_entry(tdls_peer, &priv->auto_tdls_list, list) {
|
||||
if ((jiffies - tdls_peer->rssi_jiffies) >
|
||||
(MWIFIEX_AUTO_TDLS_IDLE_TIME * HZ)) {
|
||||
tdls_peer->rssi = 0;
|
||||
tdls_peer->do_discover = true;
|
||||
priv->check_tdls_tx = true;
|
||||
}
|
||||
|
||||
if (((tdls_peer->rssi >= MWIFIEX_TDLS_RSSI_LOW) ||
|
||||
!tdls_peer->rssi) &&
|
||||
tdls_peer->tdls_status == TDLS_SETUP_COMPLETE) {
|
||||
tdls_peer->tdls_status = TDLS_LINK_TEARDOWN;
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"teardown TDLS link,peer=%pM rssi=%d\n",
|
||||
tdls_peer->mac_addr, -tdls_peer->rssi);
|
||||
tdls_peer->do_discover = true;
|
||||
priv->check_tdls_tx = true;
|
||||
cfg80211_tdls_oper_request(priv->netdev,
|
||||
tdls_peer->mac_addr,
|
||||
NL80211_TDLS_TEARDOWN,
|
||||
reason, GFP_ATOMIC);
|
||||
} else if (tdls_peer->rssi &&
|
||||
tdls_peer->rssi <= MWIFIEX_TDLS_RSSI_HIGH &&
|
||||
tdls_peer->tdls_status == TDLS_NOT_SETUP &&
|
||||
tdls_peer->failure_count <
|
||||
MWIFIEX_TDLS_MAX_FAIL_COUNT) {
|
||||
priv->check_tdls_tx = true;
|
||||
tdls_peer->do_setup = true;
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"check TDLS with peer=%pM rssi=%d\n",
|
||||
tdls_peer->mac_addr, -tdls_peer->rssi);
|
||||
}
|
||||
}
|
||||
spin_unlock_irqrestore(&priv->auto_tdls_lock, flags);
|
||||
|
||||
mod_timer(&priv->auto_tdls_timer,
|
||||
jiffies + msecs_to_jiffies(MWIFIEX_TIMER_10S));
|
||||
}
|
||||
|
||||
void mwifiex_setup_auto_tdls_timer(struct mwifiex_private *priv)
|
||||
{
|
||||
init_timer(&priv->auto_tdls_timer);
|
||||
priv->auto_tdls_timer.function = mwifiex_check_auto_tdls;
|
||||
priv->auto_tdls_timer.data = (unsigned long)priv;
|
||||
priv->auto_tdls_timer_active = true;
|
||||
mod_timer(&priv->auto_tdls_timer,
|
||||
jiffies + msecs_to_jiffies(MWIFIEX_TIMER_10S));
|
||||
}
|
||||
|
||||
void mwifiex_clean_auto_tdls(struct mwifiex_private *priv)
|
||||
{
|
||||
if (ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
|
||||
priv->adapter->auto_tdls &&
|
||||
priv->bss_type == MWIFIEX_BSS_TYPE_STA) {
|
||||
priv->auto_tdls_timer_active = false;
|
||||
del_timer(&priv->auto_tdls_timer);
|
||||
mwifiex_flush_auto_tdls_list(priv);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -64,10 +64,6 @@ int mwifiex_handle_rx_packet(struct mwifiex_adapter *adapter,
|
|||
else
|
||||
ret = mwifiex_process_sta_rx_packet(priv, skb);
|
||||
|
||||
/* Decrement RX pending counter for each packet */
|
||||
if (adapter->if_ops.data_complete)
|
||||
adapter->if_ops.data_complete(adapter);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mwifiex_handle_rx_packet);
|
||||
|
|
|
@ -167,7 +167,7 @@ mwifiex_set_ht_params(struct mwifiex_private *priv,
|
|||
ht_ie = cfg80211_find_ie(WLAN_EID_HT_CAPABILITY, params->beacon.tail,
|
||||
params->beacon.tail_len);
|
||||
if (ht_ie) {
|
||||
memcpy(&bss_cfg->ht_cap, ht_ie + 2,
|
||||
memcpy(&bss_cfg->ht_cap, ht_ie,
|
||||
sizeof(struct ieee80211_ht_cap));
|
||||
cap_info = le16_to_cpu(bss_cfg->ht_cap.cap_info);
|
||||
memset(&bss_cfg->ht_cap.mcs, 0,
|
||||
|
|
|
@ -27,6 +27,11 @@ static struct mwifiex_if_ops usb_ops;
|
|||
static struct semaphore add_remove_card_sem;
|
||||
|
||||
static struct usb_device_id mwifiex_usb_table[] = {
|
||||
/* 8766 */
|
||||
{USB_DEVICE(USB8XXX_VID, USB8766_PID_1)},
|
||||
{USB_DEVICE_AND_INTERFACE_INFO(USB8XXX_VID, USB8766_PID_2,
|
||||
USB_CLASS_VENDOR_SPEC,
|
||||
USB_SUBCLASS_VENDOR_SPEC, 0xff)},
|
||||
/* 8797 */
|
||||
{USB_DEVICE(USB8XXX_VID, USB8797_PID_1)},
|
||||
{USB_DEVICE_AND_INTERFACE_INFO(USB8XXX_VID, USB8797_PID_2,
|
||||
|
@ -125,8 +130,10 @@ static int mwifiex_usb_recv(struct mwifiex_adapter *adapter,
|
|||
dev_err(dev, "DATA: skb->len too large\n");
|
||||
return -1;
|
||||
}
|
||||
skb_queue_tail(&adapter->usb_rx_data_q, skb);
|
||||
|
||||
skb_queue_tail(&adapter->rx_data_q, skb);
|
||||
adapter->data_received = true;
|
||||
atomic_inc(&adapter->rx_pending);
|
||||
break;
|
||||
default:
|
||||
dev_err(dev, "%s: unknown endport %#x\n", __func__, ep);
|
||||
|
@ -176,7 +183,6 @@ static void mwifiex_usb_rx_complete(struct urb *urb)
|
|||
else
|
||||
skb_put(skb, recv_length - skb->len);
|
||||
|
||||
atomic_inc(&adapter->rx_pending);
|
||||
status = mwifiex_usb_recv(adapter, skb, context->ep);
|
||||
|
||||
dev_dbg(adapter->dev, "info: recv_length=%d, status=%d\n",
|
||||
|
@ -191,7 +197,6 @@ static void mwifiex_usb_rx_complete(struct urb *urb)
|
|||
if (card->rx_cmd_ep == context->ep)
|
||||
return;
|
||||
} else {
|
||||
atomic_dec(&adapter->rx_pending);
|
||||
if (status == -1)
|
||||
dev_err(adapter->dev,
|
||||
"received data processing failed!\n");
|
||||
|
@ -222,7 +227,13 @@ setup_for_next:
|
|||
else
|
||||
size = MWIFIEX_RX_DATA_BUF_SIZE;
|
||||
|
||||
if (card->rx_cmd_ep == context->ep) {
|
||||
mwifiex_usb_submit_rx_urb(context, size);
|
||||
} else {
|
||||
context->skb = NULL;
|
||||
if (atomic_read(&adapter->rx_pending) <= HIGH_RX_PENDING)
|
||||
mwifiex_usb_submit_rx_urb(context, size);
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
@ -348,10 +359,12 @@ static int mwifiex_usb_probe(struct usb_interface *intf,
|
|||
|
||||
/* PID_1 is used for firmware downloading only */
|
||||
switch (id_product) {
|
||||
case USB8766_PID_1:
|
||||
case USB8797_PID_1:
|
||||
case USB8897_PID_1:
|
||||
card->usb_boot_state = USB8XXX_FW_DNLD;
|
||||
break;
|
||||
case USB8766_PID_2:
|
||||
case USB8797_PID_2:
|
||||
case USB8897_PID_2:
|
||||
card->usb_boot_state = USB8XXX_FW_READY;
|
||||
|
@ -780,6 +793,11 @@ static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
|
|||
adapter->tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
|
||||
strcpy(adapter->fw_name, USB8897_DEFAULT_FW_NAME);
|
||||
break;
|
||||
case USB8766_PID_1:
|
||||
case USB8766_PID_2:
|
||||
adapter->tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K;
|
||||
strcpy(adapter->fw_name, USB8766_DEFAULT_FW_NAME);
|
||||
break;
|
||||
case USB8797_PID_1:
|
||||
case USB8797_PID_2:
|
||||
default:
|
||||
|
@ -962,19 +980,11 @@ static void mwifiex_submit_rx_urb(struct mwifiex_adapter *adapter, u8 ep)
|
|||
static int mwifiex_usb_cmd_event_complete(struct mwifiex_adapter *adapter,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
atomic_dec(&adapter->rx_pending);
|
||||
mwifiex_submit_rx_urb(adapter, MWIFIEX_USB_EP_CMD_EVENT);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mwifiex_usb_data_complete(struct mwifiex_adapter *adapter)
|
||||
{
|
||||
atomic_dec(&adapter->rx_pending);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* This function wakes up the card. */
|
||||
static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
|
||||
{
|
||||
|
@ -986,6 +996,20 @@ static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void mwifiex_usb_submit_rem_rx_urbs(struct mwifiex_adapter *adapter)
|
||||
{
|
||||
struct usb_card_rec *card = (struct usb_card_rec *)adapter->card;
|
||||
int i;
|
||||
struct urb_context *ctx;
|
||||
|
||||
for (i = 0; i < MWIFIEX_RX_DATA_URB; i++) {
|
||||
if (card->rx_data_list[i].skb)
|
||||
continue;
|
||||
ctx = &card->rx_data_list[i];
|
||||
mwifiex_usb_submit_rx_urb(ctx, MWIFIEX_RX_DATA_BUF_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
static struct mwifiex_if_ops usb_ops = {
|
||||
.register_dev = mwifiex_register_dev,
|
||||
.unregister_dev = mwifiex_unregister_dev,
|
||||
|
@ -996,8 +1020,8 @@ static struct mwifiex_if_ops usb_ops = {
|
|||
.dnld_fw = mwifiex_usb_dnld_fw,
|
||||
.cmdrsp_complete = mwifiex_usb_cmd_event_complete,
|
||||
.event_complete = mwifiex_usb_cmd_event_complete,
|
||||
.data_complete = mwifiex_usb_data_complete,
|
||||
.host_to_card = mwifiex_usb_host_to_card,
|
||||
.submit_rem_rx_urbs = mwifiex_usb_submit_rem_rx_urbs,
|
||||
};
|
||||
|
||||
/* This function initializes the USB driver module.
|
||||
|
@ -1048,5 +1072,6 @@ MODULE_AUTHOR("Marvell International Ltd.");
|
|||
MODULE_DESCRIPTION("Marvell WiFi-Ex USB Driver version" USB_VERSION);
|
||||
MODULE_VERSION(USB_VERSION);
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_FIRMWARE(USB8766_DEFAULT_FW_NAME);
|
||||
MODULE_FIRMWARE(USB8797_DEFAULT_FW_NAME);
|
||||
MODULE_FIRMWARE(USB8897_DEFAULT_FW_NAME);
|
||||
|
|
|
@ -24,6 +24,8 @@
|
|||
|
||||
#define USB8XXX_VID 0x1286
|
||||
|
||||
#define USB8766_PID_1 0x2041
|
||||
#define USB8766_PID_2 0x2042
|
||||
#define USB8797_PID_1 0x2043
|
||||
#define USB8797_PID_2 0x2044
|
||||
#define USB8897_PID_1 0x2045
|
||||
|
@ -37,6 +39,7 @@
|
|||
#define MWIFIEX_RX_DATA_URB 6
|
||||
#define MWIFIEX_USB_TIMEOUT 100
|
||||
|
||||
#define USB8766_DEFAULT_FW_NAME "mrvl/usb8766_uapsta.bin"
|
||||
#define USB8797_DEFAULT_FW_NAME "mrvl/usb8797_uapsta.bin"
|
||||
#define USB8897_DEFAULT_FW_NAME "mrvl/usb8897_uapsta.bin"
|
||||
|
||||
|
|
|
@ -141,6 +141,38 @@ int mwifiex_get_debug_info(struct mwifiex_private *priv,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
mwifiex_parse_mgmt_packet(struct mwifiex_private *priv, u8 *payload, u16 len,
|
||||
struct rxpd *rx_pd)
|
||||
{
|
||||
u16 stype;
|
||||
u8 category, action_code;
|
||||
struct ieee80211_hdr *ieee_hdr = (void *)payload;
|
||||
|
||||
stype = (cpu_to_le16(ieee_hdr->frame_control) & IEEE80211_FCTL_STYPE);
|
||||
|
||||
switch (stype) {
|
||||
case IEEE80211_STYPE_ACTION:
|
||||
category = *(payload + sizeof(struct ieee80211_hdr));
|
||||
action_code = *(payload + sizeof(struct ieee80211_hdr) + 1);
|
||||
if (category == WLAN_CATEGORY_PUBLIC &&
|
||||
action_code == WLAN_PUB_ACTION_TDLS_DISCOVER_RES) {
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"TDLS discovery response %pM nf=%d, snr=%d\n",
|
||||
ieee_hdr->addr2, rx_pd->nf, rx_pd->snr);
|
||||
mwifiex_auto_tdls_update_peer_signal(priv,
|
||||
ieee_hdr->addr2,
|
||||
rx_pd->snr,
|
||||
rx_pd->nf);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
dev_dbg(priv->adapter->dev,
|
||||
"unknown mgmt frame subytpe %#x\n", stype);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
* This function processes the received management packet and send it
|
||||
* to the kernel.
|
||||
|
@ -151,6 +183,7 @@ mwifiex_process_mgmt_packet(struct mwifiex_private *priv,
|
|||
{
|
||||
struct rxpd *rx_pd;
|
||||
u16 pkt_len;
|
||||
struct ieee80211_hdr *ieee_hdr;
|
||||
|
||||
if (!skb)
|
||||
return -1;
|
||||
|
@ -162,6 +195,11 @@ mwifiex_process_mgmt_packet(struct mwifiex_private *priv,
|
|||
|
||||
pkt_len = le16_to_cpu(rx_pd->rx_pkt_length);
|
||||
|
||||
ieee_hdr = (void *)skb->data;
|
||||
if (ieee80211_is_mgmt(ieee_hdr->frame_control)) {
|
||||
mwifiex_parse_mgmt_packet(priv, (u8 *)ieee_hdr,
|
||||
pkt_len, rx_pd);
|
||||
}
|
||||
/* Remove address4 */
|
||||
memmove(skb->data + sizeof(struct ieee80211_hdr_3addr),
|
||||
skb->data + sizeof(struct ieee80211_hdr),
|
||||
|
|
|
@ -5548,7 +5548,9 @@ mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
return rc;
|
||||
}
|
||||
|
||||
static void mwl8k_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void mwl8k_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct mwl8k_priv *priv = hw->priv;
|
||||
u8 tmp;
|
||||
|
@ -5565,7 +5567,8 @@ static void mwl8k_sw_scan_start(struct ieee80211_hw *hw)
|
|||
priv->sw_scan_start = true;
|
||||
}
|
||||
|
||||
static void mwl8k_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void mwl8k_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct mwl8k_priv *priv = hw->priv;
|
||||
u8 tmp;
|
||||
|
|
|
@ -1437,8 +1437,11 @@ int rt2x00mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
struct ieee80211_sta *sta);
|
||||
int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta);
|
||||
void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw);
|
||||
void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw);
|
||||
void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr);
|
||||
void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif);
|
||||
int rt2x00mac_get_stats(struct ieee80211_hw *hw,
|
||||
struct ieee80211_low_level_stats *stats);
|
||||
void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
|
||||
|
|
|
@ -568,7 +568,9 @@ int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00mac_sta_remove);
|
||||
|
||||
void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw)
|
||||
void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||
set_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags);
|
||||
|
@ -576,7 +578,8 @@ void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(rt2x00mac_sw_scan_start);
|
||||
|
||||
void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct rt2x00_dev *rt2x00dev = hw->priv;
|
||||
clear_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags);
|
||||
|
|
|
@ -158,55 +158,29 @@ void rt2x00queue_align_frame(struct sk_buff *skb)
|
|||
skb_trim(skb, frame_length);
|
||||
}
|
||||
|
||||
void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
|
||||
/*
|
||||
* H/W needs L2 padding between the header and the paylod if header size
|
||||
* is not 4 bytes aligned.
|
||||
*/
|
||||
void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
|
||||
{
|
||||
unsigned int payload_length = skb->len - header_length;
|
||||
unsigned int header_align = ALIGN_SIZE(skb, 0);
|
||||
unsigned int payload_align = ALIGN_SIZE(skb, header_length);
|
||||
unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
|
||||
|
||||
/*
|
||||
* Adjust the header alignment if the payload needs to be moved more
|
||||
* than the header.
|
||||
*/
|
||||
if (payload_align > header_align)
|
||||
header_align += 4;
|
||||
|
||||
/* There is nothing to do if no alignment is needed */
|
||||
if (!header_align)
|
||||
return;
|
||||
|
||||
/* Reserve the amount of space needed in front of the frame */
|
||||
skb_push(skb, header_align);
|
||||
|
||||
/*
|
||||
* Move the header.
|
||||
*/
|
||||
memmove(skb->data, skb->data + header_align, header_length);
|
||||
|
||||
/* Move the payload, if present and if required */
|
||||
if (payload_length && payload_align)
|
||||
memmove(skb->data + header_length + l2pad,
|
||||
skb->data + header_length + l2pad + payload_align,
|
||||
payload_length);
|
||||
|
||||
/* Trim the skb to the correct size */
|
||||
skb_trim(skb, header_length + l2pad + payload_length);
|
||||
}
|
||||
|
||||
void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
|
||||
{
|
||||
/*
|
||||
* L2 padding is only present if the skb contains more than just the
|
||||
* IEEE 802.11 header.
|
||||
*/
|
||||
unsigned int l2pad = (skb->len > header_length) ?
|
||||
L2PAD_SIZE(header_length) : 0;
|
||||
unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
|
||||
|
||||
if (!l2pad)
|
||||
return;
|
||||
|
||||
memmove(skb->data + l2pad, skb->data, header_length);
|
||||
skb_push(skb, l2pad);
|
||||
memmove(skb->data, skb->data + l2pad, hdr_len);
|
||||
}
|
||||
|
||||
void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
|
||||
{
|
||||
unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
|
||||
|
||||
if (!l2pad)
|
||||
return;
|
||||
|
||||
memmove(skb->data + l2pad, skb->data, hdr_len);
|
||||
skb_pull(skb, l2pad);
|
||||
}
|
||||
|
||||
|
|
|
@ -1361,7 +1361,9 @@ static int rtl_op_ampdu_action(struct ieee80211_hw *hw,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void rtl_op_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void rtl_op_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
||||
|
@ -1396,7 +1398,8 @@ static void rtl_op_sw_scan_start(struct ieee80211_hw *hw)
|
|||
rtlpriv->cfg->ops->scan_operation_backup(hw, SCAN_OPT_BACKUP_BAND0);
|
||||
}
|
||||
|
||||
static void rtl_op_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void rtl_op_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
||||
|
|
|
@ -842,7 +842,8 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
|
|||
break;
|
||||
}
|
||||
/* handle command packet here */
|
||||
if (rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
|
||||
if (rtlpriv->cfg->ops->rx_command_packet &&
|
||||
rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
|
||||
dev_kfree_skb_any(skb);
|
||||
goto end;
|
||||
}
|
||||
|
@ -1127,9 +1128,14 @@ static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
|
|||
|
||||
__skb_queue_tail(&ring->queue, pskb);
|
||||
|
||||
if (rtlpriv->use_new_trx_flow) {
|
||||
temp_one = 4;
|
||||
rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
|
||||
HW_DESC_OWN, (u8 *)&temp_one);
|
||||
} else {
|
||||
rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
|
||||
&temp_one);
|
||||
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1370,9 +1376,9 @@ static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
|
|||
ring->desc = NULL;
|
||||
if (rtlpriv->use_new_trx_flow) {
|
||||
pci_free_consistent(rtlpci->pdev,
|
||||
sizeof(*ring->desc) * ring->entries,
|
||||
sizeof(*ring->buffer_desc) * ring->entries,
|
||||
ring->buffer_desc, ring->buffer_desc_dma);
|
||||
ring->desc = NULL;
|
||||
ring->buffer_desc = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1543,7 +1549,6 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
|
|||
true,
|
||||
HW_DESC_TXBUFF_ADDR),
|
||||
skb->len, PCI_DMA_TODEVICE);
|
||||
ring->idx = (ring->idx + 1) % ring->entries;
|
||||
kfree_skb(skb);
|
||||
ring->idx = (ring->idx + 1) % ring->entries;
|
||||
}
|
||||
|
|
|
@ -1201,6 +1201,9 @@ static int _rtl92se_set_media_status(struct ieee80211_hw *hw,
|
|||
|
||||
}
|
||||
|
||||
if (type != NL80211_IFTYPE_AP &&
|
||||
rtlpriv->mac80211.link_state < MAC80211_LINKED)
|
||||
bt_msr = rtl_read_byte(rtlpriv, MSR) & ~MSR_LINK_MASK;
|
||||
rtl_write_byte(rtlpriv, (MSR), bt_msr);
|
||||
|
||||
temp = rtl_read_dword(rtlpriv, TCR);
|
||||
|
@ -1262,6 +1265,7 @@ void rtl92se_enable_interrupt(struct ieee80211_hw *hw)
|
|||
rtl_write_dword(rtlpriv, INTA_MASK, rtlpci->irq_mask[0]);
|
||||
/* Support Bit 32-37(Assign as Bit 0-5) interrupt setting now */
|
||||
rtl_write_dword(rtlpriv, INTA_MASK + 4, rtlpci->irq_mask[1] & 0x3F);
|
||||
rtlpci->irq_enabled = true;
|
||||
}
|
||||
|
||||
void rtl92se_disable_interrupt(struct ieee80211_hw *hw)
|
||||
|
@ -1276,8 +1280,7 @@ void rtl92se_disable_interrupt(struct ieee80211_hw *hw)
|
|||
rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
||||
rtl_write_dword(rtlpriv, INTA_MASK, 0);
|
||||
rtl_write_dword(rtlpriv, INTA_MASK + 4, 0);
|
||||
|
||||
synchronize_irq(rtlpci->pdev->irq);
|
||||
rtlpci->irq_enabled = false;
|
||||
}
|
||||
|
||||
static u8 _rtl92s_set_sysclk(struct ieee80211_hw *hw, u8 data)
|
||||
|
|
|
@ -399,6 +399,8 @@ static bool _rtl92s_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
|
|||
case 2:
|
||||
currentcmd = &postcommoncmd[*step];
|
||||
break;
|
||||
default:
|
||||
return true;
|
||||
}
|
||||
|
||||
if (currentcmd->cmdid == CMDID_END) {
|
||||
|
|
|
@ -236,6 +236,19 @@ static void rtl92s_deinit_sw_vars(struct ieee80211_hw *hw)
|
|||
}
|
||||
}
|
||||
|
||||
static bool rtl92se_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue,
|
||||
u16 index)
|
||||
{
|
||||
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
||||
struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
|
||||
u8 *entry = (u8 *)(&ring->desc[ring->idx]);
|
||||
u8 own = (u8)rtl92se_get_desc(entry, true, HW_DESC_OWN);
|
||||
|
||||
if (own)
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
static struct rtl_hal_ops rtl8192se_hal_ops = {
|
||||
.init_sw_vars = rtl92s_init_sw_vars,
|
||||
.deinit_sw_vars = rtl92s_deinit_sw_vars,
|
||||
|
@ -269,6 +282,7 @@ static struct rtl_hal_ops rtl8192se_hal_ops = {
|
|||
.led_control = rtl92se_led_control,
|
||||
.set_desc = rtl92se_set_desc,
|
||||
.get_desc = rtl92se_get_desc,
|
||||
.is_tx_desc_closed = rtl92se_is_tx_desc_closed,
|
||||
.tx_polling = rtl92se_tx_polling,
|
||||
.enable_hw_sec = rtl92se_enable_hw_security_config,
|
||||
.set_key = rtl92se_set_key,
|
||||
|
@ -306,6 +320,8 @@ static struct rtl_hal_cfg rtl92se_hal_cfg = {
|
|||
.maps[MAC_RCR_ACRC32] = RCR_ACRC32,
|
||||
.maps[MAC_RCR_ACF] = RCR_ACF,
|
||||
.maps[MAC_RCR_AAP] = RCR_AAP,
|
||||
.maps[MAC_HIMR] = INTA_MASK,
|
||||
.maps[MAC_HIMRE] = INTA_MASK + 4,
|
||||
|
||||
.maps[EFUSE_TEST] = REG_EFUSE_TEST,
|
||||
.maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
|
||||
|
|
|
@ -1029,7 +1029,7 @@ static int wl1251_op_hw_scan(struct ieee80211_hw *hw,
|
|||
goto out_sleep;
|
||||
}
|
||||
|
||||
skb = ieee80211_probereq_get(wl->hw, wl->vif, ssid, ssid_len,
|
||||
skb = ieee80211_probereq_get(wl->hw, wl->vif->addr, ssid, ssid_len,
|
||||
req->ie_len);
|
||||
if (!skb) {
|
||||
ret = -ENOMEM;
|
||||
|
|
|
@ -64,6 +64,9 @@ static int __wlcore_cmd_send(struct wl1271 *wl, u16 id, void *buf,
|
|||
id != CMD_STOP_FWLOGGER))
|
||||
return -EIO;
|
||||
|
||||
if (WARN_ON_ONCE(len < sizeof(*cmd)))
|
||||
return -EIO;
|
||||
|
||||
cmd = buf;
|
||||
cmd->id = cpu_to_le16(id);
|
||||
cmd->status = 0;
|
||||
|
@ -128,8 +131,9 @@ static int __wlcore_cmd_send(struct wl1271 *wl, u16 id, void *buf,
|
|||
* send command to fw and return cmd status on success
|
||||
* valid_rets contains a bitmap of allowed error codes
|
||||
*/
|
||||
int wlcore_cmd_send_failsafe(struct wl1271 *wl, u16 id, void *buf, size_t len,
|
||||
size_t res_len, unsigned long valid_rets)
|
||||
static int wlcore_cmd_send_failsafe(struct wl1271 *wl, u16 id, void *buf,
|
||||
size_t len, size_t res_len,
|
||||
unsigned long valid_rets)
|
||||
{
|
||||
int ret = __wlcore_cmd_send(wl, id, buf, len, res_len);
|
||||
|
||||
|
@ -150,7 +154,6 @@ fail:
|
|||
wl12xx_queue_recovery_work(wl);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(wl1271_cmd_send);
|
||||
|
||||
/*
|
||||
* wrapper for wlcore_cmd_send that accept only CMD_STATUS_SUCCESS
|
||||
|
@ -165,6 +168,7 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
|
|||
return ret;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(wl1271_cmd_send);
|
||||
|
||||
/*
|
||||
* Poll the mailbox event field until any of the bits in the mask is set or a
|
||||
|
@ -891,6 +895,9 @@ int wlcore_cmd_configure_failsafe(struct wl1271 *wl, u16 id, void *buf,
|
|||
|
||||
wl1271_debug(DEBUG_CMD, "cmd configure (%d)", id);
|
||||
|
||||
if (WARN_ON_ONCE(len < sizeof(*acx)))
|
||||
return -EIO;
|
||||
|
||||
acx->id = cpu_to_le16(id);
|
||||
|
||||
/* payload length, does not include any headers */
|
||||
|
@ -1138,7 +1145,7 @@ int wl12xx_cmd_build_probe_req(struct wl1271 *wl, struct wl12xx_vif *wlvif,
|
|||
|
||||
wl1271_debug(DEBUG_SCAN, "build probe request band %d", band);
|
||||
|
||||
skb = ieee80211_probereq_get(wl->hw, vif, ssid, ssid_len,
|
||||
skb = ieee80211_probereq_get(wl->hw, vif->addr, ssid, ssid_len,
|
||||
ie0_len + ie1_len);
|
||||
if (!skb) {
|
||||
ret = -ENOMEM;
|
||||
|
|
|
@ -31,8 +31,6 @@ struct acx_header;
|
|||
|
||||
int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
|
||||
size_t res_len);
|
||||
int wlcore_cmd_send_failsafe(struct wl1271 *wl, u16 id, void *buf, size_t len,
|
||||
size_t res_len, unsigned long valid_rets);
|
||||
int wl12xx_cmd_role_enable(struct wl1271 *wl, u8 *addr, u8 role_type,
|
||||
u8 *role_id);
|
||||
int wl12xx_cmd_role_disable(struct wl1271 *wl, u8 *role_id);
|
||||
|
|
|
@ -856,7 +856,9 @@ static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void vnt_sw_scan_start(struct ieee80211_hw *hw)
|
||||
static void vnt_sw_scan_start(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif,
|
||||
const u8 *addr)
|
||||
{
|
||||
struct vnt_private *priv = hw->priv;
|
||||
|
||||
|
@ -865,7 +867,8 @@ static void vnt_sw_scan_start(struct ieee80211_hw *hw)
|
|||
vnt_update_pre_ed_threshold(priv, true);
|
||||
}
|
||||
|
||||
static void vnt_sw_scan_complete(struct ieee80211_hw *hw)
|
||||
static void vnt_sw_scan_complete(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif)
|
||||
{
|
||||
struct vnt_private *priv = hw->priv;
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue