Blackfin: annotate anomaly 05000120
Add some notes for anomaly 05000120 to make sure we work around it. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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@ -45,6 +45,10 @@
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#include <asm/cpu.h>
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#include <asm/cpu.h>
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#include <linux/err.h>
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#include <linux/err.h>
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/*
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* Anomaly notes:
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* 05000120 - we always define corelock as 32-bit integer in L2
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*/
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struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
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struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
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void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
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void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
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