MIPS: cevt-sb1250: Migrate to new 'set-state' interface
Migrate cevt-rsb1250 driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-mips@linux-mips.org Cc: linaro-kernel@lists.linaro.org Cc: Thomas Gleixner <tglx@linutronix.de> Patchwork: https://patchwork.linux-mips.org/patch/10606/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -38,8 +38,20 @@
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* The general purpose timer ticks at 1MHz independent if
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* the rest of the system
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*/
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static void sibyte_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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static int sibyte_shutdown(struct clock_event_device *evt)
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{
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void __iomem *cfg;
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cfg = IOADDR(A_SCD_TIMER_REGISTER(smp_processor_id(), R_SCD_TIMER_CFG));
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/* Stop the timer until we actually program a shot */
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__raw_writeq(0, cfg);
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return 0;
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}
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static int sibyte_set_periodic(struct clock_event_device *evt)
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{
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unsigned int cpu = smp_processor_id();
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void __iomem *cfg, *init;
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@ -47,24 +59,11 @@ static void sibyte_set_mode(enum clock_event_mode mode,
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cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
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init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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__raw_writeq(0, cfg);
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__raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, init);
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__raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
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cfg);
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break;
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__raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, cfg);
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case CLOCK_EVT_MODE_ONESHOT:
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/* Stop the timer until we actually program a shot */
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case CLOCK_EVT_MODE_SHUTDOWN:
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__raw_writeq(0, cfg);
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break;
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case CLOCK_EVT_MODE_UNUSED: /* shuddup gcc */
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case CLOCK_EVT_MODE_RESUME:
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;
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}
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return 0;
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}
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static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
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@ -89,7 +88,7 @@ static irqreturn_t sibyte_counter_handler(int irq, void *dev_id)
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void __iomem *cfg;
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unsigned long tmode;
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if (cd->mode == CLOCK_EVT_MODE_PERIODIC)
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if (clockevent_state_periodic(cd))
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tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS;
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else
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tmode = 0;
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@ -129,7 +128,9 @@ void sb1250_clockevent_init(void)
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cd->irq = irq;
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cd->cpumask = cpumask_of(cpu);
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cd->set_next_event = sibyte_next_event;
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cd->set_mode = sibyte_set_mode;
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cd->set_state_shutdown = sibyte_shutdown;
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cd->set_state_periodic = sibyte_set_periodic;
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cd->set_state_oneshot = sibyte_shutdown;
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clockevents_register_device(cd);
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sb1250_mask_irq(cpu, irq);
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