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r8169:Update the way of reading RTL8168H PHY register "rg_saw_cnt" 

The vlaue of RTL8168H PHY register "rg_saw_cnt" only valid from bit0 to bit13.
When read this register, add bitwise-anding its value with 0x3fff.

Signed-off-by: Chunhao Lin <hau@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Chun-Hao Lin 2015-12-24 21:15:27 +08:00 committed by David S. Miller
parent e2e2788e4e
commit 584933334b
1 changed files with 1 additions and 1 deletions
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2
drivers/net/ethernet/realtek/r8169.c
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@ -6136,7 +6136,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
rtl_pcie_state_l2l3_enable(tp, false);
rtl_writephy(tp, 0x1f, 0x0c42);
rg_saw_cnt = rtl_readphy(tp, 0x13);
rg_saw_cnt = (rtl_readphy(tp, 0x13) & 0x3fff);
rtl_writephy(tp, 0x1f, 0x0000);
if (rg_saw_cnt > 0) {
u16 sw_cnt_1ms_ini;