memory: tegra: Add Tegra210 support

Add the table of memory clients and SWGROUPs for Tegra210 to enable SMMU
support for this new SoC.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2015-03-23 10:45:12 +01:00
parent 3c01cf3bef
commit 588c43a7bd
6 changed files with 1125 additions and 1 deletions

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@ -222,7 +222,7 @@ config TEGRA_IOMMU_SMMU
select IOMMU_API select IOMMU_API
help help
This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
SoCs (Tegra30 up to Tegra132). SoCs (Tegra30 up to Tegra210).
config EXYNOS_IOMMU config EXYNOS_IOMMU
bool "Exynos IOMMU Support" bool "Exynos IOMMU Support"

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@ -4,6 +4,7 @@ tegra-mc-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30.o
tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o tegra-mc-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114.o
tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o tegra-mc-$(CONFIG_ARCH_TEGRA_124_SOC) += tegra124.o
tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o tegra-mc-$(CONFIG_ARCH_TEGRA_132_SOC) += tegra124.o
tegra-mc-$(CONFIG_ARCH_TEGRA_210_SOC) += tegra210.o
obj-$(CONFIG_TEGRA_MC) += tegra-mc.o obj-$(CONFIG_TEGRA_MC) += tegra-mc.o

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@ -65,6 +65,9 @@ static const struct of_device_id tegra_mc_of_match[] = {
#endif #endif
#ifdef CONFIG_ARCH_TEGRA_132_SOC #ifdef CONFIG_ARCH_TEGRA_132_SOC
{ .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc }, { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
#endif
#ifdef CONFIG_ARCH_TEGRA_210_SOC
{ .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
#endif #endif
{ } { }
}; };

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@ -41,4 +41,8 @@ extern const struct tegra_mc_soc tegra124_mc_soc;
extern const struct tegra_mc_soc tegra132_mc_soc; extern const struct tegra_mc_soc tegra132_mc_soc;
#endif #endif
#ifdef CONFIG_ARCH_TEGRA_210_SOC
extern const struct tegra_mc_soc tegra210_mc_soc;
#endif
#endif /* MEMORY_TEGRA_MC_H */ #endif /* MEMORY_TEGRA_MC_H */

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,36 @@
#ifndef DT_BINDINGS_MEMORY_TEGRA210_MC_H
#define DT_BINDINGS_MEMORY_TEGRA210_MC_H
#define TEGRA_SWGROUP_PTC 0
#define TEGRA_SWGROUP_DC 1
#define TEGRA_SWGROUP_DCB 2
#define TEGRA_SWGROUP_AFI 3
#define TEGRA_SWGROUP_AVPC 4
#define TEGRA_SWGROUP_HDA 5
#define TEGRA_SWGROUP_HC 6
#define TEGRA_SWGROUP_NVENC 7
#define TEGRA_SWGROUP_PPCS 8
#define TEGRA_SWGROUP_SATA 9
#define TEGRA_SWGROUP_MPCORE 10
#define TEGRA_SWGROUP_ISP2 11
#define TEGRA_SWGROUP_XUSB_HOST 12
#define TEGRA_SWGROUP_XUSB_DEV 13
#define TEGRA_SWGROUP_ISP2B 14
#define TEGRA_SWGROUP_TSEC 15
#define TEGRA_SWGROUP_A9AVP 16
#define TEGRA_SWGROUP_GPU 17
#define TEGRA_SWGROUP_SDMMC1A 18
#define TEGRA_SWGROUP_SDMMC2A 19
#define TEGRA_SWGROUP_SDMMC3A 20
#define TEGRA_SWGROUP_SDMMC4A 21
#define TEGRA_SWGROUP_VIC 22
#define TEGRA_SWGROUP_VI 23
#define TEGRA_SWGROUP_NVDEC 24
#define TEGRA_SWGROUP_APE 25
#define TEGRA_SWGROUP_NVJPG 26
#define TEGRA_SWGROUP_SE 27
#define TEGRA_SWGROUP_AXIAP 28
#define TEGRA_SWGROUP_ETR 29
#define TEGRA_SWGROUP_TSECB 30
#endif